Patent application number | Description | Published |
20140169067 | RESISTANCE MEMORY DEVICE AND MEMORY APPARATUS AND DATA PROCESSING SYSTEM - A resistance memory device and a memory apparatus and data processing apparatus having the same are provided. The resistance memory device includes a pair of electrode layers and a variable resistance layer interposed between the pair of electrode layers. The variable resistance layer includes at least one variable resistance material layer and a piezoelectric material layer coupled to the at least one variable resistance material layer. | 06-19-2014 |
20140183440 | VARIABLE RESISTANCE MEMORY DEVICE - A variable resistance memory device includes a plurality of cell blocks each of which includes a plurality of first lines extending in parallel to each other along a first direction, a plurality of second lines extending in parallel to each other along a second direction crossing the first direction, and a plurality of memory cells including variable resistance layers arranged at intersections of the plurality of first lines and the plurality of second lines and a plurality of selection units coupled to the plurality of first lines and coupling two neighboring cell blocks. | 07-03-2014 |
20150070968 | MEMORY DEVICE HAVING A TUNNEL BARRIER LAYER IN A MEMORY CELL, AND ELECTRONIC DEVICE INCLUDING THE SAME - An electronic device includes a semiconductor memory. The semiconductor memory includes a plurality of first lines extending in a first direction, a plurality of second lines extending in a second direction crossing the first direction, a resistance variable layer interposed between the first lines and the second lines, a tunnel barrier layer interposed between the resistance variable layer and the first lines, and an intermediate electrode layer interposed between the resistance variable layer and the tunnel barrier layer. The tunnel barrier layer and the intermediate electrode layer overlap with at least two neighboring intersection regions of the first lines and the second lines. | 03-12-2015 |
20160043313 | ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME - An electronic device includes a semiconductor memory. The semiconductor memory includes first lines extending in a first direction; second lines extending in a second direction crossing the first direction; insulating patterns interposed between the first and second lines at first intersections of the first and second lines; and variable resistance patterns interposed between the first and the second lines at second intersections of the first and second lines. A central intersection is defined by respective central lines of the first and second lines and corresponds to a coordinate (0, 0). The first intersections are located on first to (n+1) | 02-11-2016 |
20160049582 | MEMORY DEVICE HAVING A TUNNEL BARRIER LAYER IN A MEMORY CELL, AND ELECTRONIC DEVICE INCLUDING THE SAME - An electronic device includes a semiconductor memory. The semiconductor memory includes a plurality of first lines extending in a first direction, a plurality of second lines extending in a second direction crossing the first direction, a resistance variable layer interposed between the first lines and the second lines, a tunnel barrier layer interposed between the resistance variable layer and the first lines, and an intermediate electrode layer interposed between the resistance variable layer and the tunnel barrier layer. The tunnel barrier layer and the intermediate electrode layer overlap with at least two neighboring intersection regions of the first lines and the second lines. | 02-18-2016 |
20160071909 | ELECTRONIC DEVICE HAVING FLASH MEMORY ARRAY FORMED IN AT DIFFERENT LEVEL THAN VARIABLE RESISTANCE MEMORY CELLS - An electronic device includes a memory. The memory includes a first cell array including a plurality of flash memory cells, a first peripheral circuit suitable for controlling the first cell array, a second cell array including a plurality of variable resistance memory cells, and a second peripheral circuit suitable for controlling the second cell array. The first cell array, the first peripheral circuit, and the second peripheral circuit are formed at a first level over a surface of a semiconductor substrate, and the second cell array is disposed at a second level over the surface of a semiconductor substrate, the second level being higher than the first level. A portion of the second cell array overlaps in a plan view the second peripheral circuit and/or the first cell array. | 03-10-2016 |
20160086679 | ELECTRONIC DEVICE - An electronic device including a semiconductor memory unit that includes: a first access line coupled to a first memory cell; a second access line coupled to a second memory cell for replacing the first memory cell when the first memory cell is a failure memory cell; a first driving block coupled to one of the first access line and the second access line, and suitable for driving said one of the first access line and the second access line with a first voltage when the first memory cell is accessed; and a first repair coupling block suitable for selectively coupling the first access line and the second access line based on whether the first memory cell is a failure memory cell or not when the first memory cell is accessed. | 03-24-2016 |
Patent application number | Description | Published |
20150085559 | ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME - According to embodiments, a semiconductor memory may include: a variable resistance pattern disposed over a substrate and extended in a first direction; first and second structures including a plurality of interlayer dielectric layers and a plurality of conductive layers which are alternately stacked over the substrate, and contacted with one side surface and the other side surface of the variable resistance pattern, respectively, wherein the first stacked structure has a line shape extended in a first direction and the second stacked structure has a pillar shape; and a pillar-shaped conductive pattern contacted with one side surface of the second stacked structure, which is not contacted with the variable resistance pattern. | 03-26-2015 |
20150089087 | ELECTRONIC DEVICE - A semiconductor memory may include: a first stacked structure including a first word line disposed over a substrate and extended in a first direction, a first bit line disposed over the first word line and extended in a second direction crossing the first direction, and a first variable resistance layer interposed between the first word line and the first bit line; and a second stacked structure including a second bit line disposed over the first stacked structure and extended in the second direction, a second word line disposed over the second bit line and extended in the first direction, and a second variable resistance layer interposed between the second word line and the second bit line; and a first selecting element layer interposed between the first bit line and the second bit line. | 03-26-2015 |
20160005462 | ELECTRONIC DEVICE - An electronic device includes a semiconductor memory unit. The semiconductor memory unit includes a plurality of first lines extending in a first direction, a plurality of second lines extending in a second direction intersecting the first direction, and a plurality of variable resistance patterns that is positioned at intersections of the first lines and the second lines and disposed between the first lines and the second lines in a vertical direction. Each of the variable resistance patterns has an elongated shape in a plan view and a portion of each of the variable resistance patterns is disposed outside a region in which a corresponding first line and a corresponding second line overlap with each other. | 01-07-2016 |
Patent application number | Description | Published |
20140097397 | RESISTIVE MEMORY DEVICE AND MEMORY APPARATUS AND DATA PROCESSING SYSTEM HAVING THE SAME - A resistive memory device includes a first electrode layer, a second electrode layer, and a first variable resistive layer and a second variable resistive layer stacked at least once between the first electrode layer and the second electrode layer. The first variable resistive material layer may include a metal nitride layer having a resistivity higher than that of the first electrode layer or the second electrode layer and less than or equal to that of an insulating material. | 04-10-2014 |
20140301127 | SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME - A semiconductor device includes a first conductive layer, a second conductive layer spaced from the first conductive layer, a variable resistance layer interposed between the first and second conductive layers, and an impurity-doped layer provided over a side surface of the variable resistance layer. The variable resistance layer has a smaller width than the first and the second conductive layers. | 10-09-2014 |
20150070968 | MEMORY DEVICE HAVING A TUNNEL BARRIER LAYER IN A MEMORY CELL, AND ELECTRONIC DEVICE INCLUDING THE SAME - An electronic device includes a semiconductor memory. The semiconductor memory includes a plurality of first lines extending in a first direction, a plurality of second lines extending in a second direction crossing the first direction, a resistance variable layer interposed between the first lines and the second lines, a tunnel barrier layer interposed between the resistance variable layer and the first lines, and an intermediate electrode layer interposed between the resistance variable layer and the tunnel barrier layer. The tunnel barrier layer and the intermediate electrode layer overlap with at least two neighboring intersection regions of the first lines and the second lines. | 03-12-2015 |
20150325789 | VARIABLE RESISTANCE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - Disclosed herein are a variable resistance memory device and a method of fabricating the same. The variable resistance memory device may include a first electrode; a second electrode; and a variable resistance layer configured to be interposed between the first electrode and the second electrode, wherein the variable resistance layer includes a Si-added metal oxide. | 11-12-2015 |
20150340608 | SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE INCLUDING THE SAME - A semiconductor device includes a first conductive layer, a second conductive layer spaced from the first conductive layer, a variable resistance layer interposed between the first and second conductive layers, and an impurity-doped layer provided over a side surface of the variable resistance layer. The variable resistance layer has a smaller width than the first and the second conductive layers. | 11-26-2015 |
20160049582 | MEMORY DEVICE HAVING A TUNNEL BARRIER LAYER IN A MEMORY CELL, AND ELECTRONIC DEVICE INCLUDING THE SAME - An electronic device includes a semiconductor memory. The semiconductor memory includes a plurality of first lines extending in a first direction, a plurality of second lines extending in a second direction crossing the first direction, a resistance variable layer interposed between the first lines and the second lines, a tunnel barrier layer interposed between the resistance variable layer and the first lines, and an intermediate electrode layer interposed between the resistance variable layer and the tunnel barrier layer. The tunnel barrier layer and the intermediate electrode layer overlap with at least two neighboring intersection regions of the first lines and the second lines. | 02-18-2016 |
Patent application number | Description | Published |
20130248989 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device and a method for manufacturing the same are disclosed, which include a gate electrode material in a recess or a buried gate cell structure, a polysilicon material doped with impurities over a sidewall of a recess located over the gate electrode material, and a junction formed by an annealing or a rapid thermal annealing (RTA) process, thereby establishing a degree overlap between a gate electrode material of a buried gate and a junction. | 09-26-2013 |
20140374822 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device and a method for manufacturing the same are disclosed, which include a gate electrode material in a recess or a buried gate cell structure, a polysilicon material doped with impurities over a sidewall of a recess located over the gate electrode material, and a junction formed by an annealing or a rapid thermal annealing (RTA) process, thereby establishing a degree overlap between a gate electrode material of a buried gate and a junction. | 12-25-2014 |
20160104783 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device and a method for manufacturing the same are disclosed, which include a gate electrode material in a recess or a buried gate cell structure, a polysilicon material doped with impurities over a sidewall of a recess located over the gate electrode material, and a junction formed by an annealing or a rapid thermal annealing (RTA) process, thereby establishing a degree overlap between a gate electrode material of a buried gate and a junction. | 04-14-2016 |
Patent application number | Description | Published |
20140027916 | SEMICONDUCTOR DEVICE HAVING VERTICAL CHANNEL - A semiconductor device includes: bit lines each extending in a first direction; word lines each extending in a second direction, which crosses the first direction; pillars provided in a region between the bit lines and the word lines, wherein the pillars are each arranged along a third direction; and bit line contacts arranged along the third direction and alternately between the pillars and coupled to alternate bit lines. | 01-30-2014 |
20140335690 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device includes: a contact hole formed over a structure including a conductive pattern; a contact plug formed in the contact hole; a first metal silicide film surrounding the contact plug; and a second metal silicide film formed over the contact plug. | 11-13-2014 |
20150115392 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes a bit line disposed over a semiconductor substrate, a supporting film being perpendicular to the bit line, a first storage node contact disposed at a lower part of a region disposed between the bit line and the supporting film, and a second storage node contact having a line shape, disposed over the first storage node contact and the bit line, isolated by the supporting film, and patterned in a diagonal direction across the bit line. | 04-30-2015 |
20150380415 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes a bit line disposed over a semiconductor substrate, a supporting film being perpendicular to the bit line, a first storage node contact disposed at a lower part of a region disposed between the bit line and the supporting film, and a second storage node contact having a line shape, disposed over the first storage node contact and the bit line, isolated by the supporting film, and patterned in a diagonal direction across the bit line. | 12-31-2015 |