Lai, Zhubei City
Chien-Wen Lai, Zhubei City TW
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20150331100 | ULTRASONIC DETECTION DEVICE AND DETECTION METHOD THEREOF - The present invention is directed to an ultrasonic detection device and detection method thereof. The ultrasonic detection device includes a processor and a transceiver module, whereby the transceiver module may be operated to enter an additional reception mode and receive a first ambient echo. The processor may analyze the first ambient echo and generate an analysis result. When the generated analysis result shows that the first ambient echo has a signal characteristic indicative of an interference source in the environment, the transceiver module may again enter the additional reception mode before a detection operation is performed. As a result, an elimination mode may be performed to correctly obtain or distinguish the corresponding reflected wave of the detection operation, thereby avoiding an error of operation, such as distance detection, due to the presence of an interference source. | 11-19-2015 |
Chun-Liang Lai, Zhubei City TW
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20150360266 | Container Cleaning Device - A container cleaning device includes a mounting plate shaped for accommodating a wafer; and a nozzle assembly disposed on the mounting plate and including a base and a shell complimentarily disposed on the base. The shell includes an inlet and at least one outlet member disposed on an edge. The base includes a recess communicating with the inlet, and at least one outlet element each being inclined at a predetermined angle with respect to the shell. Each outlet member of the shell is adjacent to and communicates with the corresponding outlet element of the base. | 12-17-2015 |
Jiun Ren Lai, Zhubei City TW
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20110193221 | 3DIC Architecture with Interposer for Bonding Dies - A device includes an interposer, which includes a substrate having a top surface. An interconnect structure is formed over the top surface of the substrate, wherein the interconnect structure includes at least one dielectric layer, and metal features in the at least one dielectric layer. A plurality of through-substrate vias (TSVs) is in the substrate and electrically coupled to the interconnect structure. A first die is over and bonded onto the interposer. A second die is bonded onto the interposer, wherein the second die is under the interconnect structure. | 08-11-2011 |
20110193235 | 3DIC Architecture with Die Inside Interposer - A device is formed to include an interposer having a top surface, and a bump on the top surface of the interposer. An opening extends from the top surface into the interposer. A first die is bonded to the bump. A second die is located in the opening of the interposer and bonded to the first die. | 08-11-2011 |
Jun Liang Lai, Zhubei City TW
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20100237886 | PROBE CARD - A probe card is provided. The probe card can serialize, analogise and divide a digital signal by a parallel-to-serial converter, a parallel-to-serial converter, and a power divided unit respectively. The probe card can increase signal channels, and is not restricted by signal channels of a tester to test more DUTs simultaneously. Moreover, the probe card has fine impedance matching and channels separating to raise testing efficiency and reduce signal loss. | 09-23-2010 |
Ko-Yin Lai, Zhubei City TW
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20150110208 | SIGNAL PROCESSING METHOD AND ASSOCIATED DEVICE, AND METHOD FOR DETERMINING WHETHER SPECTRUM OF MULTICARRIER SIGNAL IS REVERSED - A signal processing method includes: converting an analog signal to a digital signal; converting the digital signal from a time domain to a frequency domain, the frequency-domain digital signal including a plurality of sets of data exhibiting a predetermined order associated with frequencies respectively corresponding to the data; performing a correlation operation according to the data and the predetermined order to generate a forward correlation result; performing the correlation operation according to the data and a reverse order of the predetermined order to generate a reverse correlation result; selectively generating a control signal according to the forward and reverse correlation results; and processing the digital signal in the time domain according to the control signal so that the data generated in the subsequent step of converting the digital signal from the time domain to the frequency domain exhibit the predetermined order or the reverse order. | 04-23-2015 |
20150163007 | METHOD FOR DETERMINING IMPULSIVE INTERFERENCE APPLICABLE TO ORTHOGONAL FREQUENCY DIVISION MULTIPLE ACCESS SIGNAL RECEIVER AND RECEIVER THEREOF - A method for determining impulsive interference applicable to an orthogonal frequency division multiple access (OFDMA) signal receiver is provided. The receiving method includes calculating a subcarrier noise of a first symbol, calculating a subcarrier noise of a second symbol, calculating a first ratio of the subcarrier noise of the first symbol to the subcarrier noise of the second symbol, determining whether the ratio is greater than a first threshold, and recognizing that the first symbol suffers from impulsive interference when the first ratio is greater than the first threshold. | 06-11-2015 |
20150200695 | Method and Apparatus for Processing a Multiple-Carrier Signal Provided with Subcarriers Distributed in a Band - A method for processing a multiple carrier signal provided with subcarriers distributed in a band. The method includes calculating a subcarrier noise of an edge of the band, calculating a subcarrier noise of a center of the band, calculating a ratio of the subcarrier noise of the edge of the band to the subcarrier noise of the center of the band, determining whether the ratio is greater than a threshold, and acknowledging that the edge of the band suffers from interference when the ratio is greater than the threshold. | 07-16-2015 |
Ming Tsan Lai, Zhubei City TW
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20140273746 | CMP POLISHING PAD DETECTOR AND SYSTEM - A chemical mechanical planarization apparatus includes a table, a polishing pad and a detector. The polishing pad is disposed at the table. The detector detects an abnormal condition of the polishing pad. | 09-18-2014 |
20150318179 | PLANARIZATION DEVICE AND PLANARIZATION METHOD USING THE SAME - A planarization device and a planarization method using the same are provided. The planarization device comprises a platen, a grinding pad, an operation arm, a chuck and a shielding pad. The grinding pad is disposed on the platen. The operation arm has a lower surface. The chuck rotatably is disposed on the operation arm. The shielding pad is detachably disposed on the lower surface of the operation arm. | 11-05-2015 |
Sheng-Chih Lai, Zhubei City TW
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20150380430 | JUNCTION FORMATION FOR VERTICAL GATE 3D NAND MEMORY - A method is provided for manufacturing a memory device. A plurality of layers of a first semiconductor material is formed, and a plurality of holes is formed through the layers. An etch process is applied to the layers through the holes, to form pull-back regions in the layers adjacent and surrounding the holes. A film of second semiconductor material is deposited over the holes and into the pull-back regions. Portions of the film are removed from the holes while leaving elements of the second semiconductor material in the pull-back regions in contact with the first semiconductor material. The holes are filled with insulating material. Layers in the plurality of layers have respective first doping concentration profiles, and the elements of the second semiconductor material in the pull-back regions have second doping concentration profiles. The second doping concentration profiles establish a higher conductivity in the elements of second semiconductor material. | 12-31-2015 |
Tung Long Lai, Zhubei City TW
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20100277850 | Multi-Zone Electrostatic Chuck and Chucking Method - A method for processing a semiconductor wafer comprises measuring data indicating an amount of warpage of the wafer. At least two different voltages are determined, based on the amount of warpage. The voltages are to be applied to respective portions of the wafer by an electrostatic chuck that is to hold the wafer. The at least two different voltages are applied to hold the respective portions of the wafer while performing a fabrication process on the wafer. | 11-04-2010 |