Patent application number | Description | Published |
20080316383 | METHOD FOR DETECTING STORAGE VOLTAGE, DISPLAY APPARATUS USING THE STORAGE VOLTAGE AND METHOD FOR DRIVING THE DISPLAY APPARATUS - A method for detecting a storage voltage, a display apparatus using the storage voltage and a method for driving the display apparatus. The method for detecting the storage voltage includes applying a test voltage to a storage line in a display panel having an active layer disposed between the storage line and a data line while varying the test voltage, the active layer being in an active state or an inactive state according to the test voltage, and detecting the storage voltage corresponding to the test voltage in an inactive state of the active layer. Thus, the display panel is driven by using the detected storage voltage, so that an aperture ratio may be increased and current consumption may be decreased. | 12-25-2008 |
20090066624 | PRINTED CIRCUIT BOARD, DISPLAY APPARATUS HAVING A PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE PRINTED CIRCUIT BOARD - A printed circuit board (“PCB”) includes a first pattern structure, a second pattern structure, a third pattern structure, and a fourth pattern structure. The first pattern structure includes a first ground pattern. The second pattern structure includes a first line pattern overlapping the first ground pattern and a second ground pattern electrically insulated from the first line pattern. The third pattern structure includes a third ground pattern overlapping the first line pattern and a second line pattern overlapping the second ground pattern. The fourth pattern structure includes a fourth ground pattern overlapping the second line pattern. Therefore, the PCB may decrease noise. | 03-12-2009 |
20090129005 | Display Device, Manufacturing Method of the Display Device, and Portable Computer Having the Display Device - A display device includes a display panel, and a chassis supporting the display panel, and including a conductive material. The display device includes a circuit board including a signal wiring connected to the display panel to apply a driving signal to the display panel, and a grounding wiring for grounding. The display device includes a connector connected with a signal cable that applies an external signal and is connected to the signal wiring and the grounding wiring of the circuit board. The display device includes an exposed grounding unit exposing part of the grounding wiring on the circuit board, wherein the exposed grounding unit is disposed adjacent to the connector. The display device includes a conductive member which connects the exposed grounding unit with the chassis. | 05-21-2009 |
20100220496 | DISPLAY APPARATUS AND METHOD OF ASSEMBLING THE SAME - In a display apparatus and a method of assembling the display apparatus according to one or more embodiments, a printed circuit board is electrically connected to a lower end of a display panel and disposed in a rear surface of a container. A flexible printed circuit board is contained in the container, and light sources are mounted on the flexible printed circuit board. A connection film electrically connecting the printed circuit board and the flexible printed circuit board is disposed on a bottom portion of the container, and one end of the connection film passes through a fixing hole formed through the bottom portion. The one end of the connection film is electrically connected to the printed circuit board disposed in the rear surface. Thus, movement of the connection film may be limited by an inner wall defining the fixing hole. | 09-02-2010 |
20120285009 | PRINTED CIRCUIT BOARD, DISPLAY APPARATUS HAVING A PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE PRINTED CIRCUIT BOARD - A printed circuit board (“PCB”) includes a first pattern structure, a second pattern structure, a third pattern structure, and a fourth pattern structure. The first pattern structure includes a first ground pattern. The second pattern structure includes a first line pattern overlapping the first ground pattern and a second ground pattern electrically insulated from the first line pattern. The third pattern structure includes a third ground pattern overlapping the first line pattern and a second line pattern overlapping the second ground pattern. The fourth pattern structure includes a fourth ground pattern overlapping the second line pattern. Therefore, the PCB may decrease noise. | 11-15-2012 |
Patent application number | Description | Published |
20090157986 | MEMORY CONTROLLER - A memory controller includes an digitally programmable delay unit having a selectable delay time receiving a read-enable signal and outputting a delayed read-enable signal. The delay time is selected in response to an externally applied delay-control signal. A sampling unit in the memory controller outputs data received from a separate memory, in synchronization with the delayed enable signal. The delay time may be a multiple of the period of a clock signal. | 06-18-2009 |
20100070821 | METHOD AND APPARATUS FOR DETECTING FREE PAGE AND A METHOD AND APPARATUS FOR DECODING ERROR CORRECTION CODE USING THE METHOD AND APPARATUS FOR DETECTING FREE PAGE - A method and apparatus for detecting a free page of a memory device, and a method and apparatus for decoding an error correction code by using the method and apparatus for detecting a free page are provided. Free page data read from the memory is converted into a converted codeword for inclusion as an element of an error correction code field. The converted codeword is compared to an initially set target codeword to detect an amount of non-identical bits. A page read from the memory is determined to be a free page when the amount of non-identical bits is equal to or less than an initially set threshold value. | 03-18-2010 |
20130061113 | METHOD OF CORRECTING ERRORS AND MEMORY DEVICE USING THE SAME - A method of correcting errors includes receiving a codeword including main data and parity data stored in a memory cell array to perform an error check and correction (ECC) decoding on the codeword and selectively performing an error correction on the codeword based on a result of the ECC decoding using asymmetry of error occurrence of the main data. | 03-07-2013 |
20130219208 | METHOD OF CORRECTING A DUTY RATIO OF A DATA STROBE SIGNAL - A method of correcting a duty ratio of a data strobe signal is provided. By the method, a duty ratio of a data strobe signal output from a semiconductor memory device is detected and a duty ratio of a clock signal input to the semiconductor memory device is adjusted based on the duty ratio of the data strobe signal. | 08-22-2013 |
20130219246 | Method and Apparatus for Detecting Free Page and a Method and Apparatus for Decoding Error Correction Code Using the Method and Apparatus for Detecting Free Page - A method and apparatus for detecting a free page of a memory device, and a method and apparatus for decoding an error correction code by using the method and apparatus for detecting a free page are provided. Free page data read from the memory is converted into a converted codeword for inclusion as an element of an error correction code field. The converted codeword is compared to an initially set target codeword to detect an amount of non-identical bits. A page read from the memory is determined to be a free page when the amount of non-identical bits is equal to or less than an initially set threshold value. | 08-22-2013 |
20140082269 | EMBEDDED MULTIMEDIA CARD (eMMC), HOST CONTROLLING SAME, AND METHOD OF OPERATING eMMC SYSTEM - A method of operating an eMMC system includes a host sending SEND_EXT_CSD command to obtain busy control clock information from an eMMC. The busy control clock information is then used to control provision of a host-provided clock to the eMMC while the eMMC is in a busy state. | 03-20-2014 |
20140115656 | SECURITY MANAGEMENT UNIT, HOST CONTROLLER INTERFACE INCLUDING SAME, METHOD OPERATING HOST CONTROLLER INTERFACE, AND DEVICES INCLUDING HOST CONTROLLER INTERFACE - A method of operating a host controller interface includes receiving a buffer descriptor including sector information from a main memory, fetching data by using a source address included in the buffer descriptor, selecting one of a plurality of entries included in a security policy table by using the sector information, and determining whether to encrypt the fetched data by using a security policy included in the selected entry. | 04-24-2014 |
20140195742 | SYSTEM ON CHIP INCLUDING MEMORY MANAGEMENT UNIT AND MEMORY ADDRESS TRANSLATION METHOD THEREOF - A system on chip (SoC) including a memory management unit (MMU) and a memory address translation method thereof are provided. The SoC includes a master intellectual property (IP) configured to output a request corresponding to each of a plurality of working sets; an MMU module comprising a plurality of MMUs, each of which is allocated for one of the working sets and translates virtual addresses corresponding to the request into physical addresses; a first bus interconnect configured to connect the MMU module with a memory device and to transmit the request, on which address translation has been performed in at least one of the MMUs, to the memory device; and a second bus interconnect configured to connect the master IP with the MMU module and to allocate one of the MMUs for each of the working sets. | 07-10-2014 |
20140244908 | INTEGRATED CIRCUIT FOR COMPUTING TARGET ENTRY ADDRESS OF BUFFER DESCRIPTOR BASED ON DATA BLOCK OFFSET, METHOD OF OPERATING SAME, AND SYSTEM INCLUDING SAME - A method of operating an integrated circuit is provided. The method includes receiving a data block offset from a second storage device, obtaining a target entry address using the data block offset, and reading an entry among a plurality of entries comprised in a buffer descriptor stored in a first storage device based on the target entry address. The method also includes reading data from a data buffer among a plurality of data buffers included in the first storage device using a physical address included in the entry and transmitting the data to the second storage device. | 08-28-2014 |
20140258674 | SYSTEM-ON-CHIP AND METHOD OF OPERATING THE SAME - A system on chip (SoC) includes a central processing unit (CPU), an intellectual property (IP) block, and a memory management unit (MMU). The CPU is configured to set a prefetch direction corresponding to a working set of data. The IP block is configured to process the working set of data. The MMU is configured to prefetch a next page table entry from a page table based on the prefetch direction during address translation between a virtual address of the working set of data and a physical address. | 09-11-2014 |
Patent application number | Description | Published |
20130147863 | METHOD OF DISPLAYING THREE-DIMENSIONAL STEREOSCOPIC IMAGE AND DISPLAY APPARATUS FOR PERFORMING THE SAME - A method of displaying a three-dimensional stereoscopic image includes providing a display panel with a data signal including a left-eye data signal and a right-eye data signal, sequentially providing each of a plurality of segment blocks of an active polarized panel with a driving signal including a high level and a low level, where the active polarized panel emits first polarized light in a first polarizing mode of the driving signal based on the data signal, and the active polarized panel emits second polarized light in a second polarizing mode of the driving signal based on the data signal, and selectively providing the display panel with light based on a level changing interval, during which a level of the driving signal is changed. | 06-13-2013 |
20130241922 | METHOD OF DISPLAYING THREE DIMENSIONAL STEREOSCOPIC IMAGE AND DISPLAY APPARATUS PERFORMING FOR THE METHOD - A method of displaying a three-dimensional (“3D”) image includes displaying a left-eye image and a right-eye image on a display panel, the display panel including a first sub pixel, a second sub pixel, a third sub pixel and a fourth sub pixel sequentially arranged in a row direction and driving an active barrier panel to form an opening part configured to transmit light and a barrier configured to block light, the active barrier panel including a first barrier electrode, a second barrier electrode, a third barrier electrode and a fourth barrier electrode respectively corresponding to the first, second, third and fourth sub pixels. | 09-19-2013 |
Patent application number | Description | Published |
20130335385 | 3-DIMENSIONAL IMAGE DISPLAY DEVICE AND DRIVING METHOD THEREOF - A 3-dimensional image display device and a driving method thereof, the method including using a first array of a matrix of unit pixels to form an image while a remaining array of the unit pixels displays black, and forming openings in a barrier panel to expose the unit pixels of the first array, the width of the openings ranging from 1.5 to 2 times the width of the exposed unit pixels. | 12-19-2013 |
20140022219 | DISPLAY DEVICE AND METHOD FOR OPERATING THE DISPLAY DEVICE - A display device includes a display panel configured to receive a first-frame image signal for displaying a first-frame image in a first frame. The display panel is further configured to receive a second-frame image signal for displaying a second-frame image in a second frame that immediately follows the first frame such that the display panel appears to display a transition region associated with a boudary between a portion of the first-frame image and a portion of the second-frame image and moving in a moving direction. The display device further includes an optical effect layer and electrode sets. The electrode sets respectively overlap different portions of the optical effect layer and are configured for sequentially starting affecting the different portions of the optical effect layer such that the optical effect layer appears to display a light-blocking section that moves in the moving direction and overlaps the transition region. | 01-23-2014 |
20140063001 | ACTIVE BARRIER PANEL AND THREE DIMENSIONAL IMAGE DISPLAY APPARATUS HAVING THE SAME - An active barrier panel includes a first substrate, a second substrate and a liquid crystal layer. The first substrate includes a first opening electrode configured to operate as a first opening transmitting the light and a first barrier electrode configured to as a first barrier blocking the light, the first opening electrode and the first barrier electrode having a step structure. The second substrate includes a second opening electrode configured to operate as a second opening and crossing at a right angle to the first opening electrode, and a second barrier electrode configured to operate as a second barrier and crossing at a right angle to the first barrier electrode. The liquid crystal layer is disposed between the first and second substrates. | 03-06-2014 |
20140118332 | METHOD OF DRIVING ACTIVE BARRIER PANEL AND DISPLAY APPARATUS FOR PERFORMING THE METHOD - A method of driving an active barrier panel, the active barrier panel comprising an electrode unit which has n barrier electrodes operating as an opening part transmitting light and n barrier electrodes operating as a barrier part blocking the light, the method includes calculating a crosstalk distribution of each of observer's left-eye and right-eye corresponding to each of 2n barrier-shift modes, according to an observer's position, dividing an active area of the active barrier panel into at least one barrier block based on a flat portion of the crosstalk distribution, in which a minimum crosstalk is maintained, determining the barrier-shift mode for each barrier block to maintain the minimum crosstalk, and operating the electrode unit in a corresponding barrier block in the determined barrier-shift mode. | 05-01-2014 |
20140354613 | DISPLAY DEVICE AND METHOD FOR OPERATING THE DISPLAY DEVICE - A display device includes a display panel configured to receive a first-frame image signal for displaying a first-frame image in a first frame. The display panel is further configured to receive a second-frame image signal for displaying a second-frame image in a second frame that immediately follows the first frame such that the display panel appears to display a transition region associated with a boudary between a portion of the first-frame image and a portion of the second-frame image and moving in a moving direction. The display device further includes an optical effect layer and electrode sets. The electrode sets respectively overlap different portions of the optical effect layer and are configured for sequentially starting affecting the different portions of the optical effect layer such that the optical effect layer appears to display a light-blocking section that moves in the moving direction and overlaps the transition region. | 12-04-2014 |