Kurup, Bangalore
Anoop Muralidhara Kurup, Bangalore IN
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20110030383 | HYBRID MULTICHANNEL POROUS STRUCTURE FOR HYDROGEN SEPARATION - A hybrid multichannel porous structure for processing between two fluid streams of different compositions includes a housing and one or more structures disposed within the cavity of the housing in a shell and tube configuration. Each structure includes a body made of a porous, inorganic material and a plurality of channels for processing an optional sweep stream. Each channel is coated with a membrane layer. A feed stream introduced into the housing is in direct contact with the structures such that a gas selectively permeates through the body and into the channels. The gas combines with the sweep stream to form a permeate that exits from each channel. The remaining feed stream forms a retentate that exits from the housing. The feed stream may consist of syngas containing hydrogen gas and the sweep stream may contain nitrogen gas. A power plant that incorporates the hybrid structure is disclosed. | 02-10-2011 |
20110099969 | HYBRID MULTICHANNEL POROUS STRUCTURE FOR HYDROGEN SEPARATION - A hybrid multichannel porous structure for processing between two fluid streams of different compositions includes a housing and one or more structures disposed within the cavity of the housing in a shell and tube configuration. Each structure includes a body made of a porous, inorganic material and a plurality of channels for processing an optional sweep stream. Each channel is coated with a membrane layer. A feed stream introduced into the housing is in direct contact with the structures such that a gas selectively permeates through the body and into the channels. The gas combines with the sweep stream to form a permeate that exits from each channel. The remaining feed stream forms a retentate that exits from the housing. The feed stream may consist of syngas containing hydrogen gas and the sweep stream may contain nitrogen gas. A power plant that incorporates the hybrid structure is disclosed. | 05-05-2011 |
Girish G. Kurup, Bangalore IN
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20080258879 | COMPARING COUNTER CONTENTS FOR TIMING CRITICAL APPLICATIONS - An electrical circuit for comparing contents of counter circuits. The electrical circuit comprises a first counter circuit and a second counter circuit electrically connected to a flip-flop circuit through a logic circuit and OR gates connected to the flip flop circuit. The first counter circuit is for receiving a first enable signal and generating a first output signal. The second counter circuit is for receiving a second enable signal and generating a second output signal. The first enable signal and the second enable signal are for comparing the first output signal to the second output signal. The flip-flop circuit is for generating a first status signal defining a first relationship between the first output signal and the second output signal. The logic circuit is for generating a second status signal defining a second relationship between the first output signal and the second output signal. | 10-23-2008 |
20150063348 | IMPLEMENTING HIERARCHICAL HIGH RADIX SWITCH WITH TIMESLICED CROSSBAR - A method and system are provided for implementing a hierarchical high radix switch with a time-sliced crossbar. The hierarchical high radix switch includes a plurality of inputs and a plurality of outputs. Each input belongs to one input group; each input group sends consolidated requests to each output, by ORing the requests from the local input ports in that input group. Each output port belongs to one output group; each output port grants one of the requesting input groups using a rotating priority defined by a next-to-serve pointer. Each output group consolidates the output port grants and allows one grant to pass back to an input group. Each input port in an input group evaluates all incoming grants in an oldest packet first manner to form an accept. Each input group consolidates the input port accepts and selects one accept to send to the output port. | 03-05-2015 |
Girish Gopala Kurup, Bangalore IN
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20090125292 | METHOD AND SYSTEM FOR TESTING FUNCTIONALITY OF A CHIP CHECKER - A method for testing functionality of a chip checker is disclosed. The checker is arranged for generating a predetermined verification signal when the chip, upon receiving a predetermined input signal, generates a corresponding response signal. The method comprises the steps of developing a model of the chip, the model at least partially emulating at least one response of the chip by generating, upon receiving the predetermined input signal, the corresponding response signal. The method further supplies the developed chip model with the predetermined input signal. The checker is then used to test whether the generated response signal corresponds to the respective predetermined input signal. A failure of the checker to generate the predetermined verification signal indicates checker malfunction. | 05-14-2009 |
20100017841 | METHOD AND SYSTEM FOR SYNCHRONIZING TRANSPORT STREAMS OF MULTIPLE TRANSPONDERS FOR AREA CRITICAL APPLICATIONS - Disclosed is a transport stream synchronizing system for synchronizing transport streams output from a plurality of transponders and decoded by a plurality of tuners. The transport stream synchronizing system comprises a tuner selector operable to select one transport stream out of a plurality of transport streams decoded by the plurality of tuners, a transport packet synchronizer operable receive the transport stream selected by the tuner selector, and synchronize the received transport stream; and a transport packet arbiter and router operable to receive a synchronized transport stream from the selected tuner, and route the received synchronized transport stream to a predetermined destination. | 01-21-2010 |
20100020830 | TRANSPORT BITSTREAM SYNCHRONIZATION - Disclosed is a method for synchronizing a bitstream, the method comprising comparing an incoming data byte of the bitstream with a predetermined byte pattern; writing a result of the comparison to a current write address in a FIFO; calculating a difference between a current read address in the FIFO and the current write address; asserting a synchronization signal when the difference equals a predetermined value; the result of the comparison is asserted; and an output of the FIFO at the current read address is asserted. | 01-28-2010 |
20140122771 | WEIGHTAGE-BASED SCHEDULING FOR HIERARCHICAL SWITCHING FABRICS - Techniques are disclosed to implement a scheduling scheme for a crossbar scheduler that provides distributed request-grant-accept arbitration between input group arbiters and output group arbiters in a distributed switch. Input and output ports are grouped and assigned a respective arbiter. The input group arbiters communicate requests indicating a count of respective ports having data packets to be transmitted via one of the output ports. The output group arbiter attempts to accommodate the requests for each member of an input group before proceeding to a next input group. | 05-01-2014 |
Swetha Kurup, Bangalore IN
Swetha Mukunda Kurup, Bangalore IN
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20100011021 | SYSTEM AND METHOD FOR CONTEXT MAP GENERATION - Personalized services and targeted services demand the exploitation of context—say, context of an environment, context of a product, context of a service, and context of a customer or user or individual. In order for the personalized and targeted services to have a greater impact, the identified context used by a context aware processing engine needs to be accurate and current. Such an up-to-date context is called as context map and a system and method for generating a customer-specific context map involves the processing of customer transactions, abstracting and generalizing these transactions into entities, and inter-relating these entities. The context map, for example, is useful in ad targeting in mobile environments, and in quicker and efficient problem resolution in contact center environments. | 01-14-2010 |