Patent application number | Description | Published |
20090117499 | Cleaning solution for immersion photolithography system and immersion photolithograph process using the cleaning solution - A cleaning solution for an immersion photolithography system according to example embodiments may include an ether-based solvent, an alcohol-based solvent, and a semi-aqueous-based solvent. In the immersion photolithography system, a plurality of wafers coated with photoresist films may be exposed pursuant to an immersion photolithography process using an immersion fluid. The area contacted by the immersion fluid during the exposure process may accumulate contaminants. Accordingly, the area contacted by the immersion fluid during the exposure process may be washed with the cleaning solution according to example embodiments so as to reduce or prevent defects in the immersion photolithography system. | 05-07-2009 |
20090137126 | METHOD OF FORMING A SPACER - A sacrificial layer and wet etch are used to form a sidewall spacer so as to prevent damage to the structure on which the spacer is formed and to the underlying substrate as well. Once the structure is formed on the substrate a spacer formation layer is formed to cover the structure, and a sacrificial layer is formed on the spacer formation layer. The sacrificial layer is wet etched to form a sacrificial layer pattern on that portion of the spacer formation layer extending along a sidewall of the structure. The spacer is formed on the sidewall of the structure by wet etching the spacer formation layer using the sacrificial layer pattern as a mask. | 05-28-2009 |
20100267225 | Method of manufacturing semiconductor device - A method of manufacturing a semiconductor device, the method including forming a photoresist film on a substrate, and removing the photoresist film from the substrate using a composition that includes a sulfuric acid solution, a hydrogen peroxide solution, and a corrosion inhibitor. | 10-21-2010 |
20110073866 | VERTICAL-TYPE SEMICONDUCTOR DEVICE - In a vertical-type non-volatile memory device, an insulation layer pattern is provided on a substrate, the insulation layer pattern having a linear shape. Single-crystalline semiconductor patterns are provided on the substrate to make contact with both sidewalls of the insulation layer pattern, the single-crystalline semiconductor patterns having a pillar shape that extends in a vertical direction relative to the substrate. A tunnel oxide layer is provided on the single-crystalline semiconductor pattern. A lower electrode layer pattern is provided on the tunnel oxide layer and on the substrate. A plurality of insulation interlayer patterns is provided on the lower electrode layer pattern, the insulation interlayer patterns being spaced apart from one another by a predetermined distance along the single-crystalline semiconductor pattern. A charge-trapping layer and a blocking dielectric layer are sequentially formed on the tunnel oxide layer between the insulation interlayer patterns. A plurality of control gate patterns is provided on the blocking dielectric layer between the insulation interlayer patterns. An upper electrode layer pattern is provided on the tunnel oxide layer and on the uppermost insulation interlayer pattern. | 03-31-2011 |
20110159660 | Methods of Forming Integrated Circuit Capacitors Having Sidewall Supports and Capacitors Formed Thereby - In a method of forming a capacitor, a first mold layer pattern including a first insulating material may be formed on a substrate. The first mold layer pattern may have a trench. A supporting layer including a second insulating material may be formed in the trench. The second insulating material may have an etching selectivity with respect to the first insulating material. A second mold layer may be formed on the first mold layer pattern and the supporting layer pattern. A lower electrode may be formed through the second mold layer and the first mold layer pattern. The lower electrode may make contact with a sidewall of the supporting layer pattern. The first mold layer pattern and the second mold layer may be removed. A dielectric layer and an upper electrode may be formed on the lower electrode and the supporting layer pattern. | 06-30-2011 |
20110201203 | METHODS OF FORMING A HOLE HAVING A VERTICAL PROFILE AND SEMICONDUCTOR DEVICES HAVING A VERTICAL HOLE - In a method of forming a hole, an insulation layer is formed on a substrate, and a preliminary hole exposing the substrate is formed through the insulation layer. A photosensitive layer pattern including an organic polymer is then formed on the substrate to fill the preliminary hole. An etching gas including hydrogen fluoride (HF) or fluorine (F | 08-18-2011 |
20110217833 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING AN ETCHANT - In an etchant for etching a capping layer having etching selectivity with respect to a dielectric layer, the capping layer changes compositions of the dielectric layer, to thereby control a threshold voltage of a gate electrode including the dielectric layer. The etchant includes about 0.01 to 3 percent by weight of an acid, about 10 to 40 percent by weight of a fluoride salt and a solvent. Accordingly, the dielectric layer is prevented from being damaged by the etching process for removing the capping layer and the electric characteristics of the gate electrode are improved. | 09-08-2011 |
20110281415 | METHODS OF FORMING AN ISOLATION LAYER AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES HAVING AN ISOLATION LAYER - In a method of forming an isolation layer, first and second trenches are formed on a substrate. The first and the second trenches have first and second widths, respectively, and the second width is greater than the first width. A second isolation layer pattern partially fills the second trench. A first isolation layer pattern and the third isolation layer pattern are formed. The first isolation layer pattern fills the first trench, and the third isolation layer pattern is formed on the second isolation layer pattern and fills a remaining portion of the second trench. | 11-17-2011 |
20110287625 | METHODS OF FORMING A PATTERN, METHODS OF FORMING A GATE STRUCTURE AND METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME - A method of forming a pattern in a semiconductor device includes forming an etching object layer on a substrate, the etching object layer is an oxide that is substantially free of impurities. A mask is formed on the etching object layer, the mask is an oxide that includes impurities. The etching object layer is patterned using the mask as an etching mask and then the mask is removed. The mask is removed using an etchant having an etching selectivity to an oxide that is substantially free of impurities and an oxide that includes impurities during removing of the mask to limit damage to the patterned etching object layer during removal of the mask. | 11-24-2011 |
20110306197 | Methods of Manufacturing Semiconductor Devices - Method of manufacturing semiconductor device are provided including forming an insulation layer having a pad on a substrate; forming an etch stop layer on the insulation layer and the pad; forming a mold structure having at least one mold layer on the etch stop layer; forming a first supporting layer on the mold structure; etching the first supporting layer and the mold structure to form a first opening exposing the etch stop layer; forming a spacer on a sidewall of the first opening; etching the etch stop layer using the spacer as an etching mask to form a second opening, different from the first opening, exposing a first portion of the pad having a first associated area; etching the etch stop layer using the spacer as an etching mask to form a third opening exposing a second portion of the pad having a second associated area, the second associated area being larger than the first associated area; and etching the mold structure to form a fourth opening having a width larger than a width of the third opening. | 12-15-2011 |
20110306208 | Method for Fabricating Semiconductor Device - Methods for forming a mold for a storage electrode in a semiconductor device include forming an interlayer dielectric layer including a contact plug on a substrate. A first mold dielectric layer is formed of a first material on the interlayer dielectric layer. A second mold dielectric layer is formed of a second material on the first mold dielectric layer. The second material has a different etch selectivity than the first material. A first opening is formed that penetrates the first and second mold dielectric layers. The first opening is dry etched to define a second opening having a larger width in the first mold dielectric layer than in the second mold dielectric layer based on the different etch selectivity of the first and second mold dielectric layers to define the mold for the storage electrode. | 12-15-2011 |
20120064680 | METHODS OF FORMING A CAPACITOR STRUCTURE AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME - A method of forming a capacitor structure and manufacturing a semiconductor device, the method of forming a capacitor structure including sequentially forming a first mold layer, a supporting layer, a second mold layer, an anti-bowing layer, and a third mold layer on a substrate having a conductive region thereon; partially removing the third mold layer, the anti-bowing layer, the second mold layer, the supporting layer, and the first mold layer to form a first opening exposing the conductive region; forming a lower electrode on a sidewall and bottom of the first opening, the lower electrode being electrically connected to the conductive region; further removing the third mold layer, the anti-bowing layer, and the second mold layer; partially removing the supporting layer to form a supporting layer pattern; removing the first mold layer; and sequentially forming a dielectric layer and upper electrode on the lower electrode and the supporting layer pattern. | 03-15-2012 |
20120064727 | SUBSTRATE TREATMENT EQUIPMENT AND METHOD OF TREATING SUBSTRATE USING THE SAME - Substrate treatment equipment includes a wet treatment apparatus for treating a substrate with a solution (liquid), a drying (treatment) apparatus discrete from the wet treatment apparatus and for drying the substrate using a supercritical fluid, and a transfer device. The substrate is extracted by the transfer device from the wet treatment apparatus after the substrate has been treated and the substrate is transferred by the device while wet to the dry treatment apparatus. To this end, various elements/methods may be used to keep the substrate wet or wet the substrate. In any case, the substrate is prevented from drying naturally, i.e., from air-drying, as the substrate is being transferred from the wet treatment apparatus to the drying apparatus. Thus, equipment and method prevent defects such as water spots and the leaning of fine structures on the substrate. | 03-15-2012 |
20120080061 | Apparatus For Drying Substrate - Example embodiments relate to an apparatus for drying a substrate. The apparatus may include a housing including first barrier walls having a first height, a rotary chuck that is disposed within the housing and configured to rotate the substrate, a nozzle system that is disposed above the rotary chuck and configured to supply a fluid onto the substrate, a cleaning liquid supply unit supplying a cleaning liquid for cleaning the substrate to the nozzle system, and a drying liquid supply unit supplying a drying liquid for drying the substrate to the nozzle system. | 04-05-2012 |
20120083189 | CHEMICAL MECHANICAL POLISHING APPARATUS HAVING PAD CONDITIONING DISK AND PRE-CONDITIONER UNIT - A pad conditioning disk, a pre-conditioning unit, and a CMP apparatus having the same are provided. The pad conditioning disk includes a base in which mountain-type tips and valley-type grooves are repeatedly connected to each other, and a cutting layer formed on the base layer. The cutting layer including conditioning particles deposited on surfaces of the tips and grooves. A surfaces roughness of conditioning particles deposited on the surfaces of the tips is less than a surface roughness of conditioning particles deposited on the surfaces of the grooves. | 04-05-2012 |
20120112317 | INTEGRATED CIRCUIT CAPACITORS HAVING SIDEWALL SUPPORTS - In a method of forming a capacitor, a first mold layer pattern including a first insulating material may be formed on a substrate. The first mold layer pattern may have a trench. A supporting layer including a second insulating material may be formed in the trench. The second insulating material may have an etching selectivity with respect to the first insulating material. A second mold layer may be formed on the first mold layer pattern and the supporting layer pattern. A lower electrode may be formed through the second mold layer and the first mold layer pattern. The lower electrode may make contact with a sidewall of the supporting layer pattern. The first mold layer pattern and the second mold layer may be removed. A dielectric layer and an upper electrode may be formed on the lower electrode and the supporting layer pattern. | 05-10-2012 |
20120152898 | SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING SYSTEM FOR PERFORMING THE SAME - In a supercritical fluid method a supercritical fluid is supplied into a process chamber. The supercritical fluid is discharged from the process chamber as a supercritical fluid process proceeds. A concentration of a target material included in the supercritical fluid discharged from the process chamber is detected during the supercritical fluid process. An end point of the supercritical fluid process may be determined based on a detected concentration of the target material. | 06-21-2012 |
20140283886 | SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING SYSTEM FOR PERFORMING THE SAME - In a supercritical fluid method a supercritical fluid is supplied into a process chamber. The supercritical fluid is discharged from the process chamber as a supercritical fluid process proceeds. A concentration of a target material included in the supercritical fluid discharged from the process chamber is detected during the supercritical fluid process. An end point of the supercritical fluid process may be determined based on a detected concentration of the target material. | 09-25-2014 |