Kollipara
Anil Kollipara, Allen, TX US
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20130225156 | Systems and Methods for Convergence and Forecasting for Mobile Broadband Networks - An embodiment method of forecasting traffic growth for a mobile wireless network in a network planning period includes determining traffic growth of a plurality of service types, and defining a plurality of clusters each containing a respective quantity of cell sites that share similar traffic growth characteristics. The method further includes determining seasonality factors in traffic growth for the plurality of service types in each of the plurality of clusters, and identifying and rejecting outliers in historical traffic measurements. The method also includes utilizing cyclo-stationary weekly traffic behavior to increase a quantity of sample points to accelerate traffic growth estimator convergence. | 08-29-2013 |
H K Pavan Kumar Kollipara, Pune IN
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20140331857 | ON BOARD INERT GAS GENERATION SYSTEM - An on board inert gas generation system for an aircraft receives air from a relatively low pressure source such as low pressure engine bleed air or ram air and passes it to a positive displacement compressor to increase the pressure thereof to be suitable for supply to an air separation module. The speed of the positive displacement compressor may be adjusted across a wide range in order to provide efficient operation in cruise and descent phases of aircraft flight. The operating speed of the compressor and/or the flow rate from the ASM to the space to be inerted may be controlled in accordance with at least one of the gas composition in the space to be inerted, the flight condition, and the ullage volume. | 11-13-2014 |
Koteswara Rao Kollipara, Hyderabad IN
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20120027763 | Antibody for Targeted induction of Apoptosis, CDC and ADCC mediated killing of Cancer cells, TBL-CLN1 - Antibody for targeted induction of Apoptosis, CDC and ADCC mediated killing of Cancer cells, TBL-CLN1, is disclosed. The antibodies, TBL-CLN1, are monoclonal antibodies which can specifically target and bind to the epitope of SEQ ID NO:1 expressed on cancer cells which further leads to killing of cancer cells. TBL-CLN1 is not conjugated to toxin or cytotoxic molecules, and provides selective killing of cancer cells just by binding to cancer cell surface. Also, disclosed herein is SEQ ID NO: 2 which is an engineered epitope which comprises of polypeptide sequence of SEQ ID NO: 1 and a cysteine residue which is added at the carboxyl end of the SEQ ID NO: 1. The epitope of SEQ ID NO: 2 is used to generate monoclonal antibodies described herein. | 02-02-2012 |
20130267582 | ADENO-ASSOCIATED VIRUS 2/8 - MICRO RNA-101 THERAPY FOR LIVER CANCER - Adeno-associated virus 2/8-microRNA-101(AAV2/8-miR-101) therapy for liver cancer is provided. In particular, the invention provides a recombinant AAV 2/8 vector, comprising mutated capsid, for the enforced expression of pre-miR-101 and for the treatment of liver cancer. | 10-10-2013 |
20150051142 | NOVEL METHOD FOR PERORAL DELIVERY OF INSULIN AND ITS ANALOGUES FOR THERAPEUTIC USAGE - A method for treating type 1 and type 2 diabetes by administering an oral pharmaceutical formulation which comprises of insulin or its analogues amalgamated with suitable encapsulating agents and pharmaceutical excipients. The encapsulated pharmaceutical oral formulation protects insulin or its analogues from harsh milieu of the gastrointestinal tract and facilitates efficient delivery of insulin at targeted sites with sustained hypoglycemic activity. | 02-19-2015 |
Krishna Kollipara, Cary, NC US
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20110098183 | PLANTS WITH INCREASED YIELD AND/OR INCREASED TOLERANCE TO ENVIRONMENTAL STRESS (IY-BM) - This invention relates generally to plant cells and/or plants with increased tolerance to environmental stress and/or increased yield as compared to a corresponding, e.g. non-transformed, wild type plant cell by increasing or generating one or more activities of polypeptides associated with abiotic stress responses and abiotic stress tolerance in plants. In particular, this invention relates to plant cells and/or plants tailored to grow under conditions of environmental stress, and/or to plant cells and/or plant showing increased yield under environmental stress conditions. The invention also deals with methods of producing and screening for and breeding such plant cells and/or plants. | 04-28-2011 |
Krishna Kollipara, Durham, NC US
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20120117867 | Plants with Increased Yield - A method for producing a plant with increased yield as compared to a corresponding wild type plant whereby the method comprises at least the following step: increasing or generating in a plant or a part thereof one or more activities of a polypeptide selected from the group consisting of 26S proteasome-subunit, 50S ribosomal protein L36, Autophagy-related protein, B0050-protein, Branched-chain amino acid permease, Calmodulin, carbon storage regulator, FK506-binding protein, gamma-glutamyl-gamma-aminobutyrate hydrolase, GM02LC38418-protein, Heat stress transcription factor, Mannan polymerase II complex subunit, mitochondrial precursor of Lon protease homolog, MutS protein homolog, phosphate transporter subunit, Protein EFR3, pyruvate kinase, tellurite resistance protein, Xanthine permease, and YAR047C-protein. | 05-17-2012 |
Meher Kollipara, Louisville, KY US
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20090038347 | Method and Apparatus for Providing Redundancy in Monitoring the Lid Switch and Basket of a Washing Machine - A method and control system for automatically halting operation of a washing machine by stopping operation of the washing machine motor is provided. The washing machine that implements the method includes a motor controller having a primary microprocessor and a secondary microprocessor which serves as a backup redundancy processor in the event there is a malfunction with the primary microprocessor or the primary microprocessor fails to halt washing machine operation within a prescribed window of time. The primary microprocessor controls operation of all of the washing machine electrically controlled components. The secondary microprocessor is electrically connected to a lid switch and the washing machine motor and is configured to halt operation of the motor in response to the primary microprocessor failing to halt motor operation after the lid is open. | 02-12-2009 |
Meher P. Kollipara, Louisville, KY US
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20090106913 | MEASURING APPARATUS AND METHOD - A method and apparatus is provided for determining a measurement of a portion of a load in a basket that is rotatably supported provided, the method includes: a) determining, a dry load measurement; b) spinning, the basket that is rotatably supported in order to gradually remove the liquid from the load, wherein the liquid is removed substantially by centrifugal force on the basket that is rotatably supported; c) determining a wet load measurement, wherein the dry load measurement is less than the wet load measurement; d) comparing the dry load measurement to the wet load measurement to determine a remaining liquid measurement; and e) repeating c) and d) until the remaining liquid measurement substantially is within a predetermined percentage threshold of about 0 percent to about 50 percent of the wet load measurement. | 04-30-2009 |
20090112513 | LOAD SIZE MEASURING APPARATUS AND METHOD - A washing machine is provided that includes measuring a load in a washer with a motor, the method comprising: a) accelerating a load in the washer b) providing a first input voltage and running the motor until a first speed of the motor is stable; c) providing a second input voltage, d) starting a timer, upon providing the second input voltage, and obtaining a first time measurement; e) operating the motor until the load speed responds to the second input voltage to the motor and is stable; f) stopping the timer and obtaining a second time measurement; g) calculating a time differential between the first time measurement and the second time measurement; and h) determining the load size using a load size equation and the time differential. | 04-30-2009 |
20090205377 | LOAD SIZE MEASURING APPARATUS AND METHOD - A method and apparatus for measuring a size of a load in a basket that is rotatably supported is presented. The method comprises determining an acceleration energy (AE) required to accelerate the basket; determining a friction energy (FE) required to maintain a stable rotational speed of the basket; subtracting the friction energy (FE) from the acceleration energy (AE) to obtain a load inertial energy (LE); and determining a load size from the load inertial energy (LE). | 08-20-2009 |
20110185513 | APPARATUS AND METHOD FOR DETECTING UNBALANCED LOADS IN A WASHING MACHINE - An apparatus and techniques for detecting unbalanced load in a washing machine are provided. A clothes basket containing a load of clothing and rotatable about an axis is accelerated. As the clothes basket passes a first predetermined rotational speed, one of power and torque applied to the clothes basket is limited. It is determined whether the clothes basket accelerates from the first predetermined to a second predetermined rotational speed within a predetermined time. Failure to reach the second predetermined rotational speed within the predetermined time signifies an out-of-balance condition as to the load of clothing. No resonance of the machine lies between the first and second predetermined rotational speeds. In another aspect, a similar technique can be employed, with or without limiting power or torque, wherein a resonance does lie between the first and second predetermined rotational speeds. | 08-04-2011 |
Meher Prasadu Kollipara, Louisville, KY US
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20120111065 | WASHING MACHINE WITH IMPROVED BRAKING METHOD - A method of braking a washing machine from an operational speed to a zero speed is provided (as well as a washing machine incorporating the method) for a washing machine driven by one of a synchronous or asynchronous motor. Upon receipt of a stop signal, collapsing the motor rotating magnetic fields are collapsed for a predefined time period. After the predefined time period, DC braking voltage is applied to the motor stator windings at a controlled ramp-up rate to a fixed amplitude to generate a controlled ramped braking torque on the motor. The braking torque is applied until the motor is stopped. | 05-10-2012 |
20120145203 | DISHWASHER PUMP INLET MACERATOR SYSTEM - A dishwasher is provided having a wash chamber that is supplied with wash water by a water circulation pump assembly. The pump assembly has a motor, an inlet in fluid communication with a sump, and an outlet in fluid communication with the wash chamber. A macerator system is configured with the pump assembly and includes a filter screen disposed across the inlet and a chopper blade rotationally driven by the pump assembly at a defined axial distance upstream from the filter screen. The chopper blade is biased by materials in magnetic flux communication to the defined axial distance so as to maintain the defined distance in a running and stopped states of the pump assembly. | 06-14-2012 |
20150019026 | SYSTEMS AND METHODS FOR DETECTING APPLIANCE PUMP CAVITATION OR DRY STATE - Systems and methods for detecting appliance pump cavitation or dry state are provided. An exemplary appliance can include a current measurement circuit configured to provide a feedback signal that describes an inverter current drawn by an inverter providing three-phase power to the pump motor. A control unit of an appliance can detect pump cavitation and dry state by monitoring the feedback signal. Another exemplary appliance can include a motor speed detection circuit configured to provide a motor speed signal describing the speed of the pump motor. The control unit of the appliance can monitor variance in pump motor speed to detect pump dry state or cavitation. An exemplary method includes monitoring either an inverter current used by an inverter to drive a motor or a variance in a rotational speed of the motor. | 01-15-2015 |
Nagesh B. Kollipara, Bangalore IN
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20140244936 | MAINTAINING CACHE COHERENCY BETWEEN STORAGE CONTROLLERS - Systems and methods maintain cache coherency between storage controllers utilizing bitmap data. In one embodiment, a storage controller processes an I/O request for a logical volume from a host, and generates one or more cache entries in a cache memory that is based on the request. The storage controller identifies a backup storage controller for managing the logical volume, and generates bitmap data that identifies cache entries in the cache memory that have changed since synchronizing with the backup storage controller. The storage controller provides the bitmap data to the backup storage controller to allow the backup storage controller to synchronize its cache memory with the cache memory of the storage controller based on the bitmap data. | 08-28-2014 |
Ramya Kollipara, Arlington, MA US
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20110172288 | Compositions and Methods for the Identification, Assessment, Prevention and Therapy of Thymic Lymphoma or Hamartomatous Tumours - The subject matter relates to newly discovered nucleic acid molecules and proteins associated with thymic lymphoma and hamartomatous tumors. Compositions and methods for detecting, characterizing, preventing, and treating human thymic lymphoma and hamartomatous tumors are provided. | 07-14-2011 |
Ravindranath Kollipara, Sunnyvale, CA US
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20150309529 | MEMORY MIRRORING - Memory system enabling memory mirroring in single write operations. The memory system includes a memory channel which can store duplicate copies of a data element into multiple locations in the memory channel. The multiple locations are disposed in different memory modules and have different propagation times with respect to a data signal transmitted from the memory controller. In a write operation, the relative timings of the chip select, command and address signals among the multiple locations are adjusted according to the data propagation delay. As a result, a data element can be written into the multiple locations responsive to a data signal transmitted from the memory controller in a single transmission event. | 10-29-2015 |
20150309899 | MEMORY MIRRORING - Memory system enabling memory mirroring in single write operations for the primary and backup data storage. The memory system utilizes a memory channel including one or more latency groups, with each latency group encompassing a number of memory modules that have the same signal timing to the controller. A primary copy and a backup copy of a data element can be written to two memory modules in the same latency group of the channel and in a single write operation. The buses of the channel may have the same trace length to each of the memory modules within a latency group. | 10-29-2015 |
Ravindranath Kollipara, Palo Alto, CA US
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20110033007 | MULTI-BAND, MULTI-DROP CHIP TO CHIP SIGNALING - A system comprising: a first integrated circuit device having a multi-band transmission circuit; second and third integrated circuit devices having respective multi-band reception circuits; and a signaling link including a first stub coupled to the multi-band transmission circuit to receive a multi-band signal therefrom, second and third stubs coupled to the multi-band reception circuits of the second and third integrated circuit devices, respectively, to deliver the multi-band signal thereto, and a plurality of channel segments that extend between the first, second and third stubs to convey the multi-band transmission signal therebetween, and wherein at least one of a physical length, impedance or propagation constant of at least one of the first stub, second stub, third stub or channel segment of the plurality of channel segments is selected to spectrally position a frequency-interval exhibiting attenuated frequency response on the signaling link such that multiple passbands separated by the frequency-interval are established to enable conveyance of the multi-band transmission signal on the signaling link. | 02-10-2011 |
20110119425 | DETACHABLE INTERCONNECT FOR CONFIGURABLE WIDTH MEMORY SYSTEM - The disclosure relates to a detachable signalling interconnect apparatus that provides connectivity between two or more components of a memory system in conjunction with different modes of operation of the components. The memory system comprises: a first socket to receive a first memory module; a second socket to receive a second memory module; a detachable signal-interconnect; and a memory controller coupled to the detachable signal-interconnect and configured to define a first mode of operation and a second mode of operation, wherein in the first mode of operation the detachable signal-interconnect is to couple the memory-controller to the first memory module and in the second mode of operation the detachable signal-interconnect is to couple the memory controller to the first memory module and the second memory module. | 05-19-2011 |
20110314200 | BALANCED ON-DIE TERMINATION - Termination of a high-speed signaling link is effected by simultaneously engaging on-die termination structures within multiple integrated-circuit memory devices disposed on the same memory module, and/or within the same integrated-circuit package, and coupled to the high-speed signaling link. | 12-22-2011 |
20130258755 | INTEGRATED CIRCUIT DEVICE HAVING PROGRAMMABLE INPUT CAPACITANCE - An embodiment is directed to an integrated circuit device having programmable input capacitance. For example, a programmable register of a memory device may store a value representative of an adjustment to the input capacitance value of a control pin. An embodiment is directed to controlling the skew of a synchronous memory system by allowing programmability of the lighter loaded pins in order to increase their load to match the more heavily loaded pins. By matching lighter loaded pins to more heavily loaded pins, the system exhibits improved synchronization of propagation delays of the control and address pins. In addition, an embodiment provides the ability to vary the loading depending on how many ranks are on the device. | 10-03-2013 |
20130314968 | OFFSETTING CLOCK PACKAGE PINS IN A CLAMSHELL TOPOLOGY TO IMPROVE SIGNAL INTEGRITY - The disclosed embodiments relate to the design of a memory system which includes a set of one or more memory modules, wherein each memory module in the set has a clamshell configuration, wherein pairs of opposing memory packages containing memory chips are located on opposite sides of the memory module. The memory system also includes a multi-drop path containing signal lines which pass through the set of memory modules, and are coupled to memory packages in the set of memory modules. For a given signal line in the multi-drop path, a first memory package and a second memory package that comprise a given pair of opposing memory packages are coupled to the given signal line at a first location and a second location, respectively, wherein the first location and the second location are separated from each other by a distance d | 11-28-2013 |
20140237152 | Folded Memory Modules - A memory module comprises a data interface including a plurality of data lines and a plurality of configurable switches coupled between the data interface and a data path to one or more memories. The effective width of the memory module can be configured by enabling or disabling different subsets of the configurable switches. The configurable switches may be controlled by manual switches, by a buffer on the memory module, by an external memory controller, or by the memories on the memory module. | 08-21-2014 |
20140347092 | MODULATED ON-DIE TERMINATION - Alternating on-die termination impedances are applied within an integrated circuit device to up-convert signal reflections to higher frequencies that are attenuated by the signaling channel as the reflections propagate toward an intended signal receiver. Through this approach, the disruptive effect of reflected signals may be significantly reduced with relatively little overhead within the interconnected integrated circuit devices and little or no change to the printed circuit board or other interconnect medium. Changes to the printed circuit board or other interconnect medium can be made to further increase attenuation over the frequency band of the up-converted reflection and outside of the transmission band of signals of interest. | 11-27-2014 |
Ravindranath T. Kollipara, Fremont, CA US
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20120001670 | Clock Routing in Mulitiple Channel Modules and Bus Systems - The terminating module includes integrated circuits and a termination circuit which receive clock signals from the integrated circuit. The integrated circuit includes at least one memory integrated circuit mounted on a printed circuit board. An electrical connector is configured to couple the terminating module to a motherboard. Additionally, the termination circuit includes a resistor. In another embodiment, the terminating module provides a printed circuit board, a memory integrated circuit mounted on the circuit board, a terminator circuit which includes a resistor, and an electrical connector. The electrical connector couples the terminating module to a motherboard. | 01-05-2012 |
Sashidar Kollipara, Newton, MA US
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20150087885 | Method and Apparatus for Measuring, Verifying, and Displaying Progress of Dose Delivery in Scanned Beam Particle Therapy - The present disclosure is directed to systems and methods for real-time control of a charged particle pencil beam system during therapeutic treatment of a patient. In an aspect, the present disclosure is directed to measuring an actual shape, an actual intensity distribution, and an actual location at isocenter of the charged particle pencil beam. The actual data is compared to model treatment data in real time to determine if a statistically significant variance occurs in which case the charged particle pencil beam can be stopped mid-treatment for correction and/or analysis. | 03-26-2015 |
Siva Kollipara, Sunnyvale, CA US
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20140204939 | METHOD TO SETUP PROTOCOL INDEPENDENT MULTICAST TREES IN THE PRESENCE OF UNIDIRECTIONAL TUNNELS - Embodiments of the invention are directed to establishing a PIM tree to a source that is reachable over a unicast tunnel in a packet switched network. Advantageously, a Reverse Path Forwarding (RPF) Vector TLV to establish a PIM tree may be used in cases where there is an absence of source reachability in the core of a network. | 07-24-2014 |
Siva Kollipara, Mountain View, CA US
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20140169366 | SYSTEM, METHOD AND APPARATUS TO RESOLVE RPF-VECTOR ATTRIBUTE CONFLICTS - Systems, methods and apparatus to resolve join packet RPF vector attribute conflicts in a network by adding an identified proxy to a proxy list, the proxy being valid if it is reachable and if a valid PIM adjacency exists on one of the next route hops, and selecting one of multiple valid proxies within the proxy list according to a hierarchy of selection mechanisms. | 06-19-2014 |
20140241351 | DYNAMIC DETERMINATION OF THE ROOT NODE OF AN MLDP TUNNEL - A capability is provided for dynamically determining the root node of a Multicast Label Distribution Protocol (MLDP) tunnel. A request to join a multicast group is received, where the multicast group is supported by a multicast source. A route to the multicast source is determined. A next-hop node associated with the route and a routing protocol used to advertise the route to the next-hop node are determined based on the route. An advertising node that used the routing protocol to advertise the route to the next-hop node is determined based on the routing protocol and the next-hop node. The advertising router is the root of the MLDP tunnel. | 08-28-2014 |
20140241352 | DYNAMIC ADJUSTMENT OF MLDP TUNNEL AND PIM BINDING - A capability is provided for modifying association of a Multicast Label Distribution Protocol (MLDP) tunnel with Protocol Independent Multicast (PIM). Information associated with a multicast source and multicast group (multicast SG) is received. The multicast SG is associated with an MLDP tunnel. Association of the MLDP tunnel with an outgoing interface list of the multicast SG is modified by faking an Internet Group Management Protocol (IGMP) local membership operation for the multicast SG on the MLDP tunnel. Modifying association of the MLDP tunnel with the outgoing interface list of the multicast SG includes adding the MLDP tunnel to the outgoing interface list of the multicast SG by faking an IGMP local membership join for the multicast SG on the MLDP tunnel or removing the MLDP tunnel from the outgoing interface list of the multicast SG by faking an IGMP local membership prune for the multicast SG on the MLDP tunnel. | 08-28-2014 |
Sri Ganesh Prasad Kollipara, Schaumburg, IL US
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20140148096 | CREATING SMART NFC POSTERS - Systems, methods, devices, and computer programming products for making and writing data to NFC-enabled “smart” posters, and posters made in accordance therewith. | 05-29-2014 |