Patent application number | Description | Published |
20080205128 | PHASE CHANGE MEMORY DEVICE - A phase change memory device has a memory cell that uses a phase change film as a storage element, and includes: a first phase change region formed on a side of one face of the phase change film; and a second phase change region formed on a side of another face of the phase change film in a position that corresponds to the first phase change region, wherein the phase change memory stores two-bit data using combinations of a high resistance state due to amorphization and a low resistance state due to crystallization in the first phase change region with the high resistance state and the low resistance state in the second phase change region, the resistance value of the low resistance state being lower than that of the high resistance state. | 08-28-2008 |
20080316806 | Phase change memory device - A phase change memory device comprises: a phase change element for rewritably storing data by changing a resistance state; a memory cell arranged at an intersection of a word line and a bit line and formed of the phase change element and a diode connected in series; a select transistor formed in a diffusion layer below the memory cell, for selectively controlling electric connection between an anode of the diode and a ground line in response to a potential of the word line connected to a gate; and a precharge circuit for precharging the diffusion layer below the memory cell corresponding to a non-selected word line to a predetermined voltage and for disconnecting the diffusion layer below the memory cell corresponding to a selected word line from the predetermined voltage. | 12-25-2008 |
20090052233 | SEMICONDUCTOR MEMORY DEVICE AND WRITING CONTROL METHOD THEREOF - A semiconductor memory device includes: a plurality of write control circuits; a plurality of memory cells grouped in the write control circuits; a plurality of write drivers that write data to a corresponding memory cell when the write control circuit is activated; and a main control circuit that causes the write control circuits to become active in response to presence of a data writing request to the memory cells belonging to a predetermined group and subsequent absence of the data writing request to the memory cells belonging to the same group within a predetermined period. | 02-26-2009 |
20090052234 | Phase-change random access memory device and semiconductor memory device - A semiconductor memory device includes: first and second wiring layers extending in substantially parallel to each other in a first direction; a first semiconductor region formed in a part of a portion between the first and second wiring layers; a second semiconductor region formed on an opposite side to the first semiconductor region with respect to the second wiring layer and making a pair with the first semiconductor region; a third semiconductor region formed in another part of the portion between the first and second wiring layers; a fourth semiconductor region formed on an opposite side to the third semiconductor region with respect to the first wiring layer and making a pair with the third semiconductor region; a third wiring layer extending in a second direction that crosses the first direction and having an electrical contact with the first semiconductor region; a fourth wiring layer extending in the second direction and having an electrical contact with the fourth semiconductor region; a fifth wiring layer extending in the first direction to cross over the first and third semiconductor regions; a sixth wiring layer extending in the first direction in substantially parallel to the fifth wiring layer to cross over the second semiconductor region; seventh wiring layers extending in the second direction in substantially parallel to one another, each of the seventh wiring layers intersecting each of the fifth and sixth wiring layers; first memory elements each disposed at an intersection of an associated one of the seventh wiring layers and the fifth wiring layer; and second memory elements each disposed at an intersection of an associated one of the seventh wiring layers and the sixth wiring layer. | 02-26-2009 |
20100124104 | Memory device and writing method thereof - A write amplifier for driving a bit line connected to a selected phase change memory cell drives the bit line with a first current driving capability and then drives the bit line with a second current driving capability lower than the first current driving capability. | 05-20-2010 |
20100135063 | SEMICONDUCTOR DEVICE INCLUDING BIT LINE GROUPS - A semiconductor device includes: a first read/write amplifier; a second read/write amplifier; a first group of bit lines belonging to the first read/write amplifier; a second group of bit lines belonging to the second read/write amplifier and mixed with the first group of bit lines. One of the first group of bit lines and one of the second group of bit lines are selected in parallel. A reference potential is supplied to at least one of the first non-selected bit lines adjacent to the first selected bit line selected from the first group of bit lines, and to at least one of the second non-selected bit lines adjacent to the second selected bit line selected from the first group of bit lines. At least one of remaining ones of the first and second non-selected bit lines is set into a floating state. | 06-03-2010 |
20100182829 | SEMICONDUCTOR MEMORY DEVICE - To provide a plurality of write amplifiers that perform a data write operation upon memory cells and a write control circuit that controls a timing of a data write operation performed by the write amplifiers. When a data write operation using another write amplifier is requested while a data write operation using a predetermined write amplifier is performed, the write control circuit suspends the data write operation using the predetermined write amplifier. The suspended data write operation is performed again simultaneously with the data write operation using the other write amplifier. Accordingly, random column access like that of a DRAM can be realized by simple control. | 07-22-2010 |
20130242641 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a plurality of variable resistance memory cells; a plurality of bit lines each of which is connected to one end of each of the plurality of variable resistance memory cells; a common source line that is connected to the other ends of the plurality of variable resistance memory cells in common; a source line driver that supplies a potential to the common source line; and a controller that variably controls a current supplied to the common source line by the source line driver. | 09-19-2013 |
20140092679 | MEMORY DEVICE AND WRITING METHOD THEREOF - A write amplifier for driving a bit line connected to a selected phase change memory cell drives the bit line with a first current driving capability and then drives the bit line with a second current driving capability lower than the first current driving capability. | 04-03-2014 |