Patent application number | Description | Published |
20090316491 | NON-VOLATILE MEMORY DEVICES AND METHODS OF ERASING NON-VOLATILE MEMORY DEVICES - In one embodiment, an erase method for a memory including a memory array having at least first and second programmable transistors connected in series, includes restricting flow of electrons from the first programmable transistor into the second programmable transistor during an erase operation. | 12-24-2009 |
20100039861 | NONVOLATILE MEMORY DEVICE AND READ METHOD - Disclosed is a nonvolatile memory including a memory cell array including a first cell string connected between a first bit line and a first common source line, and a second cell string a second common source line and a second bit line adjacent to the first bit line. The nonvolatile memory also includes a control logic circuit configured to independently control the first and second common source lines. | 02-18-2010 |
20100124120 | NONVOLATILE MEMORY DEVICE - A nonvolatile memory device includes; a memory cell array including a plurality of memory cells arranged in word lines and bit lines, a high-voltage generator generating a program voltage pulse applied to a selected word line among the word lines, and a pass voltage applied to a non-selected word line, and control logic iteratively increasing the program voltage pulse and adjusting the pass voltage according to a defined increment during a program operation. | 05-20-2010 |
20100128532 | NONVOLATILE MEMORY DEVICE AND PROGRAMMING METHOD - A nonvolatile memory device includes; a memory cell array configured into a plurality of memory blocks, a decoder connected to the plurality of memory blocks via a word line, a page buffer connected to the plurality of memory blocks via a bit line, and control logic configured to define a control voltage applied to at least one of the word line and the bit line during a program/verify operation in accordance with a location of each one of the plurality of memory blocks within the memory cell array. | 05-27-2010 |
20100202211 | NONVOLATILE MEMORY DEVICE AND METHOD FOR PROGRAMMING THE SAME - Provided are a nonvolatile memory device and a method for programming the same. The method for programming the nonvolatile memory device includes programming at least one memory cell of the nonvolatile memory device by repeating program loops. A first self-boosting method is applied to at least one of the program loops and a second self-boosting method, different from the first self-boosting method, is applied to at least one other of the program loops. | 08-12-2010 |
20100202215 | Methods for Programming Nonvolatile Memory Devices - Provided is a method for programming a nonvolatile memory device. The nonvolatile memory device includes a local word line to divide a memory cell string into a first area including a selected word line and a second area not including the selected word line. In the method, word lines of the first area are driven by a first pass voltage and word lines of the second area driven by a second pass voltage higher than the first pass voltage. A cell transistor corresponding to the local word line is turned off after the first pass voltage and the second pass voltage are applied. The selected word line is driven by a program voltage after the cell transistor is turned off. | 08-12-2010 |
20100293393 | Memory Controller, Memory System Including the Same, and Method for Operating the Same - A memory controller includes a first interface unit, a processor, a randomization unit, a state conversion unit, and a second interface unit. The first interface unit exchanges data with an external device, and the processor determines whether to randomize or state-convert the received data. The randomization unit randomizes data received through the first interface unit in response to the processor and generates randomization information in response to the randomization operation. The state conversion unit state-converts data received through the first interface unit in response to the processor and generates conversion information in response to the state conversion operation. The second interface unit receives the randomized data and the randomization information from the randomization unit, receives the state-converted data and the conversion information from the state conversion unit, and exchanges at least one of the randomized data, the randomization information, the state-converted data and the conversion information with a memory. | 11-18-2010 |
20100315876 | MEMORY DEVICES AND OPERATIONS THEREOF USING PROGRAM STATE DETERMINATION BASED ON DATA VALUE DISTRIBUTION - In a memory device, a proportion of at least one cell state in a unit of the memory is determined. A program state of the unit of the memory is determined based on the determined proportion of the at least one cell state. Determining a proportion of at least one cell state in a unit of the memory may be preceded by processing data to be stored in the unit of the memory according to a data value distribution function to produce transformed data having data values conforming to a predetermined distribution and storing the transformed data in the unit of the memory. The distribution function may be configured, for example, to provide a uniform distribution of data values in the unit of the memory. | 12-16-2010 |
20110007571 | NONVOLATILE MEMORY DEVICES AND PROGRAM METHODS THEREOF IN WHICH A TARGET VERIFY OPERATION AND A PRE-PASS VERIFY OPERATION ARE PERFORMED SIMULTANEOUSLY USING A COMMON VERIFY VOLTAGE - Provided are nonvolatile memory devices and program methods thereof. A nonvolatile memory device provides a program voltage to a selected word line and performs a program verify operation. The nonvolatile memory device controls a bit line voltage of the next program loop according to the program verification result. In the program verification operation, a target verify voltage is used as a pre-verify voltage. The nonvolatile memory device controls the bit line voltage of the next program loop according to the program verification result, thus making it possible to reduce the threshold voltage distribution of a memory cell. Also, the nonvolatile memory device uses the target verify voltage as the pre-verify voltage, thus making it possible to increase the program verification speed. | 01-13-2011 |
20110075478 | NONVOLATILE MEMORY DEVICE AND SYSTEM, AND METHOD OF PROGRAMMING A NONVOLATILE MEMORY DEVICE - A nonvolatile memory includes a plurality of N-bit multi-level cell (MLC) memory cells and a controller. The plurality of N-bit MLC memory cells are for storing N pages of data, each of the MLC memory cells programmable into any one of 2 | 03-31-2011 |
20110080791 | NONVOLATILE MEMORY DEVICE AND RELATED METHOD OF OPERATION - A method of programming a nonvolatile memory device comprises programming memory cells by performing a plurality of program loops with bitline precharging inactivated during program verification operations of some of the program loops, and with bitline precharging activated during program verification operations of some of the program loops. | 04-07-2011 |
20110222342 | DATA STORAGE SYSTEM HAVING MULTI-BIT MEMORY DEVICE AND OPERATING METHOD THEREOF - A data storage device includes a non-volatile memory device which includes a memory cell array; and a memory controller which includes a buffer memory and which controls the non-volatile memory device. The operating method of the data storage device includes storing data in the buffer memory according to an external request, and determining whether the data stored in the buffer memory is data accompanying a buffer program operation of the memory cell array. When the data stored in the buffer memory is data accompanying the buffer program operation, the method further includes determining whether a main program operation on the memory cell array is required, and when a main program operation on the memory cell array is required, determining a program pattern of the main program operation on the memory cell array. The method further includes issuing a set of commands for the main program operation on the memory cell array to the multi-bit memory device based on the determined program pattern. | 09-15-2011 |
20110280067 | NONVOLATILE MEMORY DEVICE, MEMORY SYSTEM HAVING THE SAME AND PROGRAMMING METHOD THEREOF - A non-volatile memory device which includes a sensing mode selector configured to select a sensing mode according to environment information. A page buffer senses a data state of a memory cell in one of a plurality of sensing methods, depending upon the selected sensing mode. | 11-17-2011 |
20120155168 | NEGATIVE VOLTAGE GENERATOR, DECODER, NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM USING NEGATIVE VOLTAGE - A negative voltage generator includes a direct current voltage generator configured to generate a direct current voltage, a reference voltage generator configured to generate a reference voltage, an oscillator configured to generate an oscillation clock, a charge pump configured to generate a negative voltage in response to a pump clock, and a voltage detector. The voltage detector is configured to detect the negative voltage by comparing a division voltage, obtained by voltage dividing the direct current voltage, with the reference voltage, and to generate the pump clock corresponding to the detected negative voltage based on the oscillation clock. | 06-21-2012 |
20120218828 | Methods for Programming Nonvolatile Memory Devices - Provided is a method for programming a nonvolatile memory device. The nonvolatile memory device includes a local word line to divide a memory cell string into a first area including a selected word line and a second area not including the selected word line. In the method, word lines of the first area are driven by a first pass voltage and word lines of the second area driven by a second pass voltage higher than the first pass voltage. A cell transistor corresponding to the local word line is turned off after the first pass voltage and the second pass voltage are applied. The selected word line is driven by a program voltage after the cell transistor is turned off. | 08-30-2012 |
20120230104 | NON-VOLATILE MEMORY DEVICE AND READ METHOD THEREOF - Disclosed is a non-volatile memory device which includes a memory cell array having memory cells arranged in rows and columns, a page buffer circuit configured to read data from the memory cell array, and a control logic and input/output interface block including a normal read scheduler controlling a normal read operation and a data recover read scheduler controlling a data recover read operation and configured to control the page buffer circuit at a read request. One of the normal read scheduler and the data recover read scheduler is selected according to selection information provided from an external device. | 09-13-2012 |
20120269002 | PROGRAMMING METHOD FOR NONVOLATILE MEMORY DEVICE - A method of programming memory cells (transistors) of a nonvolatile memory device from a first set of (previous) logic states to a second set of (final) logic states. The method includes applying program voltages to selected memory transistors; and applying a pre-verification voltage and a target verification voltage for verifying the current logic state of the selected memory transistors. The voltage interval between logic states of the second set of logic states is less than the voltage interval between logic states of the first set of logic states. A target verification voltage for verifying a first memory transistor is at one logic state of the second set is used as a pre-verification voltage for verifying that a second memory transistor to be programmed to higher logic state of the second set. | 10-25-2012 |
20120290897 | DATA STORAGE SYSTEM HAVING MULTI-BIT MEMORY DEVICE AND ON-CHIP BUFFER PROGRAM METHOD THEREOF - A data storage device includes a multi-bit memory device including a memory cell array, the memory cell array including a first memory region and a second memory region, and a memory controller including a buffer memory and configured to control the multi-bit memory device. The memory controller is configured to control the multi-bit memory device to execute a buffer program operation in which data stored in the buffer memory is stored in the first memory region, and to control the multi-bit memory device to execute a main program operation in which the data stored in the first memory region is stored in the second memory region. The memory controller is further configured to generate parity data based upon the data stored to the first region, the parity data being copied from the first memory region to the second memory region via the main program operation. | 11-15-2012 |
20120314500 | NONVOLATILE MEMORY DEVICES AND METHODS OF PROGRAMMING NONVOLATILE MEMORY DEVICES - A nonvolatile memory device includes a memory cell array, a page buffer unit which output a verify-read result, a reference current generating unit which generates a reference current signal, a page buffer decoding unit which outputs currents according to the verify-read result. The nonvolatile memory device further includes an analog bit counting unit which counts the currents, a digital adding unit which calculates an accumulated sum of the counting result, a pass/fail checking unit which outputs a pass signal or fail signal according to the calculation result, and a control unit controlling a program operation. | 12-13-2012 |
20120324178 | DATA STORAGE SYSTEM HAVING MULTI-BIT MEMORY DEVICE AND ON-CHIP BUFFER PROGRAM METHOD THEREOF - Disclosed is an on-chip buffer program method for a data storage device which comprises a multi-bit memory device and a memory controller. The on-chip buffer program method includes measuring a performance of the data storage device, judging whether the measured performance satisfies a target performance of the data storage device, and selecting one of a plurality of scheduling manners as an on-chip buffer program scheduling manner of the data storage device according to the judgment result. | 12-20-2012 |
20120327711 | NONVOLATILE MEMORY DEVICE, MEMORY SYSTEM COMPRISING SAME, AND METHOD OF OPERATING SAME - A method of operating a nonvolatile memory device comprises receiving a read command from a memory controller, determining a read mode of the nonvolatile memory device, selecting a read voltage based on the read mode, and performing a read operation on memory cells of a selected page of the nonvolatile memory device using the selected read voltage. | 12-27-2012 |
20130117620 | MEMORY SYSTEM AND OPERATING METHOD THEREOF - A memory system includes a nonvolatile memory device and a memory controller configured to control the nonvolatile memory device and configured to provide the nonvolatile memory device with error flag information including error location information of an error of data read from the nonvolatile memory device. | 05-09-2013 |
20130117634 | MEMORY SYSTEM AND DATA STORAGE METHOD - A memory system comprises a nonvolatile memory device comprising a memory cell array comprising first and second memory blocks, and a memory controller configured to control the nonvolatile memory device to read data from the first memory block, selectively determine an error correction operation to be performed on the data after it is read from the first memory block based on a state of at least one of the first and second memory blocks, and then store the data in the second memory block. | 05-09-2013 |
20130128671 | FLASH MEMORY DEVICE AND PROGRAM METHOD - Disclosed is a flash memory device and programming method that includes; receiving buffer data and determining between a high-speed mode and a reliability mode for buffer data, and upon determining the reliability mode storing the buffer data in a first buffer region, and upon determining the high-speed mode storing the buffer data in a second buffer region. The memory cell array of the flash memory including a main region and a separately designated buffer region divided into the first buffer region and second buffer region. | 05-23-2013 |
20130141972 | DATA STORAGE SYSTEM HAVING MULTI-BIT MEMORY DEVICE AND OPERATING METHOD THEREOF - A data storage device includes a non-volatile memory device which includes a memory cell array; and a memory controller which includes a buffer memory and which controls the non-volatile memory device. The operating method of the data storage device includes storing data in the buffer memory according to an external request, and determining whether the data stored in the buffer memory is data accompanying a buffer program operation of the memory cell array. When the data stored in the buffer memory is data accompanying the buffer program operation, the method further includes determining whether a main program operation on the memory cell array is required, and when a main program operation on the memory cell array is required, determining a program pattern of the main program operation on the memory cell array. The method further includes issuing a set of commands for the main program operation on the memory cell array to the multi-bit memory device based on the determined program pattern. | 06-06-2013 |
20130145234 | Memory Systems and Block Copy Methods Thereof - Methods of operating memory systems and nonvolatile memory devices include performing error checking and correction (ECC) operations on M pages of data read from a first “source” portion of M-bit nonvolatile memory cells within the nonvolatile memory device to thereby generate M pages of ECC-processed data, where M is a positive integer greater than two (2). A second “target” portion of M-bit nonvolatile memory cells within the nonvolatile memory device is then programmed with the M pages of ECC-processed data using an address-scrambled reprogramming technique, for example. | 06-06-2013 |
20130219109 | MEMORY SYSTEM AND PROGRAM METHOD THEREOF - A memory system includes a nonvolatile memory device having a first data area storing M-bit data using a buffer program operation and a second data area storing N-bit data (N being an integer larger than M) using a main program operation and a memory controller configured to control the nonvolatile memory device. When a main program operation using data stored at the first and second data areas is required, the memory controller calculates values indicating a performance of the required main program operation to be executed according to a plurality of main program manners, selects one of the plurality of main program manners based on the calculated values, and controls the nonvolatile memory device to perform the required main program operation according to the selected main program manner. | 08-22-2013 |
20130279250 | NONVOLATILE MEMORY DEVICE WITH FLAG CELLS AND USER DEVICE INCLUDING THE SAME - A nonvolatile memory device includes a flag cell configured to store flag information, a plurality of dummy cells adjacent to the flag cell, and program control logic configured to control a program operation on the flag cell and a dummy program operation on the plurality of dummy cells. When the program operation on the flag cell is performed, the program control logic performs the dummy program operation on at least one of the plurality of dummy cells. | 10-24-2013 |
20130336071 | NONVOLATILE MEMORY DEVICE AND METHOD OF IMPROVING A PROGRAM EFFICIENCY THEREOF - A nonvolatile memory device includes a memory cell array including a plurality of memory cells, a page buffer circuit connected with the memory cell array via a plurality of bit lines and configured to selectively pre-charge the plurality of bit lines, and control logic configured to control the page buffer circuit such that a pre-charge voltage is applied to selected bit lines of the plurality of bit lines during a first time at a read operation and such that a pre-charge voltage is applied to selected bit lines of the plurality of bit lines during a second time different from the first time at a verification read operation. The second time is determined on the basis of the number of selected bit lines of the plurality of bit lines at the verification read operation. | 12-19-2013 |
20140025866 | NONVOLATILE MEMORY DEVICE AND OPERATING METHOD - A method of programming data in a nonvolatile memory via a first memory cell group and a second memory cell group in a page of memory cells includes; executing a first program operation that programs the first memory cell group with a first program voltage that is stepwise adjusted by a first increment over successive programming loop iterations, and thereafter executing a second program operation that programs the second memory cell with a second program voltage that is stepwise adjusted by a second increment over successive programming loop iterations, wherein the first program voltage is different from the second program voltage. | 01-23-2014 |
20140032824 | Memory Controller, Memory System Including the Same, and Method for Operating the Same - A memory controller includes a first interface unit, a processor, a randomization unit, a state conversion unit, and a second interface unit. The first interface unit exchanges data with an external device, and the processor determines whether to randomize or state-convert the received data. The randomization unit randomizes data received through the first interface unit in response to the processor and generates randomization information in response to the randomization operation. The state conversion unit state-converts data received through the first interface unit in response to the processor and generates conversion information in response to the state conversion operation. The second interface unit receives the randomized data and the randomization information from the randomization unit, receives the state-converted data and the conversion information from the state conversion unit, and exchanges at least one of the randomized data, the randomization information, the state-converted data and the conversion information with a memory. | 01-30-2014 |
20140153330 | METHOD FOR OPERATING NON-VOLATILE MEMORY DEVICE AND MEMORY CONTROLLER - An operating method for a non-volatile memory device includes applying first and second read voltages to a first word line to perform a read operation; counting first memory cells each having a threshold voltage belonging to a first voltage range between the first read voltage and the second read voltage; applying a third read voltage to the first word line sequentially after applying the second read voltage to count second memory cells each having a second threshold voltage belonging to a voltage range between the second read voltage and the third read voltage; comparing the number of first memory cells counted and the number of second memory cells counted; determining a fourth read voltage based on a result of the comparing; and applying the fourth read voltage to the first word line sequentially after applying the third read voltage. | 06-05-2014 |
20140153339 | NONVOLATILE MEMORY DEVICE HAVING SELECTABLE SENSING MODES, MEMORY SYSTEM HAVING THE SAME AND PROGRAMMING METHOD THEREOF - A non-volatile memory device which includes a sensing mode selector configured to select a sensing mode according to environment information. A page buffer senses a data state of a memory cell in one of a plurality of sensing methods, depending upon the selected sensing mode. | 06-05-2014 |
20140219020 | MEMORY SYSTEM COMPRISING NONVOLATILE MEMORY DEVICE AND PROGRAM METHOD THEREOF - A memory system includes a nonvolatile memory device, and a memory controller configured to control the nonvolatile memory device such that memory cells connected with a selected row of the nonvolatile memory device are programmed by one of a first program mode and a second program mode. At the first program mode, a plurality of logical pages corresponding in number to a maximum page number is stored at the memory cells, and at the second program mode, one or more logical pages the number of which is less than the maximum page number are stored at the memory cells using a bias condition that is different from that used in the first program mode. | 08-07-2014 |
20140233316 | MEMORY SYSTEM AND PROGRAMMING METHOD THEREOF - A program method of a nonvolatile memory device is provided, which includes programming a memory cell in one string selected from a plurality of vertical strings; determining whether a mode of operation of the nonvolatile memory device is a pre-pulse mode; when the mode of operation is determined to be the pre-pulse mode, applying a pre-pulse having a predetermined level to a string selection line connected with a gate of a string selection transistor of at least one unselected vertical string of the plurality of vertical strings for a particular time period; and performing a verification operation on the programmed memory cell. | 08-21-2014 |
20140293693 | MEMORY SYSTEM AND DRIVING METHOD THEREOF - A driving method of a nonvolatile memory device includes receiving a program command and an address. The method includes changing a number of adjacent zones of a plurality of zones formed of unselected word lines according to a location of a selected word line corresponding to the received address. The method further includes applying different zone voltages to the number of adjacent zones and remaining zones. The nonvolatile memory device includes a plurality of strings formed to penetrate word lines stacked on a substrate in a plate shape. | 10-02-2014 |
20140310448 | METHOD OF OPERATING MEMORY CONTROLLER AND DATA STORAGE DEVICE INCLUDING MEMORY CONTROLLER - In one embodiment, the method includes determining, at the memory controller, a status of a selected page of memory based on a program/erase cycle count for a block of the memory. The block of the memory includes the selected page. The program/erase cycle count indicates a number of times the block has been erased. The status is selected from a plurality of status states. The status states include a normal state, a weak state and a bad state. | 10-16-2014 |
20140313824 | DATA STORAGE SYSTEM HAVING MULTI-BIT MEMORY DEVICE AND OPERATING METHOD THEREOF - A data storage device includes a non-volatile memory device which includes a memory cell array; and a memory controller which includes a buffer memory. The operating method of the data storage device includes storing data in the buffer memory, and determining whether the data stored in the buffer memory is data accompanying a buffer program operation of the memory cell array. When the data stored in the buffer memory is data accompanying the buffer program operation, the method further includes determining whether a main program operation on the memory cell array is required, and when a main program operation on the memory cell array is required, determining a program pattern of the main program operation on the memory cell array. The method further includes issuing a set of commands for the main program operation on the memory cell array to the multi-bit memory device based on the program pattern. | 10-23-2014 |
20140334232 | 3D FLASH MEMORY DEVICE HAVING DIFFERENT DUMMY WORD LINES AND DATA STORAGE DEVICES INCLUDING SAME - A three-dimensional (3D) flash memory includes a first dummy word line disposed between a ground select line and a lowermost main word line, and a second dummy word line of different word line configuration disposed between a string select line and an upper most main word line. | 11-13-2014 |
20140347927 | NONVOLATILE MEMORY DEVICE HAVING SPLIT GROUND SELECTION LINE STRUCTURES - A nonvolatile memory device comprises a plurality of vertical NAND flash memory cells arranged in a three dimensional (3D) structure, a first memory block disposed in the 3D structure and having memory cells selected by a first ground selection line and a second ground selection line, wherein the first and second ground selection lines are electrically separated from each other, a second memory block disposed in the 3D structure and having memory cells selected by a third selection line and fourth selection line, wherein the third and fourth ground selection lines are electrically separated from each other, and a pass transistor that transfers a driving signal to turn on ground selection transistors respectively connected to the first and third ground selection lines in response to a block selection signal. | 11-27-2014 |
20140376312 | NONVOLATILE MEMORY DEVICES AND METHODS OF PROGRAMMING NONVOLATILE MEMORY DEVICES - A nonvolatile memory device includes a memory cell array, a page buffer unit which output a verify-read result, a reference current generating unit which generates a reference current signal, a page buffer decoding unit which outputs currents according to the verify-read result. The nonvolatile memory device further includes an analog bit counting unit which counts the currents, a digital adding unit which calculates an accumulated sum of the counting result, a pass/fail checking unit which outputs a pass signal or fail signal according to the calculation result, and a control unit controlling a program operation. | 12-25-2014 |
20150036426 | NONVOLATILE MEMORY DEVICE AND METHOD OF PROGRAM VERIFYING THE SAME - A program method of a three-dimensional nonvolatile memory device is provided which includes executing at least one program loop including an operation of programming selected memory cells of a selected string turned on by a selected string selection transistor and an operation of verifying whether programming of the memory cells is passed; and applying a negative counter voltage to a selected word line connected to the selected memory cells of the selected string at least once during an interval of the verify operation where there are turned on string selection transistors of unselected strings connected through the same bit line as that of the selected string. | 02-05-2015 |
20150049545 | NONVOLATILE MEMORY DEVICE, MEMORY SYSTEM COMPRISING SAME, AND METHOD OF PROGRAMMING SAME - A method of programming a nonvolatile memory device comprises performing an N-th program loop based on state data stored in data latches according to a default state ordering, determining whether conversion of the default state ordering is required according to a predetermined criterion, as a consequence of determining that conversion of the default state ordering is required, converting all or part of the state data stored in the data latches from the default state ordering to another state ordering, and performing a (N+1)th program loop based on the converted state data. | 02-19-2015 |
20150078095 | NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATION - A nonvolatile memory device includes a voltage generator that sequentially provides a first setup voltage and second setup voltage to a word line of a memory cell array, and control logic including a time control unit that determines a word line setup time for the word line in relation to the second setup voltage based on a difference between the first and second setup voltages. | 03-19-2015 |
20150078098 | NONVOLATILE MEMORY DEVICE AND PROGRAM METHOD THEREOF - According to example embodiments of inventive concepts, a nonvolatile memory device includes at least two strings that are vertically stacked on a substrate and share one bit line. A program method of the nonvolatile memory device includes setting a pre-charge condition on the basis of a disturb environment between the at least two cell strings, pre-charging or not pre-charging an unselected cell string among the at least two cell strings in response to the pre-charge condition and programming memory cells in a selected cell string among the at least two cell strings. | 03-19-2015 |