Patent application number | Description | Published |
20150243887 | SEMICONDUCTOR MEMORY DEVICE AND A METHOD OF MANUFACTURING THE SAME - A semiconductor memory device comprises a memory cell array. The memory cell array comprises a plurality of first wiring lines, a plurality of second wiring lines extending crossing the first wiring lines, and a plurality of memory cells disposed at intersections of the first and second wiring lines. The memory cells are stacked in a direction perpendicular to a substrate, and each memory cell comprises a variable resistance element. The semiconductor memory device also includes a select transistor layer comprising a plurality of select transistors, each select transistor being operative to select any one of the first wiring lines or one of the second wiring lines. Two select transistors are connected to two different respective first wiring lines, stacked in a direction perpendicular to the substrate, and configured to share one gate electrode. | 08-27-2015 |
20150255508 | NON-VOLATILE MEMORY DEVICE - According to an embodiment, a nonvolatile memory device includes: a first interconnection layer extending in a first direction; a second interconnection layer extending in a second direction crossing the first direction, the second interconnection layer including a metal-containing layer and a metal ion source layer, and the metal ion source layer being provided on the first interconnection layer side; and a resistance change layer provided in a position where the first interconnection layer and the second interconnection layer cross each other and a metal ion released from the metal ion source layer being capable to be diffused into the resistance change layer. At least part of the second interconnection layer protrudes to the first interconnection layer side in a cross section of the second interconnection layer cut perpendicularly to the second direction. | 09-10-2015 |
20150262671 | NON-VOLATILE MEMORY DEVICE - A nonvolatile memory device according to an embodiment includes: a semiconductor substrate; a memory cell array unit provided on an upper side of the semiconductor substrate; an integrated circuit unit provided between the memory cell array unit and the semiconductor substrate; and a peripheral circuit unit provided on the semiconductor substrate. The integrated circuit unit includes: a first contact electrode electrically connected to one of plurality of first interconnection layers; a second contact electrode connected to the peripheral circuit unit; and a first switching element connected between the first contact electrode and the second contact electrode, and conduction between the first contact electrode and the second contact electrode being controlled by a control circuit unit provided in the peripheral circuit unit. | 09-17-2015 |
20160035416 | NONVOLATILE MEMORY DEVICE AND METHOD FOR DRIVING SAME - According to one embodiment, a nonvolatile memory device includes: a first interconnection layer; a second interconnection layer; an ion source provided between the first interconnection layer and the second interconnection layer; a resistance layer provided between the ion source and the first interconnection layer; and a control circuit writing multi-value data in the resistance layer by changing a setting voltage to be applied between the first interconnection layer and the second interconnection layer when performing a setting operation of writing data in the resistance layer, and the control circuit reading the multi-value data based on reading voltage to be applied between the first interconnection layer and the second interconnection layer when performing a reading operation of reading the multi-value data. | 02-04-2016 |
20160035420 | NONVOLATILE MEMORY DEVICE AND METHOD FOR CONTROLLING SAME - According to one embodiment, a device includes: word lines extending in a first direction, widths of the word lines in a second direction intersecting the first direction having a first width and a second width greater than the first width; bit lines provided above or under the word lines, the bit lines extending in the second direction, widths of the bit lines in the first direction having a third width and a forth width greater than the third width; storage elements; and a control circuit applying a potential for at least one of a plurality of non-selected word lines and a plurality of non-selected bit lines other than a selected word line and a selected bit line connected to a selected storage element, among the word lines and the bit lines, the potential applied thereto according to a width thereof. | 02-04-2016 |
20160043141 | MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A memory device according to one embodiment includes a substrate, a first wiring placed on the substrate and extending in a first direction, a second wiring placed on the first wiring and extending in a second direction, a memory element coupled the first wiring and the second wiring, an engagement member coupled a portion of the second wiring, the portion is displaced from a region directly above the first wiring, a via engaged with the engagement member, a stopper member placed in a region including a region directly below the engagement member, and an interlayer insulating film provided on the substrate and covering the first wiring, the second wiring, the memory element, the engagement member, the via, and the stopper member. | 02-11-2016 |
20160072060 | MEMORY DEVICE - A memory device according to an embodiment, includes a conductive member, a first interconnect, a second interconnect, a first memory element, a first connecting member, a first via and a first contact. The first interconnect is provided on the conductive member. The first interconnect extends in a first direction. The second interconnect is provided on the conductive member above or below the first interconnect. The second interconnect extends in a second direction crossing the first direction. The first memory element is connected between the first interconnect and the second interconnect. The first connecting member is made of the same material as the first interconnect. The first connecting member is separated from the first interconnect. The first via connects the second interconnect to the first connecting member. The first contact connects the first connecting member to the conductive member. | 03-10-2016 |
20160111641 | MEMORY DEVICE AND MANUFACTURING METHOD THEREFOR - According to one embodiment, a memory device includes a substrate, a conductive wire provided above the substrate to extend in a first direction and including an end portion decreases in width toward a distal end, and a contact connected to the conductive wire at least a side surface of the end portion. The end portion includes, in the contact, a first portion having a shortest distance from an outer peripheral surface of the contact and a second portion extending from the first portion and having a distance from the outer peripheral surface of the contact longer than the shortest distance. | 04-21-2016 |