Kierse
Oliver Kierse, County Clare IE
Patent application number | Description | Published |
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20090256216 | Wafer Level CSP Sensor - An electronics package has a wafer level chip scale package (WLCSP) die substrate containing electronic circuits. Through-silicon vias through the die substrate electrically connect the electronic circuits to the bottom surface of the die substrate. A package sensor is coupled to the die substrate for sensing an environmental parameter. A protective encapsulant layer covers the top surface of the die substrate. A sensor aperture over the package sensor provides access for the package sensor to the environmental parameter. | 10-15-2009 |
Oliver Kierse, Killaloe IE
Patent application number | Description | Published |
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20090218492 | Radiation sensor device and method - A radiation sensor device including an integrated circuit chip including a radiation sensor on a surface of the integrated chip, one or more electrical connections configured to connect between an active surface of the integrated circuit chip and a lead frame, a cap attached to said integrated circuit chip spaced from and covering said radiation sensor, the cap having a transparent portion defining a primary lens transparent to the radiation to be sensed, a secondary lens disposed in a recess proximate and spaced from said primary lens transparent to the radiation to be sensed, and an air gap between said primary lens and said secondary lens. | 09-03-2009 |
20110198741 | Integrated Circuit Package with Enlarged Die Paddle - An integrated circuit package system having a body with a top surface, a bottom surface, and a plurality of side surfaces has a leadframe and encapsulating material that encapsulates at least a portion of the leadframe. The leadframe and encapsulating material are part of the body. The leadframe has a die paddle for supporting a die, and a plurality of leads spaced from the die paddle. The encapsulating material thus also separates the die paddle from the plurality of leads. At least a first portion of the die paddle is exposed to the top surface, while at least a second portion of the die paddle is exposed to the bottom surface. | 08-18-2011 |
Oliver Kierse, Ballina IE
Patent application number | Description | Published |
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20080210013 | Sealed capacitive sensor - A sealed capacitive sensor includes a substrate having a diaphragm forming a first plate of a capacitor; a second fixed plate of the capacitor spaced from the diaphragm and defining a predetermined dielectric gap and a sealing medium connecting together the substrate and fixed plate in an integrated structure and hermetically sealing the gap. | 09-04-2008 |
Oliver J. Kierse, Killaloe IE
Patent application number | Description | Published |
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20130292793 | LOCALIZED STRAIN RELIEF FOR AN INTEGRATED CIRCUIT - An integrated circuit may include a semiconductor die having a trench formed in a surface of the semiconductor die. One or more circuit components may be formed on the surface of the semiconductor die. The trench can extend into the semiconductor die next to at least one circuit component. The trench may surround the circuit component partially or wholly. The trench may be filled with a material having a lower bulk modulus than the semiconductor die in which the trench is formed. | 11-07-2013 |
20140035113 | PACKAGING AND METHODS FOR PACKAGING - A packaged integrated device can include a die attach pad having a top surface and a bottom surface. A plurality of leads physically and electrically separated from the die attach pad can be positioned at least partially around the perimeter of the die attach pad. An integrated device die can be mounted on the top surface of the die attach pad. A package body can cover the integrated device die and at least part of the plurality of leads, and at least a portion of the bottom surface of each of the plurality of leads can be exposed through the package body. A plating layer can cover substantially the entire width of an etched lower portion of the outer end of each lead and at least the exposed portion of the bottom surface of each lead. | 02-06-2014 |
20140117473 | PACKAGES AND METHODS FOR PACKAGING - A three-dimensional printing technique can be used to form a microphone package. The microphone package can include a housing having a first side and a second side opposite the first side. A first electrical lead can be formed on an outer surface on the first side of the housing. A second electrical lead can be formed on an outer surface on the second side of the housing. The first electrical lead and the second electrical lead may be electrically shorted to one another. Further, vertical and horizontal conductors can be monolithically integrated within the housing. | 05-01-2014 |