Patent application number | Description | Published |
20080251287 | SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - A substrate includes a storage portion which is defined by a base for mounting a light emitting element and a wall portion standing up on and from the base. A package is structured such that the upper end of the wall portion so formed as to surround the periphery of the storage portion is connected to a cover to thereby seal a light emitting element. A seal structure is composed of an uneven portion formed on the lower surface side surface of the base, a close contact layer formed on the surface of the uneven portion, a power supply layer formed on the close contact layer, and an electrode layer formed on the surface of the power supply layer. The uneven portion includes a first recessed portion formed at a position spaced in the radial direction from the outer periphery of a through electrode or from the inner wall of a through hole, and a second recessed portion formed at a position spaced further outwardly from the first recessed portion. | 10-16-2008 |
20080290136 | SOLDER SUPPLYING METHOD - Amounts of a solder are controlled to supply onto the respective connection terminals with different opening diameters such that a difference between contents of a substance diffused from the connection terminals into the solder, which is present in the solder after reflow on the connection terminals with the different opening diameters becomes equal to or smaller than 0.2 wt %. | 11-27-2008 |
20080315367 | WIRING SUBSTRATE - There is provided a wiring substrate. The wiring substrate includes: a semiconductor substrate having a through hole; an insulating film provided to cover an upper surface, a lower surface and a first surface of the semiconductor substrate, the first surface corresponding to a side surface of the through hole; a through electrode provided in the through hole; a first wiring pattern disposed on an upper surface side of the semiconductor substrate and coupled to the through electrode; and a second wiring pattern disposed on a lower surface side of the semiconductor substrate and coupled to the through electrode. A first air gap is provided between the first wiring pattern and the insulating film formed on the upper surface, and a second air gap is provided between the second wiring pattern and the insulating film formed on the lower surface. | 12-25-2008 |
20090020889 | SEMICONDUCTOR APPARATUS AND MANUFACTURING METHOD THEREOF - A plurality of quadrilateral-shaped semiconductor elements are stacked on the one surface of a circuit substrate. A side surface wiring for making electrical connection between each of the electrode terminals of the semiconductor elements and a pad formed on the circuit substrate is formed by applying a conductive paste containing conductive particles. A metal wire whose one end is connected to the electrode terminal is extended along a tapered surface formed by cutting off an edge of the electrode terminal surface on which the electrode terminal is formed among edges formed along each of the sides of the semiconductor element. At least a part of the metal wire extended from each of the electrode terminals of the semiconductor elements to the tapered surface is electrically connected to the side surface wiring. | 01-22-2009 |
20090023247 | METHOD FOR FORMING SIDE WIRINGS - After plural semiconductor elements are stacked to form a stacked body P, side wirings are formed on the side surface of the stacked body P, thereby manufacturing a semiconductor apparatus in which the respective semiconductor elements are electrically connected to one another. In this case, as the semiconductor element, a semiconductor element | 01-22-2009 |
20090071882 | SPHERICAL BODY SORTER AND SPHERICAL BODY SORTING APPARATUS USING THE SAME, AND SPHERICAL BODY SORTING METHOD - A spherical body sorter for sorting spherical bodies having a predetermined diameter dimension is made by opening multiple concave parts in the side of one surface of a plate-shaped body made of single-crystal silicon. Each of the concave parts formed in the spherical body sorter is formed in the same shape and dimension. | 03-19-2009 |
20090081867 | METHOD OF MANUFACTURING SUBSTRATE - The present disclosure relates to a method of manufacturing a substrate. The method includes: (a) forming through holes by applying an anisotropic etching to a silicon substrate from a first surface of the silicon substrate; (b) forming a first insulating film to cover the first surface of the silicon substrate, surfaces of the silicon substrate exposed from the through holes, and a second surface of the silicon substrate opposite to the first surface; (c) forming an opening in a portion of the first insulating film provided on the second surface, the portion of the first insulating film corresponding to an area in which the through holes are formed; (d) etching the silicon substrate using the first insulating film provided on the second surface as a mask, thereby forming a cavity in the silicon substrate; and (e) removing the first insulating film. | 03-26-2009 |
20090085164 | WIRING BOARD - There is provided a wiring board. The wiring board includes: a semiconductor substrate having a through hole and covered with an insulating film; a through electrode formed in the through hole; a first wiring connected to one end of the through electrode; and a second wiring connected to the other end of the through electrode. The semiconductor substrate includes: a semiconductor element and a first guard ring formed to surround the through hole. The semiconductor element includes a first conductivity-type impurity diffusion layer having a different conductivity-type from that of the semiconductor substrate and is electrically connected to the first wiring and the second wiring. | 04-02-2009 |
20090090468 | FLIP-CHIP MOUNTING APPARATUS - A flip-chip mounting apparatus includes a variable-shape mirror | 04-09-2009 |
20090093117 | METHOD OF MANUFACTURING SUBSTRATE - A method of manufacturing a substrate, includes: (a) forming the through hole by etching the silicon substrate from a first surface of the silicon substrate by a Bosch process; (b) forming a thermal oxide film such that the thermal oxide film covers the first surface of the silicon substrate, a second surface of the silicon substrate opposite to the first surface, and a surface of the silicon substrate corresponding to a side surface of the through hole, by thermally oxidizing the silicon substrate where the through hole is formed; (c) removing the thermal oxide film; (d) forming an insulating film such that the insulating film covers the first and second surfaces of the silicon substrate and the surface of the silicon substrate corresponding to the side surface of the through hole; and (e) forming the through electrode in the through hole on which the insulating film is formed. | 04-09-2009 |
20090095974 | SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF - A semiconductor package including a base body having a recessed portion for installing an electronic component on one surface, the recessed portion including an inner bottom surface, inclined surface and a shoulder part and a wiring pattern having one end positioned in the inner bottom surface of the recessed portion and the other end extending to an outside region of the recessed portion beyond the shoulder part of the recessed portion. The shoulder part of the recessed portion is a smoothly curved surface. | 04-16-2009 |
20090098712 | SUBSTRATE DIVIDING METHOD - A method of dividing a substrate | 04-16-2009 |
20090108411 | SILICON SUBSTRATE FOR PACKAGE - In a silicon substrate for a package, a through electrode is provided with which a through hole passing through from a bottom surface of a cavity for accommodating a chip of an electronic device to a back surface of the substrate is filled. An end part of the through electrode in the bottom surface side of the cavity has a connection part to a wiring that forms an electric circuit including the chip of the electronic device. The silicon substrate for a package is characterized in that (1) a thin film wiring is included as the wiring and the connection part is reinforced by a conductor connected to the thin film wiring and/or (2) a wire bonding part is included as the wiring and the connection part is formed by wire bonding the end part of the through electrode in the bottom surface side of the cavity. | 04-30-2009 |
20090115049 | SEMICONDUCTOR PACKAGE - A semiconductor package in which an electronic device chip is provided in a cavity of a silicon substrate stacked product constituted by stacking a plurality of silicon substrates. | 05-07-2009 |
20090134530 | WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - There is provided a wiring substrate. The wiring substrate includes a wiring member and a reinforcing layer. The wiring member is formed by layering insulating layers and wiring layers and has connection pads thereon. The reinforcing layer is provided on the wiring member to surround the connection pads and has a plurality of concave-convex portions thereon. | 05-28-2009 |
20090206861 | SEMICONDUCTOR INSPECTING DEVICE - In a semiconductor inspecting device having a contact to be electrically connected to an electrode pad formed in a semiconductor device which is an object to be measured, and a substrate provided with the contact, the contact is provided obliquely to a main surface of the substrate. | 08-20-2009 |
20090236024 | METHOD OF MANUFACTURING WIRING SUBSTRATE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a wiring substrate is disclosed. The method includes: (a) preparing a supporting substrate including a main body and a through electrode penetrating the main body, wherein the supporting substrate includes a first surface and a second surface opposite to the first surface, and a trace is formed on the second surface of the supporting substrate; (b) forming a build-up wiring structure by alternately forming a wiring layer and an insulating layer on the first surface of the supporting substrate; and (c) obtaining a wiring substrate by separating the build-up wiring structure from the supporting substrate. Step (b) includes: forming the wiring layer using the through electrode as a power feeding wiring, and step (c) includes: peeling the build-up wiring structure from the supporting substrate to obtain the wiring substrate. | 09-24-2009 |
20090236031 | METHOD OF MANUFACTURING WIRING SUBSTRATE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - There are provided a step of preparing a dummy chip, a step of forming a cavity in a stiffener substrate, a step of providing a second tape base member on one surface of the stiffener substrate, a step of inserting the dummy chip into the cavity to provide the dummy chip on the second tape base member, a step of sealing the stiffener substrate and the dummy chip with a sealing resin, a step of removing the second tape base member and forming a build-up wiring layer on a surface from which the second tape base member is removed, a step of removing the sealing resin; and a step of peeling the dummy chip from the build-up wiring layer. | 09-24-2009 |
20090236727 | WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A wiring substrate is provided. The wiring substrate includes a multilayer wiring structure and a stiffener. The multilayer wiring structure includes: a plurality of insulating layers; a plurality of wiring patterns; and a plurality of chip mounting pads which are electrically connected to the wiring patterns and on which a semiconductor chip is flip-chip mounted. The stiffener is provided on a portion of the multilayer wiring structure, which is outside of a mounting area on which the semiconductor chip is flip-chip mounted. A thermal expansion coefficient of the stiffener is substantially equal to that of the semiconductor chip. | 09-24-2009 |
20090242107 | METHOD OF MANUFACTURING WIRING SUBSTRATE - A method includes the steps of providing a first tape base material on a single side of a stiffener substrate, forming, on the stiffener substrate, a cavity for accommodating a semiconductor chip therein, inserting the stiffener substrate in the cavity and providing the stiffener substrate on the first tape base material, sealing the semiconductor chip and the stiffener substrate with a sealing resin, and removing the first tape base material and forming a build-up layer on a tape removing surface. | 10-01-2009 |
20090283914 | SILICON INTERPOSER AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a silicon interposer, includes a step of forming a protection film on a surface, on which an element portion is formed, of a silicon wafer, a step of forming open holes according to planar arrangements of through holes which pass through the silicon wafer in a thickness direction, a step of forming the through holes by etching the silicon wafer using the protection film as a mask, a step of forming an oxide film on inner wall surfaces of the through holes by a thermal oxidation, a step of forming a contact hole, which is in communication with the element portion, in the protection film, and a step of forming wirings on both surfaces of the silicon wafer. In the step of forming the wirings, one of the wirings is formed to be connected electrically to the element portion via a contact portion formed in the contact hole. | 11-19-2009 |
20090284276 | PROBE CARD - A probe card is disclosed that includes a board having a first surface and a second surface facing away from each other and a through hole formed between the first and second surfaces; and a probe needle having a penetration part and a support part. The penetration part is placed in the through hole without contacting the board and projects from the first and second surfaces of the board. The support part is integrated with a first one of the end portions of the penetration part and connected to one of the first and second surfaces of the board. The support part has a spring characteristic. The penetration part is configured to have a second one of its end portions come into contact with an electrode pad of a semiconductor chip at the time of conducting an electrical test on the semiconductor chip. | 11-19-2009 |
20090300911 | METHOD OF MANUFACTURING WIRING SUBSTRATE AND CHIP TRAY - A method of manufacturing a wiring substrate comprises the steps of attaching a semiconductor chip to a chip positioning plate of a chip tray formed of silicon, executing wiring formation processing using the semiconductor chip attached to the chip positioning plate as a base point, and detaching the wiring-formed wiring substrate from the chip positioning plate. The chip positioning plate comprises a receiving part for receiving the semiconductor chip, and elastic members respectively disposed in two adjacent surfaces of four surfaces constructing an inside surface of the receiving part, and each of these elastic members exerts pressing force toward directions of opposite surfaces, and the semiconductor chip is pinched between each of the opposite surfaces corresponding to each of the elastic members. | 12-10-2009 |
20100096163 | WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A wiring board comprises a first pad which is provided on a first surface side of a substrate and on which a first electronic component is to be mounted, and a second pad which is provided on the first surface side of the substrate and on which a second electronic component having a larger amount of heat generation in an operation than that of the first electronic component is to be mounted, a first through electrode which penetrates the substrate and has one of ends connected electrically to the first pad, a second through electrode which penetrates the substrate and has one of ends connected electrically to the second pad, a through trench penetrating the substrate in a portion positioned between a first mounting region for the first electronic component and a second mounting region for the second electronic component, and a heat intercepting member provided in the through trench. | 04-22-2010 |
20100133677 | SEMICONDUCTOR CHIP STACKED BODY AND METHOD OF MANUFACTURING THE SAME - A plurality of chip sealing bodies stacked on a wiring substrate with a connection terminal. The chip sealing body includes a semiconductor chip having a semiconductor integrated circuit, a pad and a conductive connecting material, and a resin sealing the semiconductor chip. The chip sealing body is shaped into a cubic form in which a portion of the conductive connecting material except an end portion located on an external device side and all surfaces of semiconductor chip is sealed by the resin and the end portion of the conductive connecting material located on the external device side is exposed from the cubic form. A conductive bonding wire connects the end portions of the conductive connecting materials and the connection terminal respectively. A resin sealing material seals the plurality of chip sealing bodies, the conductive bonding wire, and the wiring substrate. | 06-03-2010 |
20100320598 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - A semiconductor device includes a stacked chip structure provided on a board and made up of semiconductor chips that are stacked via insulators. Each semiconductor chip has an integrated circuit surface, pads provided on the integrated circuit surface, and conductive connecting members having a wave shape with first ends electrically connected to the pads, and second ends extending outwardly from the at least one edge part and electrically connected to the connection terminals on the board. | 12-23-2010 |
20100321936 | LIGHTING APPARATUS - It is a lighting apparatus | 12-23-2010 |
20110027990 | SEMICONDUCTOR CHIP AND METHOD OF MANUFACTURING THE SAME - A semiconductor chip includes a semiconductor substrate, a through via provided in a through hole that passes through the semiconductor substrate, insulating layers laminated on the semiconductor substrate, a multi-layered wiring structure having a first wiring pattern and a second wiring pattern, and an external connection terminal provided on an uppermost layer of the multi-layered wiring structure, wherein the through via and the external connection terminal are connected electrically by the second wiring pattern. | 02-03-2011 |
20110032710 | LIGHT-EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME - A light-emitting device including a light-emitting element and a substrate where the light-emitting element is arranged. A housing part housing the light-emitting element and having a shape that is tapered upward from the substrate and a metal frame surrounding the light-emitting element and including the side face of the housing part made into an almost mirror-polished surface are provided on the substrate. | 02-10-2011 |
20110062596 | SEMICONDUCTOR CHIP STACKED STRUCTURE AND METHOD OF MANUFACTURING SAME - A method of making a semiconductor chip stacked structure includes dicing a semiconductor wafer into semiconductor chips, the semiconductor chips respectively having a first surface and a second surface opposite thereto, the semiconductor chips having integrated circuits and pads on the first surfaces, arranging the semiconductor chips at intervals on a film having adhesive property, connecting the pads through joining members, sealing with resin the joining members and surfaces of the semiconductor chips excluding the second surfaces to produce a chip sealing structure, dividing the chip sealing structure to produce separate chip sealing structures having ends of the joining members exposed at surfaces thereof, removing the film to expose the second surfaces, stacking the chip sealing structures one over another and connecting the exposed ends of the joining members through a bonding wire to produce a chip stacked structure, and mounting the chip stacked structure on a wiring substrate. | 03-17-2011 |
20110156242 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - There is provided a method of manufacturing a semiconductor package. The method includes: (a) providing a silicon wafer comprising a first surface and a second surface opposite to the first surface; (b) forming vias through the silicon wafer in its thickness direction; (c) forming wiring patterns on the first surface of the silicon wafer such that the wiring patterns are electrically connected to the vias; (d) bonding a MEMS element wafer comprising MEMS elements onto the second surface of the silicon wafer such that the MEMS elements are electrically connected to the vias; (e) dividing the MEMS element wafer into the respective MEMS elements; (f) bonding a lid having concave portions therein onto the second surface of the silicon wafer such that the respective MEMS elements face a corresponding one of the concave portions; and (g) dicing the lid and the silicon wafer. | 06-30-2011 |
20110227218 | SILICON SUBSTRATE FOR PACKAGE - In a silicon substrate for a package, a through electrode is provided with which a through hole passing through from a bottom surface of a cavity for accommodating a chip of an electronic device to a back surface of the substrate is filled. An end part of the through electrode in the bottom surface side of the cavity has a connection part to a wiring that forms an electric circuit including the chip of the electronic device. The silicon substrate for a package is characterized in that (1) a thin film wiring is included as the wiring and the connection part is reinforced by a conductor connected to the thin film wiring and/or (2) a wire bonding part is included as the wiring and the connection part is formed by wire bonding the end part of the through electrode in the bottom surface side of the cavity. | 09-22-2011 |
20130264695 | STACKED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A stacked semiconductor device includes a unit component including a wiring portion formed by electrically connecting a die pad of and a lead of a lead frame, and a semiconductor package whose connection terminal is connected to the lead, wherein the unit component is stacked, and the leads located to upper and lower sides are connected mutually via an electrode. | 10-10-2013 |
20130329385 | ELECTRONIC DEVICE - An electronic device includes: a housing having a concave portion in the first surface of the housing; a lid made of a semiconductor material containing an impurity material; a first metal film formed in a metal film formation region on the first surface of the housing, wherein the metal film formation region is defined as a region surrounding the concave portion on the first surface of the housing; a second metal film formed on the first surface of the lid to overlap with the metal film formation region in a top view of the electronic device; a third metal film formed on the second surface of the lid to overlap with the metal film formation region in the top view; and an electronic component disposed in the concave portion. The lid is bonded onto the housing via the first and second metal films to cover the electronic component. | 12-12-2013 |
20140042616 | SEMICONDUCTOR DEVICE - There is provided a semiconductor device. The semiconductor device includes: a silicon substrate; a copper post connected to one surface of the silicon substrate; a semiconductor element having a linear expansion coefficient different from that of the silicon substrate; a metal layer provided between the semiconductor element and the silicon substrate to cover the copper post; a first alloy layer provided between the copper post and the semiconductor element, wherein the first alloy layer includes alloy of gold and a metal of the metal layer; and a second alloy layer provided between the metal layer and the semiconductor element, wherein the second alloy layer includes alloy of gold and the metal of the metal layer. | 02-13-2014 |
20140362552 | INTERPOSER AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - There is provided an interposer for cooling an electronic component. The interposer includes: a substrate body having a hollow cooling channel therein, wherein a cooling medium flows through the cooling channel, the cooling channel including: a plurality of main cooling channels extending in a certain direction and separated from each other; an inflow channel which is communicated with one end of the respective main cooling channels; and an outflow channel which is communicated with the other end of the respective main cooling channels, and a plurality of through electrode groups each comprising a plurality of through electrodes arranged in a line. Each of the though electrodes is formed through the substrate body to reach the first and second surfaces of the substrate body. The respective through electrode groups are partitioned by at least corresponding one of the main cooling channels. | 12-11-2014 |