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| 20130226514 | SYSTEM, APPARATUS, AND METHOD FOR ESTIMATING THREE-DIMENSIONAL (3D) POSITION AND DIRECTION PRECISELY - A system, apparatus, and method for precisely estimating a three-dimensional (3D) position and a direction. The 3D position and direction estimation apparatus may estimate a distance between at least one receiver and at least one transmitter and a direction of a remote device, based on intensity information of a signal measured at the at least one receiver, may sequentially select the minimum number of intensity information for estimating the 3D position and the direction of the remote device, in a descending order of robustness against noise, based on the estimated distance and direction of the remote device, and may precisely estimate the 3D position and the direction of the remote device based on the selected intensity information. | 08-29-2013 |
| 20150022711 | APPARATUS, MEDIUM, AND METHOD FOR PHOTOGRAPHING BASED ON FACE DETECTION - A photographing method, medium, and apparatus based on face detection in a portable camera. The portable photographing apparatus may include an image input unit that receives an image, a face detection unit that detects a face from the received image, a storage unit that stores the image detected by the face detection unit as a moving image in a first mode, and a quality evaluation unit that evaluates the quality of the image detected by the face detection unit and stores the same as a still image in a second mode upon satisfaction of predetermined conditions evaluated based on the quality evaluation of the still image. | 01-22-2015 |
| 20150028327 | THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A thin film transistor includes a substrate, a gate electrode, a buffer layer, a gate insulating layer, an active layer, an etching stop layer, a source electrode and a drain electrode. The gate electrode is formed on the substrate. The buffer layer partially covers both side portions of the gate electrode. The gate insulating layer covers the gate electrode and the buffer layer. The active layer is formed on the gate insulating layer. The etching stop layer is formed on the active layer, and has a first opening and a second opening on the active layer. The source electrode is formed on the etching stop layer, and contacts with the active layer through the first opening. The drain electrode is formed on the etching stop layer, and is contacted with the active layer through the second opening. | 01-29-2015 |
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| 20140077173 | THIN FILM TRANSISTOR AND ORGANIC LIGHT-EMITTING DISPLAY APPARATUS - A thin film transistor includes a substrate, a gate electrode on the substrate, an active layer spaced from the gate electrode, a source electrode and a drain electrode spaced from the gate electrode and coupled to the active layer, a gate wiring at a same layer as the gate electrode and coupled to the gate electrode, and first conductive members electrically coupled to, and overlapping, the gate wiring. | 03-20-2014 |
| 20140097420 | ORGANIC LIGHT EMITTING DIODE DISPLAY - An organic light emitting diode display includes: a pixel region; and a peripheral region surrounding the pixel region, the peripheral region including: a gate common voltage line; an interlayer insulating film that covers the gate common voltage line and has a common voltage contact hole exposing part of the gate common voltage line; a data common voltage line that is formed on the interlayer insulating film and comes in contact with the gate common voltage line via the common voltage contact hole; barrier ribs that cover the data common voltage line and have common voltage openings exposing part of the data common voltage line; and a peripheral common electrode that is formed on the barrier ribs and comes in contact with the data common voltage line via the common voltage openings, wherein the barrier ribs are formed at positions corresponding to the boundaries with the common voltage contact hole. | 04-10-2014 |
| 20140333512 | PIXEL AND ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE USING THE SAME - A pixel circuit for an organic light emitting diode (OLED) display is disclosed. One inventive aspect includes an organic light emitting diode, a first transistor, a storage unit, a second transistor and a third transistor. The first transistor controls the amount of current flowing from a first power source coupled to a second power source via a second node and the organic light emitting diode in response to a voltage at a first node. The storage unit is connected to a data line, and stores a data signal from the data line. The second transistor is connected to a fourth node and the first node and is turned on when a second control signal is supplied. The third transistor is connected to the first node and a third node and is turned on when a third control signal is supplied. | 11-13-2014 |
| 20140333600 | PIXEL AND ORGANIC LIGHT EMITTING DISPLAY USING THE SAME - A pixel circuit for an organic light emitting diode (OLED) display is disclosed. One inventive aspect includes an organic light emitting diode, a first transistor, a second transistor, a first capacitor connected to a second node and a fixed voltage source, a third transistor, a fourth transistor, a second capacitor connected to the fourth transistor and a third node, a first control transistor and a second control transistor. The fourth transistor is connected to the first and third nodes and is turned off when an emission control signal is supplied to an emission control line and turned on otherwise. The first control transistor is connected to the third node and the first power source and is turned on when a first control signal is supplied. | 11-13-2014 |
| 20140353605 | THIN FILM TRANSISTOR AND ORGANIC LIGHT EMITTING DIODE DISPLAY INCLUDING THE SAME - A thin film transistor includes a substrate, a semiconductor layer on the substrate, a first insulating layer covering the substrate and the semiconductor layer, a first gate electrode on the first insulating layer and overlapping the semiconductor layer, a second insulating layer covering the first gate electrode and the first insulating layer, a second gate electrode on the second insulating layer and overlapping the semiconductor layer and the first gate electrode, a third insulating layer covering the second gate electrode, a first contact hole defined in the first insulating layer, the second insulating layer and the third insulating layer, and through which a portion of the semiconductor layer is exposed, and a source electrode and a drain electrode connected to the semiconductor layer through the first contact hole. | 12-04-2014 |
| 20140354517 | PIXEL AND ORGANIC LIGHT EMITTING DISPLAY DEVICE USING THE SAME - A pixel includes an organic light emitting diode (OLED) having a cathode electrode coupled to a second power supply, a pixel circuit configured to control an amount of current supplied to the OLED to correspond to a previous data signal, and a driver configured to store a present data signal supplied from a data line and to supply the previous data signal to the pixel circuit. The OLED, pixel circuit, and driver may be controlled by signals in a frame that includes first through fourth periods, the second power supply may be set to a first voltage in the first and second periods and to a second voltage in the third and fourth periods, and the first voltage may be a voltage at which the OLED does not emit light and the second voltage may be a voltage at which the OLED emits light. | 12-04-2014 |
| 20140354711 | ORGANIC LIGHT EMITTING DISPLAY DEVICE AND METHOD OF DRIVING THE SAME - An organic light emitting display device includes pixels, a scan driver, a memory configured to store pixel data containing information indicative of threshold voltages and mobilities of first transistors in the pixels, a timing controller configured to modify one or more bits of first data to generate second data, the first data modified in response to the pixel data, a data driver configured to generate data signals based on the second data, and a control driver configured to supply a first control signal to a first control line commonly coupled to the pixels and a second control signal to a second control line, wherein each of the pixels is configured to store a data signal of a current frame and to emit light corresponding to a data signal of a previous frame. | 12-04-2014 |
| 20150021591 | THIN FILM TRANSISTOR AND THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME - A thin film transistor is disclosed. In one aspect, the thin film transistor includes a substrate, a semiconductor layer formed on the substrate, and a first gate electrode substantially overlapping the semiconductor layer with a gate insulating layer interposed therebetween. The thin film transistor also includes a second gate electrode substantially overlapping the first gate electrode with an interlayer insulating layer interposed therebetween, and a source electrode and a drain electrode electrically connected to the semiconductor layer, wherein the first gate electrode is electrically connected to the second gate electrode. | 01-22-2015 |
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| 20110228624 | SUB-WORD-LINE DRIVING CIRCUIT, SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME, AND METHOD OF CONTROLLING THE SAME - Provided is a semiconductor memory device including a sub-word-line driving circuit capable of reducing an amount of leakage current due to coupling. The semiconductor memory device includes a word-line enable signal generating circuit and a sub-word-line driving circuit. The sub-word-line driving circuit provides a pull-down current path between a selected word line and ground for a pulse type period of time in a precharge mode following an active mode for the selected word line, generates a word line driving signal on the basis of a main word line driving signal, a first sub-word-line control signal, and a second sub-word-line control signal, and provides the word line driving signal to a memory cell array. The semiconductor memory device may reduce an amount of leakage current flowing to a ground through the sub-word-line driving circuit. | 09-22-2011 |
| 20120272112 | SEMICONDUCTOR DEVICES AND SEMICONDUCTOR PACKAGES - Semiconductor devices configured to test connectivity of micro bumps including one or more micro bumps and a boundary scan test block for testing connectivity of the micro bumps by scanning data input to the micro bumps and outputting the scanned data. The semiconductor device may include a first chip including solder balls and at least one or more switches electrically coupled with the respective solder balls, and a second chip stacked on top of the first chip and electrically coupled with the switches in direct access mode, including micro bumps that input/output signals transmitted from/to the solder balls. | 10-25-2012 |
| 20130016574 | SEMICONDUCTOR MEMORY DEVICE HAVING IMPROVED REFRESH CHARACTERISTICS - A semiconductor memory device having improved refresh characteristics includes a memory array including a plurality of memory cells; a test unit configured to test refresh characteristics of the memory array and generate a first fail address signal; a storage unit configured to store the first fail address signal; and a refresh unit configured to perform a refresh operation on the memory array, wherein the refresh unit is configured to receive the first fail address signal from the storage unit, perform the refresh operation on a first memory cell that does not correspond to the first fail address signal according to a first period, and perform the refresh operation on a second memory cell that corresponds to the first fail address signal according to a second period that is shorter than the first period. | 01-17-2013 |
| 20130201777 | REFRESH CIRCUIT OF A SEMICONDUCTOR MEMORY DEVICE AND REFRESH CONTROL METHOD OF THE SEMICONDUCTOR MEMORY DEVICE - A refresh circuit and a semiconductor memory device including the refresh circuit are disclosed. The refresh circuit includes a mode register, a refresh controller and a multiplexer circuit. The mode register generates a mode register signal having information relating to a memory bank on which a refresh operation is to be performed. The refresh controller generates a self-refresh active command and a self-refresh address based on a self-refresh command and an oscillation signal. The multiplexer circuit may include a plurality of multiplexers. Each of the multiplexers selects one of an active command and the self-refresh active command in response to bits of the mode register signal. Each of the multiplexers generates a row active signal based on the selected command, and selects one of an external address and the self-refresh address to generate a row address. | 08-08-2013 |
| 20140013183 | MEMORY DEVICES WITH SELECTIVE ERROR CORRECTION CODE - An error correction apparatus includes an error correction circuit configured to selectively perform error correction on a portion of data that is at least one of written to and read from a plurality of memory cells of a memory device. The portion of data is at least one of written to and read from a subset of the plurality of memory cells, and the subset includes only fail cells among the plurality of memory cells. The error correction apparatus further includes a fail address storage circuit configured to store address information for the fail cells. | 01-09-2014 |
| 20140016421 | SEMICONDUCTOR MEMORY DEVICE STORING REFRESH PERIOD INFORMATION AND OPERATING METHOD THEREOF - A semiconductor memory device which stores refresh period information thereby adjusting a refresh period and a method of operating the same. The semiconductor memory device includes a cell array and a refresh information storing unit. The cell array includes one or more cell regions each having a plurality of memory cells. The refresh information storing unit is configured to store first information including a first refresh period and second information including a second refresh period in correspondence to each of the cell regions. Memory cells included in each of the cell regions are refreshed at the first refresh period according to the first information in a first refresh time band and are refreshed at the second refresh period according to the second information in a second refresh time band. | 01-16-2014 |
| 20140108716 | DYNAMIC RANDOM ACCESS MEMORY FOR STORING RANDOMIZED DATA AND METHOD OF OPERATING THE SAME - A dynamic random access memory (DRAM) includes a memory cell array, a data input/output circuit, and a data randomizer configured to randomize data to be stored in the memory cell array. The data randomizer includes an encoder configured to generate write data by encoding input data received from the data input/output circuit using a randomization code and to output the write data to the memory cell array. The data randomizer further includes a decoder configured to generate output data by decoding read data received from the memory cell array using the randomization code and to output the output data to the data input/output circuit. | 04-17-2014 |
| 20140119091 | BIT-LINE SENSE AMPLIFIER, SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME - A semiconductor memory device is provided which includes a sense amplifier, a bit line connected to a plurality of memory cells of a first memory block, a complementary bit line connected to a plurality of memory cells of a second memory block, a first switch configured to connect the bit line to the sense amplifier, and a second switch configured to connect the complementary bit line to the sense amplifier. The first switch is configured to electrically separate the bit line from the sense amplifier when the second memory block performs a refresh operation. | 05-01-2014 |
| 20140152340 | OPERATING METHOD OF INPUT/OUTPUT INTERFACE - A method of operating an input/output interface includes selecting one of a plurality of output driver circuits according to a mode selection signal, and outputting a data signal using the selected one of the plurality of output driver circuits. Another method of operating an includes generating a mode selection signal based on a received command signal, and controlling an on-die termination (ODT) circuit included in the input/output interface according to the mode selection signal. Another method of operating an includes generating a mode selection signal based on a received command signal, and controlling an ODT circuit included in the input/output interface according to the mode selection signal. | 06-05-2014 |
| 20140219042 | MEMORY DEVICE AND METHOD OF REFRESHING IN A MEMORY DEVICE - In a method of refreshing in a memory device having a plurality of pages, a candidate refresh address corresponding to a page scheduled to be refreshed after a monitoring period is generated. Whether an active command is processed for the candidate refresh address is monitored during the monitoring period. If an active command is processed for the candidate refresh address during the monitoring period, the scheduled refresh for that page is skipped. If no active command is processed for the candidate refresh address during the monitoring period, the scheduled refresh operation is performed. | 08-07-2014 |
| 20140237177 | MEMORY MODULE AND MEMORY SYSTEM HAVING THE SAME - A memory module includes a master memory device and at least one slave memory device. The master memory device may generate a refresh clock signal, and perform a refresh operation in synchronization with the refresh clock signal. The slave memory device may be connected to receive the refresh clock signal, and perform a refresh operation in synchronization with the refresh clock signal. | 08-21-2014 |
| 20140310481 | MEMORY SYSTEM - A memory system includes a memory controller to control a first memory device and a second memory device. The first and second memory devices are different in terms of at least one of physical distance from the memory controller, a manner of connection to the memory controller, error correction capability, or memory supply voltage. The first and second memory devices also have different latencies. | 10-16-2014 |
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| 20110044155 | OPTICAL PICKUP DEVICE - An optical pickup device corresponding to a plurality of media is provided. The optical pickup device includes a light emitting system and a light receiving system including a plurality of light sources and a light transmission system shared by the light emitting system and the light receiving system, configured to irradiate light on a medium, and receive light reflected from the medium. The light transmission system irradiates light from the light emitting system to be appropriately focused on the medium, receives light reflected from the medium, and transports light to the light receiving system. The light transmission system includes one beam splitter corresponding to the light emitting system and the light receiving system and a position-changing collimating lens shared to correspond to a plurality of media. The position-changing collimating lens is disposed between the beam splitter and the medium, the position being controlled according to optical characteristics of the media. | 02-24-2011 |
| 20130182546 | PHOTO DETECTING ELEMENT, AND OPTICAL PICK-UP DEVICE AND OPTICAL DISC DRIVE INCLUDING THE PHOTO DETECTING ELEMENT - Provided is a photo detecting element that has a simplified structure and that is easily manufactured and assembled, and an optical pick-up device including the photo detecting element. The photo detecting element includes an optical sensor, an amplifier for amplifying a signal from the optical sensor, and a non-linear multi-step variable resistor to adjust a gain of the amplifier | 07-18-2013 |
| 20130229897 | PHOTO DETECTING ELEMENT, AND OPTICAL PICK-UP AND DISC DRIVE INCLUDING THE SAME - Provided is a photo detecting element including a body with an optical sensor and an amplification unit for amplifying a signal output from the optical sensor. The photo detecting element includes a driving voltage port that applies a driving voltage to the amplification unit, a ground port that provides a ground for the amplification unit, and a plurality of output ports interposed between the driving voltage port and the ground port, and outputting a signal received from the amplification unit. The driving voltage port, ground port, and plurality of output ports are disposed on the same one side of the body. | 09-05-2013 |
| 20130342445 | EXTERNAL RECORDING DEVICE COMBINED WITH INPUT UNIT - Provided is an external recording device including a text input unit capable of inputting text or data to a terminal device. | 12-26-2013 |
| 20140233367 | METHOD OF ALIGNING LIGHT SOURCES IN AN OPTICAL PICKUP DEVICE, AND OPTICAL PICKUP AND OPTICAL DISC DRIVE EMPLOYING THE METHOD - Provided is an optical pickup device and a method of aligning a twin-light source in an optical disc drive. The method operates two light emitting chips in the light source simultaneously to cause two laser beams to be transmitted through a grating element at the same time. Location errors and rotation errors of the two light emitting chips with respect to the grating element may be corrected while monitoring the laser beams transmitted through the grating element. | 08-21-2014 |
| 20140241141 | OPTICAL PICKUP AND OPTICAL INFORMATION STORAGE SYSTEM INCLUDING THE SAME - Provided are an optical pickup and an optical information storage system including the same. The optical pickup includes a photodetector that receives a main light beam and a plurality of sub-light beams reflected from an information storage medium and diffracted by a diffracting element. The photo detector detects a tracking error signal using zeroth-order light as the main light beam and using one of first-order light and third-order light as the sub-light beam based on a type of an optical information storage medium. | 08-28-2014 |
| 20140245332 | COOLING APPARATUS COMBINED WITH OPTICAL DISK DRIVE MODULE - Provided is a cooling apparatus of a portable computer. The cooling apparatus includes one or more ventilation holes formed on the body thereof, and a cooling fan module mounted in the body. An optical disk drive (ODD) module mounted in the body drives the cooling fan module thereby reducing power consumption of the cooling module. | 08-28-2014 |
