Patent application number | Description | Published |
20090037401 | Information Retrieval and Ranking - A learning method is used to generate ranking models. The learning method can create a ranking function that assigns scores to documents and then ranks the documents using the scores. In this learning method, a training set along with performance measures are used to generate weak rankers which a used in the ranking model. During information retrieval, for a given query, the system may return a ranked list of documents in descending order of the relevance scores. | 02-05-2009 |
20090259651 | SEARCH RESULTS RANKING USING EDITING DISTANCE AND DOCUMENT INFORMATION - Architecture for extracting document information from documents received as search results based on a query string, and computing an edit distance between the data string and the query string. The edit distance is employed in determining relevance of the document as part of result ranking by detecting near-matches of a whole query or part of the query. The edit distance evaluates how close the query string is to a given data stream that includes document information such as TAUC (title, anchor text, URL, clicks) information, etc. The architecture includes the index-time splitting of compound terms in the URL to allow the more effective discovery of query terms. Additionally, index-time filtering of anchor text is utilized to find the top N anchors of one or more of the document results. The TAUC information can be input to a neural network (e.g., 2-layer) to improve relevance metrics for ranking the search results. | 10-15-2009 |
20090327264 | Topics in Relevance Ranking Model for Web Search - Described is a technology by which topics corresponding to web pages are used in relevance ranking of those pages. Topics are extracted from each web page of a set of web pages that are found via a query. For example, text such as nouns may be extracted from the title, anchor texts and URL of a page, and used as the topics. The extracted topics from a page are used to compute a relevance score for that page based on an evaluation of that page's topics against the query. The pages are then ranked relative to one another based at least in part on the relevance score computed for each page, such as by determining a matching level for each page, ranking pages by each level, and ranking pages within each level. Also described is training a model to perform the relevance scoring and/or ranking. | 12-31-2009 |
20100250655 | Methods for delivering and receiving interactive multimedia - A method used in a service providing device for delivering interactive multimedia content to a plurality of client devices, comprising: receiving a request for the interactive multimedia content, from at least one of the plurality of client devices; disabling the plurality of client devices from sending the request to the service providing device, according to a predetermined condition; and delivering the interactive multimedia content to the plurality of client devices. | 09-30-2010 |
20110219039 | TECHNIQUE FOR CUSTOMIZING CONTENT - Content can be advantageously customized by use of an accompanying rich media file that characterizes segments in the content file. To perform such customization, the rich media file undergoes parsing (e.g., examination) to identify a location for an overlay in the least one segment of the content file. Thereafter, an overlay is inserted into the at least one content segment. In practice, the overlay is inserted to block objectionable material in the content segment, but the overlay can be inserted to add material, such as to insert an advertisement or a sub-title for example. Inserting the overlay can include physically overlaying a cover layer onto one or more frames of the content segment to add information or block objectionable material in the content segment. | 09-08-2011 |
20110260173 | SEMICONDUCTOR STRUCTURE - A semiconductor structure is provided. The semiconductor structure may comprise a substrate ( | 10-27-2011 |
20120007146 | METHOD FOR FORMING STRAINED LAYER WITH HIGH GE CONTENT ON SUBSTRATE AND SEMICONDUCTOR STRUCTURE - A semiconductor structure and a method for forming the same are provided. The semiconductor structure may comprise a substrate ( | 01-12-2012 |
20120012906 | Si-Ge-Si SEMICONDUCTOR STRUCTURE HAVING DOUBLE GRADED JUNCTIONS AND METHOD FOR FORMING THE SAME - A Si—Ge—Si semiconductor structure having double compositionally-graded hetero-structures is provided, comprising: a substrate; a buffer layer or an insulation layer formed on the substrate; a strained SiGe layer formed on the buffer layer or the insulation layer, wherein a Ge content in a central portion of the strained SiGe layer is higher than the Ge content in an upper surface or in a lower surface of the strained SiGe layer, and the Ge content presents a compositionally-graded distribution from the central portion to the upper surface and to the lower surface respectively. According to the present disclosure, a compositionally-graded hetero-structure replaces an abrupt hetero-structure so as to form a triangular hole carrier potential well, so that most of hole carriers may be distributed in the strained SiGe layer with high Ge content and a reduction of the carrier mobility caused by interface scattering may be avoided, thus further improving a performance of a device. | 01-19-2012 |
20120025279 | LOW SCHOTTKY BARRIER SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A low Schottky barrier semiconductor structure is provided, comprising: a substrate; a SiGe layer with low Ge content formed on the substrate; a channel layer with high Ge content formed on the SiGe layer; a gate stack formed on the substrate and a side wall of one or more layers formed on both sides of the gate stack; a metal source and a metal drain formed in the channel layer and on the both sides of the gate stack respectively; and an insulation layer formed between the substrate and the metal source and between the substrate and the metal drain respectively. | 02-02-2012 |
20120030200 | TOPICS IN RELEVANCE RANKING MODEL FOR WEB SEARCH - Described is a technology by which topics corresponding to web pages are used in relevance ranking of those pages. Topics are extracted from each web page of a set of web pages that are found via a query. For example, text such as nouns may be extracted from the title, anchor texts and URL of a page, and used as the topics. The extracted topics from a page are used to compute a relevance score for that page based on an evaluation of that page's topics against the query. The pages are then ranked relative to one another based at least in part on the relevance score computed for each page, such as by determining a matching level for each page, ranking pages by each level, and ranking pages within each level. Also described is training a model to perform the relevance scoring and/or ranking. | 02-02-2012 |
20120032231 | MOS TRANSISTOR STRUCTURE WITH IN-SITU DOPED SOURCE AND DRAIN AND METHOD FOR FORMING THE SAME - A MOS transistor structure with an in-situ doped source and/or drain and a method for forming the same are provided. The method comprises steps of: providing a substrate; forming a high Ge content layer on the substrate; forming a gate stack on the high Ge content layer and forming a side wall of one or more layers on both sides of the gate stack; etching the high Ge content layer to form a source region and/or a drain region; and forming a source and/or a drain in the source region and/or the drain region respectively by a low-temperature selective epitaxy, and introducing a doping gas during the low-temperature selective epitaxy to heavily dope the source and/or the drain and to in-situ activate a doping element. | 02-09-2012 |
20120187487 | GE-ON-INSULATOR STRUCTURE AND METHOD FOR FORMING THE SAME - A method for forming a Ge-on-insulator structure is provided, comprising steps of: forming a Ge layer ( | 07-26-2012 |
20120223387 | TUNNELING DEVICE AND METHOD FOR FORMING THE SAME - The present disclosure provides a tunneling device, which comprises: a substrate; a channel region formed in the substrate, and a source region and a drain region formed on two sides of the channel region; and a gate stack formed on the channel region and a first side wall and a second side wall formed on two sides of the gate stack, wherein the gate stack comprises: a first gate dielectric layer; at least a first gate electrode and a second gate electrode formed on the first gate dielectric layer; a second gate dielectric layer formed between the first gate electrode and the first side wall; and a third gate dielectric layer formed between the second gate electrode and the second side wall. | 09-06-2012 |
20120223390 | TUNNELING FIELD EFFECT TRANSISTOR AND METHOD FOR FORMING THE SAME - The present disclosure provides a TFET, which comprises: a substrate; a channel region formed in the substrate, and a source region and a drain region formed on two sides of the channel region; a gate stack formed on the channel region, wherein the gate stack comprises: a gate dielectric layer, and at least a first gate electrode and a second gate electrode distributed in a direction from the source region to the drain region and formed on the gate dielectric layer, and the first gate electrode and the second gate electrode have different work functions; and a first side wall and a second side wall formed on a side of the first gate electrode and on a side of the second gate electrode respectively. | 09-06-2012 |
20120226687 | Query Expansion for Web Search - Systems, methods, and devices are described for retrieving query results based at least in part on a query and one or more similar queries. Upon receiving a query, one or more similar queries may be identified and/or calculated. In one embodiment, the similar queries may be determined based at least in part on click-through data corresponding to previously submitted queries. Information associated with the query and each of the similar queries may be retrieved, ranked, and or combined. The combined query results may then be re-ranked based at least in part on a responsiveness and/or relevance to the previously submitted query. The re-ranked query results may then be output to a user that submitted the original query. | 09-06-2012 |
20120227067 | METHOD AND DEVICE FOR PROVIDING COMPLEMENTARY INFORMATION - It is provided a method for providing complementary information for principal information in a system having a first presentation device for presenting the principal information and a second presentation device for presenting the complementary information. The method comprises the steps of receiving a piece of principal information to be presented on the first presentation device; determining control information of at least one piece of complementary information associated with the received piece of principal information, wherein, the control information comprises a start time point for each piece of complementary information indicating when to present the complementary information, and sending an instruction message to instruct the second device to present the at least one piece of complementary information associated with the received piece of principal information based on the start time point contained in the control information and time information carried in the received piece of principal information. | 09-06-2012 |
20120228671 | STRAINED GE-ON-INSULATOR STRUCTURE AND METHOD FOR FORMING THE SAME - A strained Ge-on-insulator structure is provided, comprising: a silicon substrate, in which an oxide insulating layer is formed on a surface of the silicon substrate; a Ge layer formed on the oxide insulating layer, in which a first passivation layer is formed between the Ge layer and the oxide insulating layer; a gate stack formed on the Ge layer, a channel region formed below the gate stack, and a source and a drain formed on sides of the channel region; and a SiN stress cap layer covering the gate stack to produce a strain in the channel region. Further, a method for forming the strained Ge-on-insulator structure is also provided. | 09-13-2012 |
20120228707 | STRAINED GE-ON-INSULATOR STRUCTURE AND METHOD FOR FORMING THE SAME - A strained Ge-on-insulator structure is provided, comprising: a silicon substrate, in which an oxide insulating layer is formed on a surface of the silicon substrate; a Ge layer formed on the oxide insulating layer, in which a first passivation layer is formed between the Ge layer and the oxide insulating layer; a gate stack formed on the Ge layer, a channel region formed below the gate stack, and a source and a drain formed on sides of the channel region; and a plurality of shallow trench isolation structures extending into the silicon substrate and filled with an insulating dielectric material to produce a strain in the channel region. Further, a method for forming the strained Ge-on-insulator structure is also provided. | 09-13-2012 |
20120228708 | STRAINED GE-ON-INSULATOR STRUCTURE AND METHOD FOR FORMING THE SAME - A strained Ge-on-insulator structure is provided, comprising: a silicon substrate, in which an oxide insulating layer is formed on a surface of the silicon substrate; a Ge layer formed on the oxide insulating layer, in which a first passivation layer is formed between the Ge layer and the oxide insulating layer; a gate stack formed on the Ge layer; and a channel region formed below the gate stack, and a source and a drain formed on sides of the channel region, in which the source and the drain are a Si | 09-13-2012 |
20120267609 | COMPLEMENTARY TUNNELING FIELD EFFECT TRANSISTOR AND METHOD FOR FORMING THE SAME - A complementary tunneling field effect transistor and a method for forming the same are provided. The complementary tunneling field effect transistor comprises: a substrate; an insulating layer, formed on the substrate; a first semiconductor layer, formed on the insulating layer and comprising first and second doped regions; a first type TFET vertical structure formed on a first part of the first doped region and a second type TFET vertical structure formed on a first part of the second doped region, in which a second part of the first doped region is connected with a second part of the second doped region and a connecting portion between the second part of the first doped region and the second part of the second doped region is used as a drain output; and a U-shaped gate structure, formed between the first type TFET vertical structure and the second type TFET vertical structure. | 10-25-2012 |
20120280274 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor structure is provided, comprising: a Si substrate; a porous structure layer formed on the Si substrate, in which the porous structure layer has a flat surface and comprises a Si | 11-08-2012 |
20120292711 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME - A semiconductor structure is provided. The semiconductor structure comprises: a substrate; a gate dielectric layer formed on the substrate; a metal gate electrode layer formed on the gate dielectric layer; and at least one metal-containing adjusting layer for adjusting a work function of the semiconductor structure, in which an interfacial layer is formed between the substrate and the gate dielectric layer, and an energy of bond between a metal atom in the metal-containing adjusting layer and an oxygen atom is larger than that between an atom of materials forming the gate dielectric layer or the interfacial layer and an oxygen atom. Further, a method for forming the semiconductor structure is also provided. | 11-22-2012 |
20120330958 | Regularized Latent Semantic Indexing for Topic Modeling - Electronic documents are retrieved from a database and/or from a network of servers. The documents are topic modeled in accordance with a Regularized Latent Semantic Indexing approach. The Regularized Latent Semantic Indexing approach may allow an equation involving an approximation of a term-document matrix to be solved in parallel by multiple calculating units. The equation may include terms that are regularized via either l | 12-27-2012 |
20130004145 | TRICK PLAYBACK OF VIDEO DATA - A method for controlling playback of video data on a first device ( | 01-03-2013 |
20130105764 | TUNNELING FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD FOR FORMING THE SAME | 05-02-2013 |
20130181185 | TUNNELING FIELD EFFECT TRANSISTOR AND METHOD FOR FABRICATING THE SAME - A tunneling field effect transistor and a method for fabricating the same are provided. The tunneling field effect transistor comprises: a semiconductor substrate and a drain layer formed in the semiconductor substrate, in which the drain layer is first type heavily doped; an epitaxial layer formed on the drain layer, with an isolation region formed in the epitaxial layer; a buried layer formed in the epitaxial layer, in which the buried layer is second type lightly doped; a source formed in the buried layer, in which the source is second type heavily doped; a gate dielectric layer formed on the epitaxial layer, and a gate formed on the gate dielectric layer; and a source metal contact layer formed on the source, and a drain metal contact layer formed under the drain layer. | 07-18-2013 |
20130188933 | METHOD FOR SEMANTICS BASED TRICK MODE PLAY IN VIDEO SYSTEM - Trick mode play for controlling video content playback can be realized using a semantic based criterion in order to achieve a more uniform playback experience for the viewer, when that viewer wishes to observe the video content presented according to a selected semantic. In one embodiment of the method, semantics associated with shorter time intervals in the video content are replayed in trick mode play proportionally slower than semantics associated with longer time intervals, wherein the proportionally is determined, at least in part, to the time interval associated with each semantic. In various embodiments, semantics can include scenes, audio, metadata, tags, and the like. The semantics based trick mode play approach allows for a more uniform viewing experience, on a time duration basis, from one semantic to the next. | 07-25-2013 |
20130207161 | SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME - A semiconductor device and a method for forming the same are provided. The semiconductor device comprises: a substrate ( | 08-15-2013 |
20130207167 | TUNNELING FIELD EFFECT TRANSISTOR AND METHOD FOR FABRICATING THE SAME - A tunneling field effect transistor and a method for fabricating the same are provided. The tunneling field effect transistor comprises: a semiconductor substrate; a channel region formed in the semiconductor substrate, with one or more isolation structures formed in the channel region; a first buried layer and a second buried layer formed in the semiconductor substrate and located at both sides of the channel region respectively, the first buried layer being first type non-heavily-doped, and the second buried layer being second type non-heavily-doped; a source region and a drain region formed in the semiconductor substrate and located on the first buried layer and the second buried layer respectively; and a gate dielectric layer formed on the one or more isolation structures, and a gate formed on the gate dielectric layer. | 08-15-2013 |
20130207173 | FLASH MEMORY AND METHOD FOR FABRICATING THE SAME - A flash memory and a method for fabricating the same are provided. The flash memory comprises: a semiconductor substrate; a storage medium layer formed on the semiconductor substrate and comprising from bottom to top: a tunneling oxide layer, a silicon nitride layer and a blocking oxide layer; a semiconductor layer formed on the storage medium layer and comprising a channel region and a source region and a drain region located on both sides of the channel region respectively; and a gate stack formed on the channel region and comprising a gate dielectric and a gateformed on the gate dielectric. | 08-15-2013 |
20130277677 | METHOD FOR FORMING POLYCRYSTALLINE FILM, POLYCRYSTALLINE FILM AND THIN FILM TRANSISTOR FABRICATED FROM THE POLYCRYSTALLINE FILM - A method for forming a polycrystalline film, a polycrystalline film formed by the method and a thin film transistor fabricated from the polycrystalline film are provided. The method comprises the steps of: providing a substrate; forming a thermal conductor layer on the substrate; etching the thermal conductor layer until the substrate is exposed to form a thermal conductor pattern; forming a seed layer on the thermal conductor layer and the substrate; etching the seed layer to form seed crystals on both sidewalls of the thermal conductor; forming an amorphous layer on the substrate, the thermal conductor layer and the seed crystals; etching the amorphous layer; and recrystallizing the amorphous layer to form a polycrystalline layer. | 10-24-2013 |
20130283202 | USER INTERFACE, APPARATUS AND METHOD FOR GESTURE RECOGNITION - A user interface, an apparatus and method for gesture recognition comprising: predicting one or more possible commands to the apparatus based on one or more sub gestures performed by a user previously; indicating the one or more possible commands. | 10-24-2013 |
20130295733 | Si-Ge-Si SEMICONDUCTOR STRUCTURE HAVING DOUBLE COMPOSITIONALLY-GRADED HETERO-STRUCTURES AND METHOD FOR FORMING THE SAME - A Si—Ge—Si semiconductor structure having double compositionally-graded hetero-structures is provided, comprising: a substrate; a buffer layer or an insulation layer formed on the substrate; a strained SiGe layer formed on the buffer layer or the insulation layer, wherein a Ge content in a central portion of the strained SiGe layer is higher than the Ge content in an upper surface or in a lower surface of the strained SiGe layer, and the Ge content presents a compositionally-graded distribution from the central portion to the upper surface and to the lower surface respectively. According to the present disclosure, a compositionally-graded hetero-structure replaces an abrupt hetero-structure so as to form a triangular hole carrier potential well, so that most of hole carriers may be distributed in the strained SiGe layer with high Ge content and a reduction of the carrier mobility caused by interface scattering may be avoided, thus further improving a performance of a device. | 11-07-2013 |
20140054546 | Dynamic Random Access Memory Unit And Method For Fabricating The Same - A dynamic random access memory unit and a method for fabricating the same are provided. The dynamic random access memory unit comprises: a substrate; an insulating buried layer formed on the substrate; a body region formed on the insulating buried layer and used as a charge storing region; two isolation regions formed on the body region, in which a semiconductor contact region is formed between the isolation regions and is a charge channel; a source, a drain and a channel region formed on the isolation regions and the semiconductor contact region respectively and constituting a transistor operating region which is partially separated from the charge storing region by the isolation regions and connected with the charge storing region via the charge channel; a gate dielectric layer formed on the transistor operating region, a gate formed on the gate dielectric layer; a source metal contact layer, a drain metal contact layer. | 02-27-2014 |
20140078654 | Electronic Apparatus And Connection Device - An electronic apparatus includes a first body; a second body; a connection device including: a connection body through which the first body is connected with the second body; with a first torque generator and a second torque generator provided inside the connection body. When an angle value is in a first preset threshold range, the first torque generator generates a first torque for balancing a second torque generated by gravitation of the first body. When the angle value is larger than a maximum value of the first preset threshold range, the first torque generator generates a third torque and the second torque generator generates a fourth torque; the third torque and the fourth torque balancing a fifth torque generated by a first composite force, which is the composite force of the gravitation of the first body and a push force acting on a touch control unit. | 03-20-2014 |
20140145312 | SEMICONDUCTOR STRUCTURE WITH RARE EARTH OXIDE - A semiconductor structure with a rare earth oxide is provided. The semiconductor structure comprises: a semiconductor substrate ( | 05-29-2014 |
20140145314 | SEMICONDUCTOR STRUCTURE WITH BERYLLIUM OXIDE - A semiconductor structure with beryllium oxide is provided. The semiconductor structure comprises: a semiconductor substrate ( | 05-29-2014 |
20140285437 | METHOD OF INTERNET BROWSER-BASED REMOTE USER INTERFACE VIRTUAL MOUSE CURSOR POSITIONING - A method is described including receiving, by a remote browser, local mouse information and local window size, calculating a virtual mouse position and displaying the virtual mouse position on a window of the remote browser. Also described is a method including transmitting local mouse information and local window size to a Web Socket Server. Further described is a method including forwarding by a Web Socket Server local mouse information and local window size to a remote browser. | 09-25-2014 |
20140291727 | METHOD FOR FORMING SEMICONDUCTOR GATE STRUCTURE AND SEMICONDUCTOR GATE STRUCTURE - A method for forming a semiconductor gate structure and a semiconductor gate structure are provided. The method includes: providing a substrate with a Ge layer as a surface thereof; forming a Sn layer on the Ge layer, in which an interface between the Ge layer and the Sn layer is a GeSn layer; removing the Sn layer to expose the GeSn layer; forming a GeSnO | 10-02-2014 |