| Patent application number | Description | Published |
|---|
| 20080253753 | Brushed Motor Control with Voltage Boost for Reverse and Braking - A single low side power transistor switch is used to efficiently control a brushed motor in a forward rotational direction. A boost voltage power supply is used to supply voltage to the brushed motor in a reverse rotational direction and/or braking from the forward rotational direction. A digital device controls the brushed motor rotational speed and rotational directions. | 10-16-2008 |
| 20080273391 | Regulator Bypass Start-Up in an Integrated Circuit Device - An internal voltage regulator in an integrated circuit device is always active upon initial start-up and/or power-on-reset operations. The internal voltage regulator protects the low voltage core logic circuits of the integrated circuit device from excessively high voltages that may be present in a particular application. In addition, nonvolatile memory may be part of and operational with the low voltage core logic circuits for storing device operating parameters. Therefore, the internal voltage regulator also protects the low voltage nonvolatile memory from excessive high voltages. Once the integrated circuit device has stabilized and all logic circuits therein are fully function, a bit(s) in the nonvolatile memory may be read to determine if the internal voltage regulator should remain active, e.g., how power operation with a high voltage source, or be placed into a bypass mode for low power operation when the integrated circuit device is powered by a low voltage. | 11-06-2008 |
| 20090144481 | Enhanced Microprocessor or Microcontroller - A microcontroller device has a central processing unit (CPU); a data memory coupled with the CPU divided into a plurality of memory banks, a plurality of special function registers and general purpose registers which may be memory-mapped, wherein at least the following special function registers are memory-mapped to all memory banks: a status register, a bank select register, a plurality of indirect memory address registers, a working register, and a program counter high latch; and wherein upon occurrence of a context switch, the CPU is operable to automatically save the content of the status register, the bank select register, the plurality of indirect memory address registers, the working register, and the program counter high latch, and upon return from the context switch restores the content of the status register, the bank select register, the plurality of indirect memory address registers, the working register, and the program counter high latch. | 06-04-2009 |
| 20090144511 | Enhanced Microprocessor or Microcontroller - An n-bit microprocessor device has an n-bit central processing unit (CPU); a plurality of special function registers and general purpose registers which are memory-mapped to a plurality of banks, with at least two 16-bit indirect memory address registers which are accessible by the CPU across all banks; a bank access unit for coupling the CPU with one of the plurality of banks; a data memory coupled with the CPU; and a program memory coupled with the CPU, wherein the indirect address registers are operable to access the data memory or program memory and wherein a bit in each of the indirect memory address registers indicates an access to the data memory or to the program memory. | 06-04-2009 |
| 20100023671 | Enhanced Microprocessor or Microcontroller - A processor device has a data memory with a linear address space, the data memory being accessible through a plurality of memory banks. At least a subset of the memory banks are organized such that each memory bank of the subset has at least a first and second memory area, wherein no consecutive memory block is formed by the second memory areas of a plurality of consecutive memory banks. An address adjustment unit is provided which, when a predefined address range is used, translates an address within the predefined address range to access said second memory areas such that through the address a plurality of second memory areas form a continuous linear memory block. | 01-28-2010 |
| 20100205345 | MICROCONTROLLER WITH LINEAR MEMORY ACCESS IN A BANKED MEMORY - A microcontroller has a data memory divided into a plurality of memory banks, an address multiplexer for providing an address to the data memory, an instruction register providing a first partial address to a first input of the address multiplexer, a bank select register which is not mapped to the data memory for providing a second partial address to a the first input of the address multiplexer, and a plurality of special function registers mapped to the data memory, wherein the plurality of special function registers comprises an indirect access register coupled with a second input of the address multiplexer, and wherein the data memory comprises more than one memory bank of the plurality of memory banks that form a block of linear data memory to which no special function registers are mapped. | 08-12-2010 |
| 20100205346 | MICROCONTROLLER WITH SPECIAL BANKING INSTRUCTIONS - An instruction set for a microcontroller with a data memory divided into a plurality of memory banks wherein the data memory has more than one memory bank of the plurality of memory banks that form a block of linear data memory to which no special function registers are mapped, a bank select register which is not mapped to the data memory for selecting a memory bank, and with an indirect access register mapped to at least one memory bank, wherein the instruction set includes a plurality of instructions operable to directly address all memory locations within a selected bank, at least one instruction that provides access to the bank select register, and at least one instruction performing an indirect address to the data memory using the indirect access register. | 08-12-2010 |
| 20110234417 | FAILSAFE OSCILLATOR MONITOR AND ALARM - A failsafe oscillator monitor and alarm circuit receives clock pulses from an external oscillator that if a failure thereto occurs, the failsafe oscillator monitor and alarm circuit will notify a digital processor of the external oscillator failure. The failsafe oscillator monitor and alarm circuit is a very low current usage circuit that charges a storage capacitor with clock pulses from the external oscillator when functioning normally and discharges the storage capacitor with a constant current sink if the external oscillator stops functioning. When the voltage charge on the storage capacitor becomes less than a reference voltage an alarm signal is sent to the digital processor for exception or error handling of the failed external oscillator. | 09-29-2011 |
| 20130088238 | Differential Current Measurements to Determine ION Current in the Presence of Leakage Current - An ion chamber provides a current representative of its characteristics as affected by external conditions, e.g., clean air or smoke. A direct current (DC) voltage is applied to the ion chamber at a first polarity and the resulting current through the ion chamber and parasitic leakage current is measured at the first polarity, then the DC voltage is applied to the ion chamber at a second polarity opposite the first polarity, and the resulting current through the ion chamber and parasitic leakage current is measured at the second polarity. Since substantially no current flows through the ion chamber at the second polarity, the common mode parasitic leakage current contribution may be removed from the total current measurement by subtracting the current measured at the second polarity from the current measured at the first polarity, resulting in just the current through the ion chamber. | 04-11-2013 |
| 20130154657 | Method and Apparatus for Detecting Smoke in an ION Chamber - A smoke detection sensor ion chamber has a capacitance and a change in the permittivity of that capacitance dielectric (ionized air in the chamber) may be used to detect the presence of smoke therein. Smoke from typical fires is mainly composed of unburned carbon that has diffused in the surrounding air and rises with the heat of the fire. The permittivity of the carbon particles is about 10 to 15 times the permittivity of clean air. The addition of the carbon particles into the air in the ion chamber changes in the permittivity thereof that is large enough to measure by measuring a change in capacitance of the ion chamber. | 06-20-2013 |
| 20130154659 | Method and Apparatus for Detecting Smoke in an ION Chamber - A smoke detection sensor ion chamber has a leakage current that is dependent upon the permittivity of the ionized gas (air) in the chamber. Smoke from typical fires is mainly composed of unburned carbon that has diffused in the surrounding air and rises with the heat of the fire. The permittivity of the carbon particles is about 10 to 15 times the permittivity of clean air. The addition of the carbon particles into the air in the ion chamber changes the permittivity thereof that is large enough to detect by measuring a change in the leakage current of the ion chamber. | 06-20-2013 |
| 20130154670 | Method and Apparatus for Detecting Smoke in an ION Chamber - A smoke detection sensor ion chamber has a capacitance and a change in the permittivity of that capacitance dielectric (ionized air in the chamber) may be used to detect the presence of smoke therein. Smoke from typical fires is mainly composed of unburned carbon that has diffused in the surrounding air and rises with the heat of the fire. The permittivity of the carbon particles is about 10 to 15 times the permittivity of clean air. The addition of the carbon particles into the air in the ion chamber changes in the permittivity thereof that is large enough to measure by measuring a change in capacitance of the ion chamber. | 06-20-2013 |
| 20130162269 | Current Sensing with Internal ADC Capacitor - External conditions, e.g., smoke, temperature, humidity, humidity, pressure, flow rate, etc., affects a sensor's characteristics, wherein the sensor provides a current output representative of its characteristics as affected by the external conditions. The current output of the sensor is coupled to a sample and hold capacitor for a precision time period thereby charging the sample and hold capacitor to a voltage proportional to current provided by the sensor over the precision time period. The voltage on the sample and hold capacitor is converted to a digital representation and a determination is made whether the external condition represents an alarm situation, e.g., smoke detected from a fire. | 06-27-2013 |
| 20130254476 | Microcontroller with Context Switch - A microprocessor or microcontroller device may have a central processing unit (CPU), a data memory coupled with the CPU, wherein the data memory is divided into a plurality of memory banks, wherein a bank select register determines which memory bank is currently coupled with the CPU. Furthermore, a first and second set of special function registers are provided, wherein upon occurrence of a context switch either the first or the second set of special function register are selected as active context registers for the CPU and the respective other set of special function registers are selected as inactive context registers, wherein at least some of the registers of the active context registers are memory mapped to more than two memory banks of the data memory and wherein all registers of the inactive context registers are memory mapped to at least one memory location within the data memory. | 09-26-2013 |
| 20140019991 | ENHANCED MICROPROCESSOR OR MICROCONTROLLER - A microcontroller device has a central processing unit (CPU); a data memory coupled with the CPU divided into a plurality of memory banks, a plurality of special function registers and general purpose registers which may be memory-mapped, wherein at least the following special function registers are memory-mapped to all memory banks a status register, a bank select register, a plurality of indirect memory address registers, a working register, and a program counter high latch; and wherein upon occurrence of a context switch, the CPU is operable to automatically save the content of the status register, the bank select register, the plurality of indirect memory address registers, the working register, and the program counter high latch, and upon return from the context switch restores the content of the status register, the bank select register, the plurality of indirect memory address registers, the working register, and the program counter high latch. | 01-16-2014 |
| 20140035753 | SMOKE DETECTION USING CHANGE IN PERMITTIVITY OF CAPACITOR AIR DIELECTRIC - A capacitor having air dielectric between its plates may be used to detect the presence of smoke and other contaminants in the dielectric air passing over the plates of the capacitor. Smoke from typical fires is mainly composed of unburned carbon that has diffused in the surrounding air and rises with the heat of the fire. The permittivity of the carbon particles is about 10 to 15 times the permittivity of clean air. The addition of the carbon particles into the air creates a change in the permittivity thereof that is large enough to measure by measuring a change in capacitance of the capacitor having the air dielectric through which the air laden carbon particles pass through. | 02-06-2014 |
| 20140258455 | Geolocated Network - A method according to embodiments comprises creating a geolocated network of nodes representing a network of devices where each node is identified in the geolocated network by an address that is formed using the geographical location of the node. Messages are transmitted within the geolocated network from sender to geographic targets. Message are received by nodes in the network and each recipient node determines whether it is an intended recipient of the message by evaluating whether it is geographically located within the geographic targets of the message. The geographic targets of messages can be comprised of path information where the path information specifies that recipient nodes geographically located along the path are intended recipients of the message. Nodes within the geolocated network participate in routing of messages by forwarding messages along paths specified by the path information, if the node determines it is located along the path. | 09-11-2014 |
| 20140265627 | Combined Power Supply and Input/Output System with Boost Capability - A combined power and input/output system for an electronic device includes a host system; a target system operably coupled to the host system via a combined power and I/O line; and a power boost circuit in the target system for enabling a higher voltage target device. | 09-18-2014 |
| 20140265866 | Constant Brightness LED Drive Communications Port - A light emitting diode (LED) is driven with a plurality of pulses having controllable pulse widths and positions within clock time periods that provide for both LED light intensity control and digital information communications from a single output node of an integrated circuit (IC) device. The LED light intensity is determined by the duty cycle of the pulses where the human eye integrates these light pulses from the LED into continuous light intensity levels. The digital information contained in the light output from the LED is detected by a photo-detector that converts the light pulses into electric signals that are demodulated and read by a circuit debugger and/or manufacturing test station. The aforementioned operations allow continuous visual display and data transmission using only one output node of the IC device. This is especially advantageous when using low pin count IC devices. | 09-18-2014 |
| 20140270048 | Digital Period Divider - A digital period divider has a first counter with R least significant bits (LSB) and P most significant bits (MSB) having a count input and a reset input, wherein the count input receives a first clock signal and the reset input receives a second clock signal; a latch having P bits and being coupled with the P bits of the first counter; a second counter having P bits and a count input and a reset input, wherein the count input receives the first clock signal; and a first comparator operable to compare the P bits of the latch with the P bits of the second counter and generating an output signal, wherein the output signal is also fed to the reset input of the second counter. | 09-18-2014 |
| 20140281049 | Combined Power and Input/Output Line - An electronic device including a host system including a source; and a target system operably coupled to the host system via a combined power I/O line; wherein the target system includes a pass transistor and a switching system cooperative to allow the source to charge a power supply capacitor on the target system via the combined power I/O line in a first mode and alternately charge and discharge the power supply capacitor during a communication via the combined power I/O line in a second mode, wherein the alternately charging and discharging is in synchronization with said communication. | 09-18-2014 |
