Patent application number | Description | Published |
20090033374 | Clock generator - A frequency divider, comprising an input for receiving an input clock signal having a first frequency; a divider, for generating an output signal having an instantaneous frequency equal to the first frequency divided by an instantaneous division ratio; and a sequence generator, for generating a sequence of instantaneous division ratios by adding a sequence of instantaneous dither values to an integer value. The instantaneous division ratios in the sequence have a mean value that is equal to an integer desired ratio, but none of the instantaneous division ratios in the sequence is equal to the integer desired ratio. | 02-05-2009 |
20090033376 | Locked loop circuit - A circuit for receiving an input signal having a first frequency and generating an output signal having a second frequency. The circuit comprises a forward branch for receiving the input signal and generating the output signal and a return branch for generating a feedback signal from the output signal. The forward branch comprises a frequency detector for receiving the input signal and the feedback signal and outputting a value based on a ratio of a frequency of the feedback signal to the first frequency; a word length reduction block for receiving a fractional component of a first division factor and generating a modulated output; an adder for forming a sum of an integer component of the first division factor and the modulated output of the word length reduction block; a subtracting element for subtracting the output value of the frequency detector from the sum; and an oscillator controlled by an output from the subtracting element. | 02-05-2009 |
20090033382 | Frequency synthesizer - A circuit for receiving an input signal and generating an output signal, the input signal having a first frequency, the output signal having a second frequency. The circuit comprises a forward branch for generating the output signal and a return branch for feeding back the output signal. The return branch comprises a frequency divider for receiving the output signal, for dividing the frequency of the output signal by a factor, and for outputting a modified output signal. The forward branch comprises a detector for comparing the input signal and the modified output signal and outputting a comparison signal indicative of the comparison; a word-length reduction circuit for reducing the number of bits of the comparison signal, thereby generating a reduced-length comparison signal; a digital-to-analog converter for converting the reduced-length comparison signal to analog, thereby generating an analog signal; and an oscillator, controlled by said analog signal. By reducing the word length of the input to the digital-to-analog converter, the digital-to-analog converter may be greatly simplified. | 02-05-2009 |
20090256642 | LOCKED-LOOP CIRCUIT - A locked loop circuit, comprising: an input, for receiving an input signal; controllable modification circuitry for generating a signal; an output for the generated signal; a feedback loop for the generated signal; a comparator for comparing the input signal and a signal from the feedback loop, and for producing a comparison signal; circuitry for controlling the modification circuitry on the basis of the comparison signal; and dither circuitry, for adjusting the comparison signal by applying a dither value, where the dither value is non-zero at all times. | 10-15-2009 |
20090279719 | CAPACITIVE TRANSDUCER CIRCUIT AND METHOD - A capacitive transducer circuit includes a capacitive transducer having first and second electrodes. The first and second electrodes are biased by respective first and second bias voltages. An amplifier is connected to receive a first analog signal on an input terminal, the first analog signal being generated by the capacitive transducer, and to generate a second analog signal on an output terminal. A digital feedback circuit is connected between the output terminal of the amplifier and the input terminal of the amplifier. The digital feedback circuit is configured to provide one of said first or second bias voltages. A switched capacitor filter circuit may be arranged between the voltage source and the transducer and may be arranged to filter the output of the voltage source. | 11-12-2009 |
20100052638 | DC-DC Converter Circuits, and Methods and Apparatus Including Such Circuits - Electrical power from an input voltage supply is converted to first and second output voltages of opposite polarities using a single inductor (L) and only four principal switches (S | 03-04-2010 |
20100060498 | CALIBRATION CIRCUIT AND ASSOCIATED METHOD - A calibration circuit and method suitable for black level calibration in image processing, the circuit comprising an analogue gain amplifier, an analogue to digital converter; a correction circuit for receiving a digital signal and providing a digital offset signal; and a digital to analogue converter for receiving said digital offset signal and feeding a corresponding analogue offset signal back to the input of said gain amplifier. The calibration circuit is arranged such that the correction circuit and said digital to analogue converter form a feedback loop applying an offset to said input signal and said correction circuit includes an inverse gain circuit for applying an inverse gain to a signal within said correction circuit prior to said digital to analogue converter. Preferably the inverse gain applied is such that the total loop gain does not deviate too far from unity. | 03-11-2010 |
20100219888 | AMPLIFIER CIRCUIT - An amplifier circuit comprises an input, for receiving an input signal to be amplified; a preamplifier, for amplifying the input signal based on a variable gain; a power amplifier for amplifying the signal output from the preamplifier, and a variable voltage power supply for supplying one or more supply voltages to the power amplifier. The supply voltages are adjusted based on the variable gain or the input digital signal. According to other aspects of the invention, a power supply of an amplifier circuit is clocked using a clock signal, whereby the clock signal has a frequency that varies in accordance with a volume signal or an input signal. | 09-02-2010 |
20100315097 | AMPLIFIER CIRCUIT - An amplifier circuit comprises an amplifier for amplifying an input signal and outputting the amplified signal to an external device. A power supply provides a supply voltage to the amplifier. The nature or type of external device (for example line-load or headphones) is determined by measuring a parameter related to the supply voltage. The parameter may be the time taken for the supply voltage to fall or rise a predefined threshold value. Alternatively, the measured parameter may be a voltage drop or voltage rise over a predetermined period of time. Both of these parameters give an indication as to the rate of change of the supply voltage with time, which provides an indication of the nature of the load. Processing circuitry may be provided for calibrating the rate of change of the supply voltage with time, based on the input signal. | 12-16-2010 |
20100315272 | CAPACITIVE TRANSDUCER CIRCUIT AND METHOD - A capacitive transducer circuit comprises a capacitive transducer having first and second electrodes. The first and second electrodes are biased by respective first and second bias voltages. An amplifier is connected to receive a first analogue signal on an input terminal, the first analogue signal being generated by the capacitive transducer, and to generate a second analogue signal on an output terminal. A digital feedback circuit is connected between the output terminal of the amplifier and the input terminal of the amplifier. The digital feedback circuit is configured to provide one of said first or second bias voltages. The output of a voltage source which provides the other bias voltage for the capacitive transducer may be filtered by a low pass filter. The low pass filter may comprise a switched capacitor filter circuit. | 12-16-2010 |
20110055877 | AMPLIFIER CIRCUIT - There is provided an audio amplifier circuit ( | 03-03-2011 |
20110221533 | AMPLIFIER CIRCUIT AND METHOD OF AMPLIFYING A SIGNAL IN AN AMPLIFIER CIRCUIT - There is provided an amplifier circuit, comprising: an input, for receiving an input signal to be amplified; a power amplifier, for amplifying the input signal; a switched power supply, having a switching frequency, for providing at least one supply voltage to the power amplifier; and a dither block, for dithering the switching frequency of the switched power supply. The dither block is controlled based on the input signal. Another aspect of the invention involves using first and second switches, each having different capacitances and resistances, and using the first or second switch depending on the input signal or volume signal. Another aspect of the invention involves controlling a bias signal provided to one or more components in the signal path based on the input signal or volume signal. | 09-15-2011 |
20110273151 | DC-DC CONVERTER CIRCUITS, AND METHODS AND APPARATUS INCLUDING SUCH CIRCUITS - Electrical power from an input voltage supply is converted to first and second output voltages of opposite polarities using a single inductor (L) and only four principal switches (S | 11-10-2011 |
20120154032 | DC OFFSET COMPENSATION - An apparatus and method for DC offset compensation. An amplifier receives an input signal (A | 06-21-2012 |
20120163632 | CHARGE PUMP CIRCUIT - A bipolar output charge pump circuit | 06-28-2012 |
20120170770 | CHARGE PUMP CIRCUIT - A bipolar output charge pump circuit having a network of switching paths | 07-05-2012 |
20120242413 | AMPLIFIER CIRCUIT AND METHOD OF AMPLIFYING A SIGNAL IN AN AMPLIFIER CIRCUIT - An amplifier circuit, comprising: an input, for receiving an input signal to be amplified; a power amplifier, for amplifying the input signal; a switched power supply, having a switching frequency, for providing at least one supply voltage to the power amplifier; and a dither block, for dithering the switching frequency of the switched power supply. The dither block is controlled based on the input signal. Another aspect of the invention involves using first and second switches, each having different capacitances and resistances, and using the first or second switch depending on the input signal or volume signal. Another aspect of the invention involves controlling a bias signal provided to one or more components in the signal path based on the input signal or volume signal. | 09-27-2012 |
20130120063 | AMPLIFIER CIRCUIT - Class D amplifier circuits for amplifying an input signal. The amplifier has an H-bridge output stage and thus has switches for switchably connecting a first output to a first voltage, e.g. Vdd, or a second voltage (e.g. ground) and for switchably connecting a second output to the first or second voltages. A switch controller is configured to control the H-bridge stage so as to vary between a plurality of states including at least a first state in which the outputs are both connected to the first voltage and a second state in which the outputs are both connected to said second voltage. The switch controller is configured to vary the proportion of time spent in the first state relative to the second state based on an indication of the amplitude of the input signal. The amplifier may therefore have first circuitry for deriving a proportion value (α) based on the input signal (Din) and second circuitry for generating control signals for selecting the first state or said second state based on the proportion value (α). | 05-16-2013 |
20130127531 | AMPLIFIER CIRCUIT WITH OFFSET CONTROL - Methods and apparatus for Class-D amplifier circuits with D.C. offset control/correction. A Class-D amplifier is described having an output stage, such as a full H-bridge or half bridge, with a plurality of switches operable to provide a plurality of output states comprising at least a positive output state and a negative output state. Control circuitry is configured to receive a first signal based on the input signal and produce a digital control signal, which is used to determine the switch state of the output stage. A digital integrator is configured to receive a feedback signal indicative of the output state of the output stage and to sample the feedback signal at a sample rate and produce an integrated output signal (INT, IVC) indicating the difference in number of instances of the positive output state and the negative output state. Correction circuitry subtracts the integrated output signal from the input signal to produce a D.C. offset corrected signal. | 05-23-2013 |
20130129114 | CLOCK GENERATOR - A clock generator receives first and second clock signals, and input representing a desired frequency ratio. A comparison is made between frequencies of an output clock signal and the first clock signal, and a first error signal represents the difference between the desired frequency ratio and this comparison result. The first error signal is filtered. A comparison is made between frequencies of the output clock signal and the second clock signal, and a second error signal represents the difference between the filtered first error signal and this comparison result. The second error signal is filtered. A numerically controlled oscillator receives the filtered second error signal and generates an output clock signal. As a result, the output clock signal has the jitter characteristics of the first input clock signal over a useful range of jitter frequencies and the frequency accuracy of the second input clock signal. | 05-23-2013 |
20130197920 | DATA TRANSFER - Circuitry for transferring multiple digital data streams, e.g. digital audio data, over a single communications link such as a single wire. A pulse-length-modulator is responsive to a plurality of data streams to generate a series of data pulses with a single data pulse having a rising and falling edge in each of a plurality of transfer periods defined by a first clock signal. The timing of the rising and falling edge of each data pulse is dependent on a combination of the then current data samples from the plurality of data streams. The duration and position of the data pulse in the transfer window in effect defines a data symbol encoding the data. An interface receives the stream of data pulses, and data extraction circuitry samples the data pulse to determine which of the possible data symbols the pulse represents and determines a data value for at least one received data stream. | 08-01-2013 |
20130300508 | AMPLIFIER CIRCUIT AND METHOD OF AMPLIFYING A SIGNAL IN AN AMPLIFIER CIRCUIT - An amplifier circuit, comprising: an input, for receiving an input signal to be amplified; a power amplifier, for amplifying the input signal; a switched power supply, having a switching frequency, for providing at least one supply voltage to the power amplifier; and a dither block, for dithering the switching frequency of the switched power supply. The dither block is controlled based on the input signal. Another aspect of the invention involves using first and second switches, each having different capacitances and resistances, and using the first or second switch depending on the input signal or volume signal. Another aspect of the invention involves controlling a bias signal provided to one or more components in the signal path based on the input signal or volume signal. | 11-14-2013 |
20130321190 | ANALOGUE-TO-DIGITAL CONVERTER - An apparatus and method for regulating analogue-to-digital converters. First and second input signals are received at controlled oscillator circuitry which generates respective first and second pulse streams with pulse rates based on the relevant input signal. Difference circuitry determines the difference in number of pulses of the first and second pulse streams and outputs a first digital signal. Circuitry also determines a signal independent value based on the number of pulses of the first and/or second pulse streams. In one embodiment this value is the sum or average of the number of pulses of the first and second pulse streams. This value can be used to calibrate for any variation in transfer characteristic of the oscillator circuitry. In one embodiment this value is compared to a reference value and a regulation signal passed to control circuitry to regulate the operation of the oscillation circuitry. | 12-05-2013 |
20140112500 | DC OFFSET COMPENSATION - An apparatus and method for DC offset compensation. An amplifier receives an input signal (A | 04-24-2014 |
20140159816 | AMPLIFIER CIRCUIT - An amplifier circuit comprises an input, for receiving an input signal to be amplified; a preamplifier, for amplifying the input signal based on a variable gain; a power amplifier for amplifying the signal output from the preamplifier; and a variable voltage power supply for supplying one or more supply voltages to the power amplifier. The supply voltages are adjusted based on the variable gain or the input digital signal. According to other aspects of the invention, a power supply of an amplifier circuit is clocked using a clock signal, whereby the clock signal has a frequency that varies in accordance with a volume signal or an input signal. | 06-12-2014 |
20150039303 | SPEECH RECOGNITION - A speech recognition system comprises: an input, for receiving an input signal from at least one microphone; a first buffer, for storing the input signal; a noise reduction block, for receiving the input signal and generating a noise reduced input signal; a speech recognition engine, for receiving either the input signal output from the first buffer or the noise reduced input signal from the noise reduction block; and a selection circuit for directing either the input signal output from the first buffer or the noise reduced input signal from the noise reduction block to the speech recognition engine. | 02-05-2015 |
20150070082 | CHARGE PUMP CIRCUIT - A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes. | 03-12-2015 |