Patent application number | Description | Published |
20090031295 | Method and System for Customizing a Software Application - The technique introduced here includes a uniform customization system, which can support the customization of multiple software applications simultaneously. Customization data of a software application can be developed separately from the development of the application. The customization data is then stored, via the uniform customization system, into a customization storage. When the software application is executed, the software application retrieves, from the storage, the values of the customization data via the uniform customization system. The uniform customization system outputs the retrieved customization data indicating the current working context of a user, which may be used by the user to locate customization options in a customization user interface of the software application, for customizing functions performed in the current working context. | 01-29-2009 |
20120239609 | System and Method of Relating Data and Generating Reports - In one embodiment the present invention includes a computer implemented method of relating data and generating reports. The method includes storing, by an OLAP system, a network data structure that relates a plurality of data objects. The method further includes storing transactional data in an in-memory database in the OLAP system. The method further includes generating, by the OLAP system, a report using the stored transactional data according to the network data structure. In this manner, deficiencies of the traditional star schema paradigm of data warehousing may be avoided. | 09-20-2012 |
20120278794 | METHOD AND SYSTEM FOR CUSTOMIZING A SOFTWARE APPLICATION - The technique introduced here includes a uniform customization system, which can support the customization of multiple software applications simultaneously. Customization data of a software application can be developed separately from the development of the application. The customization data is then stored, via the uniform customization system, into a customization storage. When the software application is executed, the software application retrieves, from the storage, the values of the customization data via the uniform customization system. The uniform customization system outputs the retrieved customization data indicating the current working context of a user, which may be used by the user to locate customization options in a customization user interface of the software application, for customizing functions performed in the current working context. | 11-01-2012 |
20140310034 | PERFORMANCE INDICATOR ANALYTICAL FRAMEWORK - Described herein is a technology for facilitating analysis of performance indicators. In accordance with one aspect, a hierarchical structure with a node representing a performance indicator is configured. Such configuration may include mapping one or more lowest level nodes to one or more data models for retrieving transactional data. In addition, one or more internal nodes of the hierarchical structure may be configured, including mapping the one or more internal nodes to one or more corresponding child nodes. The configuration data generated by such configuration may then be stored in a database for subsequent retrieval to generate a report. | 10-16-2014 |
20150206949 | TRANSISTORS AND FABRICATION METHODS THEREOF - A method is provided for fabricating transistors. The method includes providing a substrate; and forming at least one dummy gate structure having a dummy gate dielectric layer and a dummy gate electrode layer on the substrate. The method also includes forming a dielectric film on the substrate and the dummy gate structure; and performing a thermal annealing process onto the dielectric film to increase the density of the interlayer dielectric film. Further, the method includes planarizing the dielectric film having the increased density until the top surface of the dummy gate structure is exposed; and forming a dense layer having an increased density on the dielectric film having the increased density. Further, the method also includes removing the dummy gate dielectric layer and the dummy gate electrode layer to form an opening; and forming a gate dielectric layer and a gate electrode layer sequentially in the opening. | 07-23-2015 |
20150214112 | SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME - Various embodiments provide semiconductor devices and methods for forming the same. A substrate having a dielectric layer formed thereon is provided. The dielectric layer has six openings. A gate dielectric layer and a cap layer are sequentially formed in each opening of the six openings. A first work function layer is formed in a first opening and a second opening. A diffusion layer is formed in the first opening, a fifth opening, and a sixth opening. A material of the diffusion layer is diffused into the first work function layer and the cap layer, to form a doped work function layer in the first opening and a doped cap layer in the fifth opening and in the sixth opening. A second work function layer is formed in a fourth opening and the fifth opening. A third work function layer and a metal gate are formed in the each opening. | 07-30-2015 |
20150234935 | DATABASE CALCULATION USING PARALLEL-COMPUTATION IN A DIRECTED ACYCLIC GRAPH - Disclosed herein are technologies related to database calculation that utilizes parallel-computation of tasks in a directed acyclic graph. In accordance with one aspect, dependency of tasks is converted into a directed acyclic graph that topologically orders the tasks into layers of tasks. A database calculation may be performed, wherein the database calculation computes in parallel the tasks in each layer of the layers of tasks. | 08-20-2015 |
20150243564 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device may include the following steps: preparing a substrate having a PMOS region and an NMOS; forming a first gate trench on the PMOS region; forming a first high-k dielectric layer and a first high-k cap layer that cover a bottom and sides of the first gate trench; forming a second gate trench on the NMOS region; forming a second high-k dielectric layer and a second high-k cap layer that cover a bottom and sides of the second gate trench; removing a portion of the first high-k dielectric layer and a portion of the first high-k cap layer that are positioned on a side of the first gate trench; and removing a portion of the second high-k dielectric layer and a portion of the second high-k cap layer that are positioned on a side of the second gate trench. | 08-27-2015 |