Patent application number | Description | Published |
20110018511 | INTEGRATABLE EFFICIENT SWITCHING DOWN CONVERTER - A converter circuit and methods for operating the same. The converter circuit includes a supply voltage, a capacitor, an inductor, and four stacked switching elements. Each switching element is adjustable from a low resistance state to a high resistance state by a control signal. The inductor outputs current to a circuit load. The circuit may be operated in a first mode such that the output is adjustable between the supply voltage and half the supply voltage. Alternatively, in a second mode of operation, the output is adjustable from half the supply voltage to a ground voltage. | 01-27-2011 |
20110051482 | CONTENT ADDRESSABLE MEMORY ARRAY PROGRAMMED TO PERFORM LOGIC OPERATIONS - A memory device for performing logical operations on two or more input variables includes a match line and first and second memory cells. The first and second memory cells collectively include a first, second, third and fourth memory element. The first, second, third and fourth memory elements may have either a first value or a second value programmed therein and wherein the first, second, third and fourth memory elements are programmed to either the high or low resistive values based on a particular logic function to be performed. | 03-03-2011 |
20110051483 | CONTENT ADDRESSABLE MEMORY ARRAY - A memory device for storing one or more addresses includes a match line and first and second memory cells that form a 2-bit memory cell. Each memory cell includes two memory elements coupled to a match line and selection lines coupled thereto. The selection lines provide a signal representative of a logical combination of at least two different inputs. | 03-03-2011 |
20110051485 | CONTENT ADDRESSABLE MEMORY ARRAY WRITING - A memory system for storing one or more addresses includes a transposable memory having word lines, bit lines, transposed word lines and transposed bit lines and that receives and stores an input array having dimensions M by N and a content addressable memory (CAM) that reads the transposed word lines of the transposable memory to form input words and that stores the input words in an N by M array. | 03-03-2011 |
20110051486 | CONTENT ADDRESSABLE MEMORY REFERENCE CLOCK - A memory system includes a content addressable memory (CAM) including a plurality of match lines, each match line having a plurality of memory cells coupled thereto. The system also includes a match detector coupled to the CAM and a reference match line having a plurality of reference memory cells coupled thereto, the reference memory cells being of the same type and the memory cells. The system also includes a match line sensor coupled to the reference match line and the match detector that determines a characteristic of the reference match line and provides a timing signal to the match detector based on the characteristic. | 03-03-2011 |
Patent application number | Description | Published |
20100291461 | PREPARATION OF NANOSTRUCTURED THIN CATALYTIC LAYER-BASED ELECTRODE INK - A method of making an electrode ink containing nanostructured catalyst elements is described. The method comprises providing an electrocatalyst decal comprising a carrying substrate having a nanostructured thin catalytic layer thereon, the nanostructure thin catalytic layer comprising nanostructured catalyst elements; providing a transfer substrate with an adhesive thereon; transferring the nanostructured thin catalytic layer from the carrying substrate to the transfer substrate; removing the nanostructured catalyst elements from the transfer substrate; providing an electrode ink solvent; and dispersing the nanostructured catalyst elements in the electrode ink solvent. Electrode inks, coated substrates, and membrane electrode assemblies made from the method are also described. | 11-18-2010 |
20100291467 | FABRICATION OF CATALYST COATED DIFFUSION MEDIA LAYERS CONTAINING NANOSTRUCTURED THIN CATALYTIC LAYERS - A method of transferring nanostructured thin catalytic layers to a gas diffusion layer and thus making a catalyst coated diffusion media is described. The method includes treating the gas diffusion layer with a temporary adhesive to temporarily increase the adhesion strength within the microporous layer and to carbon fiber paper substrate, transferring the nanostructured thin catalytic layer to the microporous side of a gas diffusion media layer. The nanostructured thin catalytic layer can then be further processed, including adding additional components or layers to the nanostructured thin catalytic layer on the gas diffusion media layer. Preparation of catalyst coated diffusion media and a catalyst coated diffusion media based membrane electrode assembly (MEA) are also described. | 11-18-2010 |
20100291473 | FABRICATION OF ELECTRODES WITH MULTIPLE NANOSTRUCTURED THIN CATALYTIC LAYERS - A method of making a reconstructed electrode having a plurality of nanostructured thin catalytic layers is provided. The method includes combining a donor decal comprising at least one nanostructured thin catalytic layer on a substrate with an acceptor decal comprising a porous substrate and at least one nanostructured thin catalytic layer. The donor decal and acceptor decal are bonded together using a temporary adhesive, and the donor substrate is removed. The temporary adhesive is then removed with appropriate solvents. Catalyst coated proton exchange membranes and catalyst coated diffusion media made from the reconstructed electrode decals having a plurality of nanostructured thin catalytic layers are also described. | 11-18-2010 |
20110189580 | CO-DEPOSITION OF CONDUCTIVE MATERIAL AT THE DIFFUSION MEDIA/PLATE INTERFACE - A method of depositing a conductive material is described. The method includes: providing a plate selected from anode plates, cathode plates, bipolar plates, or combinations thereof, wherein the plate includes gas flow channels; providing a diffusion media in contact with the gas flow channel side of the plate to form an assembly; introducing a gaseous precursor of the conductive material into the assembly using a chemical vapor infiltration process; infiltrating the gaseous precursor into the diffusion media and gas flow channels of the plates; and depositing a coating of the conductive material on the diffusion media, the gas flow channels of the plate, or both. An assembly having a CVI conductive coating and a fuel cell incorporating the diffusion media having the CVI conductive coating are also described. | 08-04-2011 |
20110294037 | ELECTRODE CONTAINING NANOSTRUCTURED THIN CATALYTIC LAYERS AND METHOD OF MAKING - A method of making an electrode is provided. The method includes providing an electrocatalyst decal comprising a carrying substrate having a nanostructured thin catalytic layer thereon; providing a transfer substrate with an adjacent adhesive layer; adhering the nanostructured thin catalytic layer adjacent to the adhesive layer to form a composite structure; removing the carrying substrate from the composite structure; and removing the transfer substrate from the composite structure to form the stand-alone nanostructured thin catalytic film comprising the adhesive layer with the nanostructured thin catalytic layer adhered thereto. A stand alone nanostructured thin catalytic film and methods of constructing electrodes with the stand alone nanostructured thin catalytic films are also described. | 12-01-2011 |
20130260278 | PREPARATION OF NANOSTRUCTURED THIN CATALYTIC LAYER-BASED ELECTRODE INK - A method of making an electrode ink containing nanostructured catalyst elements is described. The method comprises providing an electrocatalyst decal comprising a carrying substrate having a nanostructured thin catalytic layer thereon, the nanostructure thin catalytic layer comprising nanostructured catalyst elements; providing a transfer substrate with an adhesive thereon; transferring the nanostructured thin catalytic layer from the carrying substrate to the transfer substrate; removing the nanostructured catalyst elements from the transfer substrate; providing an electrode ink solvent; and dispersing the nanostructured catalyst elements in the electrode ink solvent. Electrode inks, coated substrates, and membrane electrode assemblies made from the method are also described. | 10-03-2013 |