Patent application number | Description | Published |
20110175677 | DISTRIBUTED DOHERTY POWER AMPLIFIER - Provided is a distributed Doherty power amplifier exhibiting high efficiency and linearity at a wide range of bandwidths, the distributed Doherty power amplifier including a first amplifier; a second amplifier, which is connected to the first amplifier in parallel; a first shifting unit, which is interconnected between the input of the first amplifier and the input of the second amplifier and inverses the phase of the input of the second amplifier; and a second shifting unit, which is interconnected between the output of the first amplifier and the output of the second amplifier and inverses the phase of the output of the second amplifier, wherein the first amplifier and the second amplifier are Doherty power amplifiers, and each of the Doherty power amplifiers includes a carrier amplifier and a peaking amplifier, which are connected in parallel. | 07-21-2011 |
20120112833 | 3-WAY DOHERTY POWER AMPLIFIER USING DRIVING AMPLIFIER - Disclosed is a 3-way Doherty power amplifier using a driving amplifier in which driving amplifiers are connected to the front stages of a carrier amplifier and a peaking amplifier, respectively, so as to obtain a high gain and a high efficiency. To this end, the Doherty power amplifier includes: a hybrid power distributor for distributing an input signal into first and second path units; and a driving amplifier for receiving a signal outputted from the hybrid power distributor and controlling the driving of a carrier amplifier, a first peaking amplifier, and a second peaking amplifier, wherein: the carrier amplifier, the first peaking amplifier, and the second peaking amplifier are connected to a rear stage of the driving amplifier, respectively; the first path unit generates a high efficiency at a low input power; and the second path unit maintains a high efficiency and gain in a high output range. | 05-10-2012 |
20120218044 | Three-Stage GaN HEMT Doherty Power Amplifier for High Frequency Applications - A three-stage GaN HEMT Doherty power amplifier for high frequency applications includes: a carrier amplifier; first and second peaking amplifier; a 10-dB power divider configured to divide an input signal to the carrier amplifier and the first and second peaking amplifiers; a first path for controlling input power of the carrier amplifier; and a second path for maintaining an efficiency of 40% or more in an output range of 40 dBm to 50 dBm. | 08-30-2012 |
20130285019 | FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING THE SAME - Provided is a field effect transistor including a drain region, a source region, and a channel region. The field effect transistor may further include a gate electrode on or surrounding at least a portion of the channel region, and a gate dielectric layer between the channel region and the gate electrode. A portion of the channel region adjacent the source region has a sectional area smaller than that of another portion of the channel region adjacent the drain region. | 10-31-2013 |
20140034907 | NANOWIRE SENSOR HAVING NANOWIRE OF NETWORK STRUCTURE - A nanowire sensor having a nanowire in a network structure includes: source and drain electrodes formed over a substrate; a nanowire formed between the source and drain electrodes and having a network structure in which patterns of intersections are repeated; and a detection material fixed to the nanowire and selectively reacting with a target material introduced from outside. | 02-06-2014 |
20140326305 | SOLAR CELL AND METHOD FOR MANUFACTURING SAME - Disclosed are a solar cell and a method for manufacturing the same. The solar cell comprises asymmetric nanowires each of which has an angled sidewall, and thus incident light can be concentrated at a p-n junction portion by means of a total reflection phenomenon of light caused by the difference between the refractive indices of a semiconductor layer and a transparent electrode layer, and light absorption may increase due to an increase in the light travel distance, thus improving photoelectric efficiency. Further, the method for manufacturing the solar cell involves etching a substrate and integrally forming the substrate and a p-type semiconductor layer including the asymmetric nanowires each of which has the angled sidewalls, thereby enabling reduced manufacturing costs and simple and easy manufacture of the nanowires having the angled sidewalls. | 11-06-2014 |