Patent application number | Description | Published |
20090068085 | Method for fabricating carbon nanotubes and carbon nano particles - Disclosed is a method of fabricating carbon nanotubes and carbon nano particles, the method comprising: providing a plurality of carbon micro carriers on a silicon substrate; forming a plurality of carbon nano particles on the carbon micro carrier by a first gas; and reacting with a second gas to provide a plurality of carbon nanotubes. Thus the carbon nanotube can be formed without the use of a metal catalyst. The carbon nanotubes can easily separate from each other without the problem of non-uniformity, because the carbon micro carrier used is in a microscale size. | 03-12-2009 |
20090167147 | Composite field emission source and method of fabricating the same - A method of fabricating a composite field emission source is provided. A first stage of film-forming process is performed by using RF magnetron sputtering, so as to form a nano structure film on a substrate, in which the nano structure film is a petal-like structure composed of a plurality of nano graphite walls. Afterward, a second stage of film-forming process is performed for increasing carbon accumulation amount on the nano structure film. Therefore, the composite field emission source with high strength and nano coral-like structures can be obtained, whereby improving the effect and life of electric field emission. | 07-02-2009 |
20100123382 | Field emission cathode plate and method for fabricating the same - A field emission cathode plate is disclosed, which includes: a substrate; a cathode layer, disposed on the substrate; a conductive layer with an arc surface or a resistor layer with an opening and resistivity larger than that of the cathode layer, disposed on the cathode layer; and a cambered field emission layer, having an arc surface and disposed on the conductive layer or on the cathode layer in the opening of the resistor layer and covering the resistor layer around the opening. The present invention also provides a method for fabricating the above-mentioned field emission cathode plate. The method can provide field emission cathode plate achieving uniform field emission and does not involve high resolution and cost. | 05-20-2010 |
20110101847 | FIELD EMISSION CATHODE PLATE AND METHOD FOR FABRICATING THE SAME - A field emission cathode plate is disclosed, which includes: a substrate; a cathode layer, disposed on the substrate; a conductive layer with an arc surface or a resistor layer with an opening and resistivity larger than that of the cathode layer, disposed on the cathode layer; and a cambered field emission layer, having an arc surface and disposed on the conductive layer or on the cathode layer in the opening of the resistor layer and covering the resistor layer around the opening. The present invention also provides a method for fabricating the above-mentioned field emission cathode plate. The method can provide field emission cathode plate achieving uniform field emission and does not involve high resolution and cost. | 05-05-2011 |
20120090986 | Method of fabricating composite field emission source - A method of fabricating a composite field emission source is provided. A first stage of film-forming process is performed by using RF magnetron sputtering, so as to form a nano structure film on a substrate, in which the nano structure film is a petal-like structure composed of a plurality of nano graphite walls. Afterward, a second stage of film-forming process is performed for increasing carbon accumulation amount on the nano structure film and thereby growing a plurality of nano coral-like structures on the petal-like structure. Therefore, the composite field emission source with high strength and nano coral-like structures can be obtained, whereby improving the effect and life of electric field emission. | 04-19-2012 |
Patent application number | Description | Published |
20090108957 | PHASE SHIFTER - A phase shifter includes a metal plate, a support portion, a slot, a coupling portion, and a ground portion. The phase shifter effectively improves signal coupling efficiency, and inhibits noise generated with the change of phase shift due to signal transmission. The phase shifter is advantageous in smaller volume, easy to assemble, and low cost. | 04-30-2009 |
20090128414 | HIGH GAIN OMNI-DIRECTIONAL ANTENNA - A high gain omni-directional antenna includes a substrate, a signal feed-in portion, a first radiating unit, and a second radiating unit. The first radiating unit and second radiating unit respectively have a first radiation contact and a second radiation contact, for connecting the first radiating unit and the second radiating unit in series so as to form a circular closed loop. The high gain omni-directional antenna avoids the coupling effect between the signal line and the radiating end of the conventional high gain omni-directional antenna, and further solves the problem of excessively high directivity caused by the distance between the signal line and the radiating end. The design of the ring antenna of the high gain omni-directional antenna can raise the impedance and also realize a broader bandwidth. | 05-21-2009 |
20090128429 | METHOD OF INHIBITING CROSS-POLARIZATION OF MICROSTRIP ANTENNA AND A DEVICE THEREOF - A method of inhibiting cross-polarization of a microstrip antenna and a device thereof. Increase of a microstrip antenna array not only increases co-polarization, but also increases cross-polarization. When the microstrip antenna is designed and fabricated, the fabricated antenna is tested first. That is, intensity distribution of the cross-polarization in a radiation frequency band is tested first, and a radiation frequency that the cross-polarization is corresponding change with is found out when an antenna radiation unit is broken. A slot is fabricated in the corresponding antenna radiation unit to break the symmetry of the antenna radiation unit, so as to effectively inhibit the cross-polarization without influencing the co-polarization of the antenna radiation unit at a corresponding radiation frequency. | 05-21-2009 |
20090128435 | SLOT-COUPLED MICROSTRIP ANTENNA - A slot-coupled microstrip antenna includes a first substrate, a second substrate, and a support base. The first substrate having a first surface and a second surface, in which a ground surface that is formed on the first surface, and a plurality of slots are formed on the ground surface. A feeding network is formed on the second surface. A plurality of antenna corresponding to the slots are formed on the second substrate disposed above the first surface. The support base having two fillisters at two side of the support base. The design of slot structure often has adverse influence on cross polarization and a front-to-back ratio of antenna radiation. The support base having two fillisters of the slot-coupled microstrip antenna can effectively inhibit the influence on the cross polarization and raise the front-to-back ratio from the slots. | 05-21-2009 |
Patent application number | Description | Published |
20120119845 | Balun System and Method - A system and method for transmitting signals is disclosed. An embodiment comprises a balun, such as a Marchand balun, which has a first transformer with a primary coil and a first secondary coil and a second transformer with the primary coil and a second secondary coil. The first secondary coil and the second secondary coil are connected to a ground plane, and the ground plane has slot lines located beneath the separation of the coils in the first transformer and the second transformer. The slot lines may also have fingers. | 05-17-2012 |
20120153433 | Tuning the Efficiency in the Transmission of Radio-Frequency Signals Using Micro-Bumps - A device includes a die including a main circuit and a first pad coupled to the main circuit. A work piece including a second pad is bonded to the die. A first plurality of micro-bumps is electrically coupled in series between the first and the second pads. Each of the plurality of micro-bumps includes a first end joining the die and a second end joining the work piece. A micro-bump is bonded to the die and the work piece. The second pad is electrically coupled to the micro-bump. | 06-21-2012 |
20120267626 | Transmission Line Characterization Using EM Calibration - A method includes simulating characteristics of a first transmission line having a first length, and simulating characteristics of a second transmission line having a second length greater than the first length. A calculation is then performed on the characteristics of the first transmission line and the characteristics of the second transmission line to generate intrinsic characteristics of a third transmission line having a length equal to a difference of the second length and the first length. | 10-25-2012 |
20120268229 | Compact Vertical Inductors Extending in Vertical Planes - A device includes a substrate, and a vertical inductor over the substrate. The vertical inductor includes a plurality of parts formed of metal, wherein each of the parts extends in one of a plurality of planes perpendicular to a major surface of the substrate. Metal lines interconnect neighboring ones of the plurality of parts of the vertical inductor. | 10-25-2012 |
20120278050 | Accelerated Generation of Circuit Parameter Distribution Using Monte Carlo Simulation - A method includes providing an integrated circuit device comprising a plurality of input parameters and an electrical parameter. A simulation is performed using a simulation model to simulate a plurality of data of the electrical parameter, wherein the plurality of data are generated through simulation from a first plurality of input parameter sets reflecting values of the plurality of input parameters, and wherein the plurality of data is distributed in a range. A first sub-range among the range is selected. All of the plurality of data falling into the first sub-range are selected, and are fitted with corresponding ones of the first input parameter sets to generate a first function, wherein the electrical parameter is expressed as the first function of the plurality of input parameters. The first function is different from functions in the simulation model. | 11-01-2012 |
20120299778 | ANTENNA USING THROUGH-SILICON VIA - An antenna includes a substrate and a top plate disposed over the substrate. At least one feed line is connected to the top plate, and each feed line comprises a first through-silicon via (TSV) structure passing through the substrate. At least one ground line is connected to the top plate, and each ground line comprises a second TSV structure passing through the substrate. The top plate is electrically conductive, and the at least one feed line is arranged to carry a radio frequency signal. The at least one ground line is arranged to be coupled to a ground. | 11-29-2012 |
20130032799 | Apparatus and Methods for De-Embedding Through Substrate Vias - A method includes providing on a substrate having at least two through substrate vias (“TSVs”) a plurality of test structures for de-embedding the measurement of the intrinsic characteristics of a device under test (DUT) including at least two of the TSVs; measuring the intrinsic characteristics [L] for a first and a second test structure on the substrate including two pads coupled with a transmission line of length L; using simultaneous solutions of ABCD matrix or T matrix form equations, and the measured intrinsic characteristics, solving for the intrinsic characteristics of the pads and the transmission lines; de-embedding the measurements of the third and fourth test structures using the intrinsic characteristics of the pads and the transmission lines; and using simultaneous solutions of ABCD matrix or T matrix form equations for BM_L and BM_LX, and the measured intrinsic characteristics, solving for the intrinsic characteristics of the TSVs. | 02-07-2013 |
20130277794 | Tuning the Efficiency in the Transmission of Radio-Frequency Signals Using Micro-Bumps - A device includes a die including a main circuit and a first pad coupled to the main circuit. A work piece including a second pad is bonded to the die. A first plurality of micro-bumps is electrically coupled in series between the first and the second pads. Each of the plurality of micro-bumps includes a first end joining the die and a second end joining the work piece. A micro-bump is bonded to the die and the work piece. The second pad is electrically coupled to the micro-bump. | 10-24-2013 |
20140008773 | Integrated Antenna Structure - Some embodiments relate to a semiconductor module comprising an integrated antenna structure configured to wirelessly transmit signals. The integrated antenna structure has a lower metal layer and an upper metal layer. The lower metal layer is disposed on a lower die and is connected to a ground terminal. The upper metal layer is disposed on an upper die and is connected to a signal generator configured to generate a signal to be wirelessly transmitted. The upper die is stacked on the lower die and is connected to the lower die by way of an adhesion layer having one or more micro-bumps. By connecting the lower and upper die together by way of the adhesion layer, the lower and upper metal layers are separated from each other by a large spacing that provides for a good performance of the integrated antenna structure. | 01-09-2014 |
20140070366 | SEMICONDUCTOR STRUCTURE - A semiconductor structure is provided. The semiconductor structure includes a floating substrate; and a capacitor grounded and connected to the floating substrate. A method of manufacturing a semiconductor structure is also provided. | 03-13-2014 |
20140117501 | DIFFERENTIAL MOSCAP DEVICE - A differential MOS capacitor structure includes two capacitor sections coupled to different gates and operating using different signals. The respective signals may be 180° out of phase. The capacitor sections of the differential capacitor each include two or more upper capacitor plates disposed over a single common lower capacitor plate which serves as a common node thereby preventing parasitic capacitance. The upper capacitor plates of a first capacitor section are adjacent one another with no electrical components disposed between them. The upper capacitor plates of a second capacitor section are adjacent one another with no electrical components disposed between them. The upper capacitor plates are formed of a plurality of stacked conductive layers in some embodiments. | 05-01-2014 |
20140152512 | ANTENNA USING THROUGH-SILICON VIA - An antenna includes a substrate and a conductive top plate over the substrate. A feed line is connected to the top plate, and the feed line comprises a first through-silicon via (TSV) structure passing through the substrate. The feed line is arranged to carry a radio frequency signal. A method of designing an antenna includes selecting a shape of a top plate, determining a size of the top plate based on an intended signal frequency, and determining, based on the shape of the top plate, a location of each TSV of at least one TSV contacting the top plate. A method of implementing an antenna includes forming a first feed line through a substrate, the first feed line comprising a TSV, and forming a top plate over the substrate, the top plate being electrically conductive and connected to the first feed line. | 06-05-2014 |
20140203397 | Methods and Apparatus for Inductors and Transformers in Packages - Methods and apparatus for forming a semiconductor device package with inductors and transformers using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, formed between a top die and a bottom die, or between a die and an interposer. An inductor can be formed by a redistribution layer within a bottom device and a micro-bump line above the bottom device connected to the RDL. The inductor may be a symmetric inductor, a spiral inductor, a helical inductor which is a vertical structure, or a meander inductor. A pair of inductors with micro-bump lines can form a transformer. | 07-24-2014 |
20140211438 | Methods and Apparatus for Transmission Lines in Packages - Methods and apparatus for forming a semiconductor device package with a transmission line using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, formed between a top device and a bottom device. A signal transmission line may be formed using a micro-bump line above a bottom device. A ground plane may be formed using a redistribution layer (RDL) within the bottom device, or using additional micro-bump lines. The RDL formed ground plane may comprise open slots. There may be RDLs at the bottom device and the top device above and below the micro-bump lines to form parts of the ground planes. | 07-31-2014 |
20140217546 | HELICAL SPIRAL INDUCTOR BETWEEN STACKING DIE - The present disclosure relates to a multi-level integrated inductor that provides for a good inductance and Q-factor. In some embodiments, the integrated inductor has a first inductive structure with a first metal layer disposed in a first spiral pattern onto a first IC die and a second inductive structure with a second metal layer disposed in a second spiral pattern onto a second IC die. The first IC die is vertically stacked onto the second IC die. A conductive interconnect structure is located vertically between the first and second IC die and electrically connects the first metal layer to the second metal layer. The conductive interconnect structure provides for a relatively large distance between the first and second inductive structures that provides for an inductance having a high Q-factor over a large range of frequencies. | 08-07-2014 |
20140252548 | Filter and Capacitor Using Redistribution Layer and Micro Bump Layer - An integrated circuit package includes a die. An electrically conductive layer comprises a redistribution layer (RDL) in the die, or a micro-bump layer above the die, or both. The micro bump layer comprises at least one micro-bump line. A filter comprises the electrically conductive layer. A capacitor comprises an electrode formed in the electrically conductive layer. | 09-11-2014 |
20140264734 | Inductor With Magnetic Material - In accordance with an embodiment, a semiconductor device comprises a semiconductor die, an interposer, and conductive bumps bonding the semiconductor die to the interposer. The semiconductor die comprises a first metallization layer, and the first metallization layer comprises a first conductive pattern. The interposer comprises a second metallization layer, and the second metallization layer comprises a second conductive pattern. Some of the conductive bumps electrically couple the first conductive pattern to the second conductive pattern to form a coil. A magnetic layer is positioned within the coil. In another embodiment, a coil is formed on a single substrate, wherein a magnetic layer is positioned within the coil. Other embodiments contemplate other configurations of coils, inductors, and/or transformers, and contemplate methods of manufacture. | 09-18-2014 |
20140264742 | Integrated Capacitor - A structure includes first, second, and third conductive leaf structures. The first conductive leaf structure includes a first conductive midrib and conductive veins. The second conductive leaf structure is electrically connected to the first conductive leaf structure, and includes a second conductive midrib, conductive veins extending toward the first conductive midrib, and conductive veins extending away from the first conductive midrib. The third conductive leaf structure includes a third conductive midrib between the first conductive midrib and the second conductive midrib, conductive veins extending toward the first conductive midrib, and conductive veins extending toward the second conductive midrib. | 09-18-2014 |
20140264745 | Transmission Line Formed Adjacent Seal Ring - An integrated circuit device includes a semiconductor body, active components formed over the semiconductor body, one or more seal rings surrounding the active components, and a signal line. One or more of the seal rings are configured to provide the primary return path for current flowing through the signal line. | 09-18-2014 |
20140278197 | 4 Port L-2L De-Embedding Method - Some embodiments relate to a wafer. The wafer includes a first dummy component comprising two or more first dummy component transmission lines. One of the first dummy component transmission lines operably couples a first signal test pad to a second signal test pad, and an other of the first dummy component transmission lines operably couples a third signal test pad to a fourth signal test pad. A second dummy component comprises two or more second dummy component transmission lines. One of the second dummy component transmission lines operably couples a fifth signal test pad to a sixth signal test pad, and an other of the second dummy component transmission lines operably couples a seventh signal test pad to an eighth signal test pad. Other embodiments are also disclosed. | 09-18-2014 |
20140327005 | Apparatus and Methods for De-Embedding Through Substrate Vias - An apparatus for de-embedding through substrate vias is provided. The apparatus may include pads on a first side of a substrate are coupled to through vias extending through a substrate, wherein pairs of the through vias are interconnected by transmission lines of varying lengths along a second side of the substrate. The apparatus may further include pairs of pads coupled together by transmission lines of the same varying lengths. Apparatuses may include through vias surrounding a through via device under test. The surrounding through vias are connected to the through via device under test by a backside metal layer. The apparatus may further include a dummy structure having an area equal to an area of the backside metal layer. | 11-06-2014 |
20150031184 | METHODS OF MANUFACTURING A PACKAGE - A method of manufacturing a package may include: providing a first device having a first redistribution layer (RDL) and an insulator layer disposed over the first RDL; and forming a first micro-bump line over the insulator layer of the first device. The first micro-bump line may extend laterally over a surface of the insulator layer facing away from the first RDL, and a first inductor of the package comprises the first RDL and the first micro-bump line. | 01-29-2015 |
20150123244 | DIFFERENTIAL MOSCAP DEVICE - A differential MOS capacitor includes a first plurality of upper capacitor plates, a second plurality of upper capacitor plates, and a conductive plate. At least two of the second plurality of upper capacitor plates are spaced laterally from each other and are disposed laterally between at least two of the first plurality of upper capacitor plates. The conductive plate is configured to serve as a common bottom capacitor plate such that a first capacitor is formed by the first plurality of upper capacitor plates and the conductive plate and a second capacitor is formed by the second plurality of upper capacitor plates and the conductive plate. | 05-07-2015 |
20150255391 | Inductor With Magnetic Material - In accordance with an embodiment, a semiconductor device comprises a semiconductor die, an interposer, and conductive bumps bonding the semiconductor die to the interposer. The semiconductor die comprises a first metallization layer, and the first metallization layer comprises a first conductive pattern. The interposer comprises a second metallization layer, and the second metallization layer comprises a second conductive pattern. Some of the conductive bumps electrically couple the first conductive pattern to the second conductive pattern to form a coil. A magnetic layer is positioned within the coil. In another embodiment, a coil is formed on a single substrate, wherein a magnetic layer is positioned within the coil. Other embodiments contemplate other configurations of coils, inductors, and/or transformers, and contemplate methods of manufacture. | 09-10-2015 |