Jae Hyouck

Jae Hyouck Choi, Gyeonggi-Do KR

Patent application number	Description	Published
20130249655	VARIABLE CAPACITOR CIRCUIT - Disclosed herein is a variable capacitor circuit. The variable capacitor circuit which is composed of a plurality of capacitors and a switch transistor connected to each capacitor, and adjusts a capacitance value (C) in accordance with ON/OFF of the switch transistor, includes a unit cell in which at least one switching unit and at least one capacitor are alternately connected in series to each other, and a plurality of capacitor units to which at least one of the unit cells is connected in parallel, and thereby may adjust a difference in quality factors in accordance with a signal direction.	09-26-2013
20140035631	TUNABLE CAPACITANCE CONTROL CIRCUIT AND TUNABLE CAPACITANCE CONTROL METHOD - Disclosed herein are a tunable capacitance control circuit and a tunable capacitance control method. The tunable capacitance control method is a tunable capacitance control method by a tunable capacitance control circuit including an MIM capacitor, a plurality of FET switches, and a control unit, wherein the control unit outputs control signals allowing only one of the plurality of (n) FET switches to be switched on and the remaining (n-1) FET switches to be switched off to the plurality of FET switches, thereby obtaining a desired tunable capacitance value.	02-06-2014

Patent application number	Description	Published
20140175901	SWITCH CIRCUIT AND SPDT SWITCH CIRCUIT - The present invention relates to a switch circuit and a single pole double throw (SPDT) circuit. The switch circuit includes: a MOS transistor transferring or blocking a signal according to a turn on/off operation thereof; a gate resistor connected to a gate of the MOS transistor; and a variable gate resistor circuit increasing a resistance value of the gate resistor when the MOS transistor is changed from a turn-off state to a turn-on state.	06-26-2014

Patent application number	Description	Published
20150145606	POWER AMPLIFIER - A power amplifier may include a first amplifying unit receiving a first bias signal to amplify a power level of an input signal; an envelope detecting unit detecting an envelope of the input signal; a comparing circuit unit comparing a peak value of the detected envelope with a preset reference voltage; and a second amplifying unit amplifying the power level of the input signal according to a second bias signal set depending on a comparison result of the comparing circuit unit.	05-28-2015