Patent application number | Description | Published |
20090283811 | Flash memory device and methods of forming the same - A flash memory device and/or methods of forming the flash memory device are provided, the flash memory device including a charge storage gate, a gate pattern over the charge storage gate, and a charge storage metal layer disposed between a side surface of the charge storage gate and the gate pattern. The methods include forming a preliminary charge storage gate pattern and forming a metal layer over a side surface of the preliminary charge storage gate pattern. | 11-19-2009 |
20150129878 | SEMICONDUCTOR DEVICE - A semiconductor device includes a peripheral circuit region on a substrate, a polysilicon layer on the peripheral circuit region, a memory cell array region on the polysilicon layer and overlapping the peripheral circuit region, the peripheral circuit region being under the memory cell array region, an upper interconnection layer on the memory cell array region, and a vertical contact through the memory cell array region and the polysilicon layer, the vertical contact connecting the upper interconnection layer to the peripheral circuit region. | 05-14-2015 |
20150132915 | Non-Volatile Memory Devices and Manufacturing Methods Thereof - There is provided a method of manufacturing a non-volatile memory device including: alternatively stacking a plurality of insulating layers and a plurality of conductive layers on a top surface of a substrate; forming an opening that exposes the top surface of the substrate and lateral surfaces of the insulating layers and the conductive layers; forming an anti-oxidation layer on at least the exposed lateral surfaces of the conductive layers; forming a gate dielectric layer on the anti-oxidation layer, the gate dielectric layer including a blocking layer, an electric charge storage layer, and a tunneling layer that are sequentially formed on the anti-oxidation layer; and forming a channel region on the tunneling layer | 05-14-2015 |
20150325588 | SEMICONDUCTOR DEVICES - A semiconductor device includes a lower insulation layer, a plurality of base layer patterns separated from each other on the lower insulation layer, a separation layer pattern between the base layer patterns, a plurality of channels extending in a vertical direction with respect to top surfaces of the base layer patterns, and a plurality of gate lines surrounding outer sidewalls of the channels, being stacked in the vertical direction and spaced apart from each other. | 11-12-2015 |
Patent application number | Description | Published |
20100021815 | SECONDARY BATTERIES COMPRISING EUTECTIC MIXTURE AND PREPARATION METHOD THEREOF - Disclosed is a secondary battery comprising a cathode, an anode, a separator and an electrolyte, wherein the electrolyte comprises: (a) a eutectic mixture; and (b) a first compound reduced at a higher potential vs. lithium potential (Li/Li+) than the lowest limit of the electrochemical window of the eutectic mixture. The electrolyte uses a eutectic mixture in combination with an additive reduced in advance of the eutectic mixture upon the initial charge to form a solid electrolyte interface (SEI) layer. Therefore, the electrolyte can solve the problem of electrolyte decomposition occurring when using a eutectic mixture alone as an electrolyte for a battery, and thus can prevent degradation of the quality of a battery. | 01-28-2010 |
20100239917 | ELECTROLYTE COMPRISING EUTECTIC MIXTURE AND SECONDARY BATTERY USING THE SAME - Disclosed is an electrolyte for a secondary battery, comprising an eutectic mixture consisting of: (a) am amide group-containing compound with at least one EDG introduced into the N-position thereof; and (b) an ionizable lithium salt. Also, provided are a secondary battery comprising such an electrolyte, and a method of adjusting an electrochemical stability window of an eutectic mixture consisting of an amide group-containing compound and a lithium salt by regulating electron donating properties of at least one substituent group introduced into the N-position of the amide group-containing compound. | 09-23-2010 |
20110014523 | ELECTROLYTE HAVING EUTECTIC MIXTURE AND ELECTROCHEMICAL DEVICE CONTAINING THE SAME - An electrolyte includes a eutectic mixture composed of (a) an alkoxy alkyl group-containing amide compound having a specific chemistry formula; and (b) an ionizable lithium salt. The eutectic mixture contained in the electrolyte has excellent high temperature stability as well as inherent characteristics of eutectic mixtures such as excellent thermal stability and excellent chemical stability, so it contributes to improvement of high temperature stability and decrease the lowest limit of a electrochemical window. Thus, the electrolyte may be usefully applied to electrochemical devices using various anode materials. | 01-20-2011 |
20110052999 | ELECTROLYTE HAVING EUTECTIC MIXTURE AND ELECTROCHEMICAL DEVICE CONTAINING THE SAME - An electrolyte includes an eutectic mixture composed of (a) a hetero cyclic compound having a predetermined chemistry figure, and (b) an ionizable lithium salt. An electrochemical device having the electrolyte. The eutectic mixture included in the electrolyte exhibits inherent characteristics of an eutectic mixture such as excellent thermal stability and excellent chemical stability, thereby improving the problems such as evaporation, ignition and side reaction of an electrolyte caused by the usage of existing organic solvents. | 03-03-2011 |
20140342239 | ELECTROLYTE HAVING EUTECTIC MIXTURE OF HETERO CYCLIC COMPOUND AND LITHIUM SALT AND ELECTROCHEMICAL DEVICE CONTAINING THE SAME - An electrolyte includes an eutectic mixture composed of (a) a hetero cyclic compound having a predetermined chemistry figure, and (b) an ionizable lithium salt. An electrochemical device having the electrolyte. The eutectic mixture included in the electrolyte exhibits inherent characteristics of an eutectic mixture such as excellent thermal stability and excellent chemical stability, thereby improving the problems such as evaporation, ignition and side reaction of an electrolyte caused by the usage of existing organic solvents. | 11-20-2014 |
Patent application number | Description | Published |
20120081957 | FLASH MEMORY DEVICE AND WORDLINE VOLTAGE GENERATING METHOD THEREOF - A word line voltage generating method of a flash memory which includes generating a program voltage using a positive voltage generator; generating a plurality of negative program verification voltages corresponding to a plurality of negative data states using a negative voltage generator; and generating at least one or more program verification voltages corresponding to at least one or more states using the positive voltage generator. Generating a plurality of negative program verification voltages includes generating a first negative verification voltage; discharging an output of the negative voltage generator to become higher than the first negative verification voltage; and performing a negative charge pumping operation until an output of the negative voltage generator reaches a second negative verification voltage level. | 04-05-2012 |
20120155168 | NEGATIVE VOLTAGE GENERATOR, DECODER, NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM USING NEGATIVE VOLTAGE - A negative voltage generator includes a direct current voltage generator configured to generate a direct current voltage, a reference voltage generator configured to generate a reference voltage, an oscillator configured to generate an oscillation clock, a charge pump configured to generate a negative voltage in response to a pump clock, and a voltage detector. The voltage detector is configured to detect the negative voltage by comparing a division voltage, obtained by voltage dividing the direct current voltage, with the reference voltage, and to generate the pump clock corresponding to the detected negative voltage based on the oscillation clock. | 06-21-2012 |
20160035427 | DATA STORAGE DEVICE AND OPERATION METHOD THEREOF - A data storage device includes a nonvolatile memory having a plurality of first memory cells connected to a first word line and a plurality of second memory cells connected to a second word line. A memory controller divides first data to be programmed in the first memory cells into first and second data groups and divides second data to be programmed in the second memory cells into third and fourth data groups. The nonvolatile memory device performs a third program operation of the second data group and a fourth program operation of the fourth data group after sequentially performing a first program operation of the first data group and a second program operation of the third data group. | 02-04-2016 |