Patents - stay tuned to the technology

Inventors list

Assignees list

Classification tree browser

Top 100 Inventors

Top 100 Assignees


Isamu Asano

Isamu Asano, Tokyo JP

Patent application numberDescriptionPublished
20090101885Method of producing phase change memory device - An area where a lower electrode is in contact with a variable resistance material needs to be reduced in order to lower the power consumption of a variable resistance memory device. The present invention provides a method of producing a variable resistance memory element whereby the lower electrode can be more finely formed. The method of producing a semiconductor device according to the present invention includes forming a small opening by utilizing cubical expansion due to the oxidation of silicon. Thereby forming the lower electrode smaller than that can be formed by lithography techniques.04-23-2009
20090104779Method of producing phase change memory device - An area where a lower electrode is in contact with a variable resistance material needs to be reduced to lower the power consumption of a variable resistance memory device. The present invention is to provide a method of producing a variable resistance memory element whereby the lower electrode can be formed smaller. Combining an anisotropic etching process with an isotropic etching process enables the lower electrode to be formed smaller.04-23-2009
20090221146Nonvolatile memory device and manufacturing method for the same - The object of the present invention is to provide a manufacturing method for a nonvolatile memory device including a variable resistance having a constricted shape. The nonvolatile memory device of the present invention has a storage section composed of two electrodes and a variable resistance sandwiched between the electrodes. The variable resistance is formed to a constricted shape between the electrodes.09-03-2009
20100078616NONVOLATILE MEMORY DEVICE AND MANUFACTURING PROCESS THEREOF - A nonvolatile memory device has a first insulating layer, a variable resistance layer provided on the first insulating layer and having a variable resistance material, and a first electrode and second electrode electrically connected with the variable resistance layer. The variable resistance layer has a variable resistance region as a data storing region and a thickness-changing region continuously extending from the variable resistance region and gradually becoming thicker from the variable resistance region.04-01-2010
20100123114NONVOLATILE MEMORY DEVICE - A nonvolatile memory device (05-20-2010
20100315867SOLID-STATE MEMORY DEVICE, DATA PROCESSING SYSTEM, AND DATA PROCESSING DEVICE - A solid-state memory device includes: a superlattice laminate having plural crystal layers laminated therein, the crystal layers including first and second crystal layers having mutually opposite compositions; a lower electrode provided on a first surface in a laminating direction of the superlattice laminate; and an upper electrode provided on a second surface of the superlattice laminate in the laminating direction. The first crystal layer included in the superlattice laminate is made of a phase change compound. According to the present invention, the superlattice laminate laminated in opposite directions of the upper and lower electrodes is sandwiched between these electrodes. Therefore, when an electric energy is applied to the superlattice laminate via these electrodes, a uniform electric energy can be applied to a laminated surface of the superlattice laminate. Accordingly, fluctuation of a resistance is small even when information is repeatedly rewritten, and data can be read stably as a result.12-16-2010
20120056148Semiconductor device - A semiconductor device may include, but is not limited to: a first insulating film; a second insulating film over the first insulating film; a first memory structure between the first and second insulating films; and a third insulating film between the first and second insulating films. The first memory structure may include, but is not limited to: a heater electrode; and a phase-change memory element between the heater electrode and the second insulating film. The phase-change memory element contacts the heater electrode. The third insulating film covers at least a side surface of the phase-change memory element. Empty space is positioned adjacent to at least one of the heater electrode and the third insulating film.03-08-2012
20120211715SEMICONDUCTOR DEVICE INCLUDING PHASE CHANGE MATERIAL AND METHOD OF MANUFACTURING SAME - Disclosed herein is a device that includes: an interlayer insulation film having a through hole; and a phase change storage element provided in the through hole. The phase change storage element includes: an outer electrode being a conductive film of cylindrical shape and being formed along an inner wall of the through hole; a buffer insulation film being an insulation film of cylindrical shape and being formed along an inner wall of the outer electrode, an upper end of the buffer insulation film being recessed in part to form a recess; a phase change film filling an interior of the recess; and an inner electrode being a conductive film formed along an inner wall of the buffer insulation film including a surface of the phase change film.08-23-2012
20130193396VARIABLE RESISTIVE ELEMENT, AND NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE - A variable resistive element that performs a forming action at small current and a stable switching operation at low voltage and small current, and a low-power consumption large-capacity non-volatile semiconductor memory device including the element are realized. The element includes a variable resistor between first and second electrodes. The variable resistor includes at least two layers, which are a resistance change layer and high-oxygen layer, made of metal oxide or metal oxynitride. The high-oxygen layer is inserted between the first electrode having a work function smaller than the second electrode and the resistance change layer. The oxygen concentration of the metal oxide of the high-oxygen layer is adjusted such that the ratio of the oxygen composition ratio to the metal element to stoichiometric composition becomes larger than the ratio of the oxygen composition ratio to the metal element of the metal oxide forming the resistance change layer to stoichiometric composition.08-01-2013
20130248809VARIABLE RESISTIVE ELEMENT AND NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - As for a variable resistive element including first and second electrodes, and a variable resistor containing a metal oxide between the first and second electrodes, in a case where a current path having a locally high current density of a current flowing between the both electrodes is formed in the metal oxide, and resistivity of at least one specific electrode having higher resistivity of the both electrodes is 100 μΩcm or more, a dimension of a contact region of the specific electrode with the variable resistor in a short side or short axis direction is set to be more than 1.4 times as long as a film thickness of the specific electrode, which reduces variation in parasitic resistance generated in an electrode part due to process variation of the electrode, and prevents variation in resistance change characteristics of the variable resistive element generated due to the variation in parasitic resistance.09-26-2013
20140367630SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - A semiconductor device includes: a lower electrode, a heater electrode having a pillar shape erected on the lower electrode, a phase change material in contact with the upper portion of the heater electrode, an upper electrode disposed above a heater electrode via the phase change material, side wall portions enclosing the periphery of the heater electrode, a first insulating film configuring a bottom surface portion continuous between heater electrodes, and a second insulating film formed on a bottom surface portion of the first insulating film; wherein the first insulating film and the second insulating film are formed after the heater electrode is formed in a pillar shape by double patterning.12-18-2014

Patent applications by Isamu Asano, Tokyo JP

Isamu Asano, Chuo-Ku JP

Patent application numberDescriptionPublished
20100284218SUPERLATTICE DEVICE, MANUFACTURING METHOD THEREOF, SOLID-STATE MEMORY INCLUDING SUPERLATTICE DEVICE, DATA PROCESSING SYSTEM, AND DATA PROCESSING DEVICE - To include a superlattice laminate having laminated thereon a first crystal layer of which crystal lattice is a cubic crystal and in which positions of constituent atoms are reversibly replaced by application of energy, and a second crystal layer having a composition different from that of the first crystal layer, and an orientation layer that is an underlaying layer of the superlattice laminate and causes a laminated surface of the first crystal layer to be (111)-orientated. According to the present invention, the laminated surface of the first crystal layer can be (111)-orientated by using the orientation layer as an underlaying layer. In the first crystal layer of which laminated surface is (111)-orientated, a crystal structure reversibly changes when a relatively low energy is applied. Therefore, characteristics of a superlattice device having this crystal layer can be enhanced.11-11-2010
20100302842SEMICONDUCTOR MEMORY DEVICE, MANUFACTURING METHOD THEREOF, DATA PROCESSING SYSTEM, AND DATA PROCESSING DEVICE - A semiconductor memory device includes: first and second impurity diffusion layers that form a part of a semiconductor substrate, each of the impurity diffusion layers function as one and the other of an anode and a cathode, respectively of a pn-junction diode; a recording layer connected to the second impurity diffusion layer; and a cylindrical sidewall insulation film provided on the first impurity diffusion layer. At least a part of the second diffusion layer and at least a part of the recording layer are formed in a region surrounded by a sidewall insulation film. According to the present invention, because a pillar-shaped pn-junction diode and the recording layer are formed in a self-aligned manner, the degree of integration of a semiconductor memory device can be increased. Further, because a silicon pillar is a part of the semiconductor substrate, a leakage current attributable to a crystal defect can be reduced.12-02-2010
Website © 2015 Advameg, Inc.