Patent application number | Description | Published |
20130062770 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MAKING SAME - One or more embodiments relate to a semiconductor structure, comprising: a barrier layer overlying a workpiece surface; a seed layer overlying the barrier layer; an inhibitor layer overlying said seed layer, the inhibitor layer having a opening exposing a portion of the seed layer, and a fill layer overlying the exposed portion of the seed layer. | 03-14-2013 |
20130207262 | INTEGRATED ANTENNAS IN WAFER LEVEL PACKAGE - A semiconductor module, comprises a package molding compound layer comprising an integrated circuit (IC) device embedded within a package molding compound, the integrated circuit device and the package molding compound having a common surface. Structures are formed to connect the semiconductor module to an external board, the structures electrically connected to the integrated circuit device. A layer is formed on the common surface, the layer comprising at least one integrated antenna structure, the integrated antenna structure being coupled to the IC device. | 08-15-2013 |
20130207872 | Adjustable Impedance Matching Network - An impedance matching network includes a first terminal, a second terminal, and a reference potential terminal. The impedance matching network further includes a first shunt branch between the first terminal and the reference potential terminal, the first shunt branch including a capacitive element. The impedance matching network also includes a second shunt branch between the second terminal and the reference potential terminal, the second shunt branch including an inductive element. Furthermore, the impedance matching network includes a transmission line transformer with a first inductor path and a second inductor path, wherein the first inductor path connects the first terminal and the second terminal. An alternative impedance matching network includes a transformer and an adaptive matching network. The transformer is configured to transform an impedance connected to a first port so that a corresponding transformed impedance lies within a confined impedance region in a complex impedance plane. | 08-15-2013 |
20130214360 | METHOD AND APPARATUS FOR REDUCING FLICKER NOISE IN A SEMICONDUCTOR DEVICE - Some embodiments discussed relate to an integrated circuit and methods for making it. Certain examples can include a fin, a gate insulator over a sidewall of the fin, and a noise-reducing dopant at or near an interface of the gate insulator and the sidewall. | 08-22-2013 |
20130214956 | VIRTUAL ANALOG TO DIGITAL CONVERTER - The disclosure relates to analog to digital converters, in particular to logical circuit blocks, a system and a method, which provide functionality of an additional analog to digital converter. In accordance with an aspect of the disclosure, there is provided a logical circuit block, which is configured to be connected to a plurality of ADCs each including a plurality of input pins connected to a plurality of analog input channels. The logical circuit block is further configured to cause one ADC of the plurality of ADCs to perform an ADC conversion of an analog input signal received via a particular analog input channel of the plurality of analog input channels to which an input pin of the one ADC is connected. | 08-22-2013 |
20130217195 | Transistor Device and Method of Manufacture Thereof - A method of forming transistors and structures thereof A CMOS device includes high k gate dielectric materials. A PMOS device includes a gate that is implanted with an n type dopant. The NMOS device may be doped with either an n type or a p type dopant. The work function of the CMOS device is set by the material selection of the gate dielectric materials. A polysilicon depletion effect is reduced or avoided. | 08-22-2013 |
20130217232 | Method of Fabricating Semiconductor Cleaners - A method of manufacturing cleaning solvents is provided. The method includes selecting a small plurality of test solvents from a large plurality of perspective solvents. The equilibrium composition of a multi-component solution is preferably described by the Hansen solubility model. A small plurality of test solvents is applied to solute samples and the degree of dissolution or swelling recorded. Based on the degree of dissolution or swelling, at least one solvent is selected from the large plurality of perspective solvents based on the Hansen parameters. | 08-22-2013 |
20130218517 | Rotation Angle Sensor for Absolute Rotation Angle Determination Even Upon Multiple Revolutions - A rotation angle sensor for detecting an absolute rotation angle upon single or multiple revolutions includes a magnetic field sensor and an encoder arrangement. The magnetic field sensor detects at least two orthogonal magnetic field variables. The encoder arrangement is rotatable depending on the absolute rotation angle relative to the magnetic field sensor, such that the magnetic field detected by the magnetic field sensor is dependent on a relative angular position of the encoder arrangement with respect to the magnetic field sensor. The encoder arrangement is furthermore displaceable relative to the magnetic field sensor. The relative angular position and the relative translational position of the encoder arrangement with respect to the magnetic field sensor is determined from the at least two orthogonal magnetic field variables. The absolute rotation angle is determined by means of the relative angular position and the relative translational position. | 08-22-2013 |
20130221480 | Semiconductor Devices and Methods of Manufacture Thereof - Methods of fabricating semiconductor devices and structures thereof are disclosed. In a preferred embodiment, a method of fabricating a semiconductor device includes providing a workpiece having a plurality of trenches formed therein, forming a liner over the workpiece, and forming a layer of photosensitive material over the liner. The layer of photosensitive material is removed from over the workpiece except from over at least a portion of each of the plurality of trenches. The layer of photosensitive material is partially removed from over the workpiece, leaving a portion of the layer of photosensitive material remaining within a lower portion of the plurality of trenches over the liner. | 08-29-2013 |
20130221513 | Power Semiconductor Module System with Undercut Connection - A semiconductor module system includes a first semiconductor module and a second semiconductor module. The first semiconductor module has a first housing and a first base plate. The second semiconductor module has a second housing and a second base plate. The first base plate includes a first fitting segment fitted with a semiconductor component, and a first adjustment segment separated from the first fitting segment. The first adjustment segment also has a first adjustment device. The second base plate has a second adjustment device. The first semiconductor module and the second semiconductor module are configured to be positioned relative to one another using the first adjustment device and the second adjustment device so as to form at least one undercut connection. The first fitting segment and the first adjustment segment are connected to the first housing in a captive manner even when the undercut connection is not formed. | 08-29-2013 |
20130223497 | Method and System for Compensating a Delay Mismatch Between a First Measurement Channel and a Second Measurement Channel - A method and a system for compensating a delay mismatch between a first measurement channel and a second measurement channel is disclosed. A method for compensating a delay mismatch between a first measurement channel and a second measurement channel includes providing a reference point for starting the first and second measurement channel, and starting the first measurement channel after expiration of a first delay period which begins at the reference point. The method further includes starting the second measurement channel after expiry of a second delay period which begins at the reference point, wherein a difference between a length of the first delay period and a length of the second delay period is substantially equal to the delay mismatch between the first measurement channel and the second measurement channel. | 08-29-2013 |
20130224921 | LATERAL TRENCH TRANSISTOR, AS WELL AS A METHOD FOR ITS PRODUCTION - A method for production of doped semiconductor regions in a semiconductor body of a lateral trench transistor includes forming a trench in the semiconductor body and introducing dopants into at least one area of the semiconductor body that is adjacent to the trench, by carrying out a process in which dopants enter the at least one area through inner walls of the trench. | 08-29-2013 |
20130224942 | Methods of Fabricating Semiconductor Devices and Structures Thereof - Methods of fabricating semiconductor devices and structures thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a gate material stack over a workpiece having a first region and a second region. The gate material stack includes a semiconductive gate material. A thickness is altered or a substance is introduced to the semiconductive gate material in the first region or the second region of the workpiece. The gate material stack is patterned in the first region and the second region resulting in a first transistor in the first region of the workpiece comprising an NMOS FET of a CMOS device and a second transistor in the second region of the workpiece comprising an NMOS FET of the CMOS device. The first transistor has a first threshold voltage and the second transistor has a second threshold voltage different than the first threshold voltage. | 08-29-2013 |
20130224946 | Passivated Copper Chip Pads - A structure and method of forming passivated copper chip pads is described. In various embodiments, the invention describes a substrate that includes active circuitry and metal levels disposed above the substrate. A passivation layer is disposed above a last level of the metal levels. A conductive liner is disposed in the sidewalls of an opening disposed in the passivation layer, wherein the conductive liner is also disposed over an exposed surface of the last level of the metal levels. | 08-29-2013 |
20130300407 | Current Sensor - A current sensor includes a conductive element, and at least two magnetic field sensors arranged on the conductive element and configured to sense a magnetic field generated by a current through the conductive element, wherein the at least two magnetic field sensors are arranged on opposite sides of a line perpendicular to a current flow direction in the conductive element. The current sensor further includes an insulating layer arranged between the conductive element and the magnetic field sensors, and at least two conductor traces provided on the insulating layer, wherein one end of the conductor traces connects to a respective magnetic field sensor, and the other end of the conductor traces providing a terminal for outputting the sensor signals. The conductor traces are arranged such that they do not extend entirely around the conductive element. | 11-14-2013 |
20140067891 | PSEUDO RANDOM NUMBER GENERATOR AND METHOD FOR PROVIDING A PSEUDO RANDOM SEQUENCE - In various embodiments, a pseudo random number generator is provided. The pseudo random number generator may include: a pair of shift registers, wherein a first shift register in the pair is a linear shift register and a second shift register in the pair is a nonlinear shift register, wherein the linear shift register is configured to receive a first output sequence from the nonlinear shift register, and to take the first output sequence as a basis for providing a second output sequence; wherein the pseudo random number generator is configured to take the second output sequence as a basis for providing a pseudo random sequence. | 03-06-2014 |
20140145686 | CHARGE CONSERVATION IN PIXELS - Representative implementations of devices and techniques provide conservation of charge in a pixel. Charge in the pixel may be alternately stored in a first gate capacitance of the pixel and a second gate capacitance of the pixel. Transferring the charge between the gate capacitances conserves some or all of the charge, and reduces input power used to charge the gate capacitances. | 05-29-2014 |
20140215109 | Compatible Network Node, in Particular, For Can Bus Systems - A network node is provided, including a device, in particular, an error detection logic, which is deactivated if it is detected that a signal according to a first protocol or a first version of a first protocol is received, and which is not deactivated if it is detected that a signal according to a second, different protocol or a second, different version of the first protocol is received. | 07-31-2014 |
20140232001 | Device Bond Pads Over Process Control Monitor Structures in a Semiconductor Die - A semiconductor die includes a semiconductor substrate having an edge region surrounding an active region, the active region containing devices of an integrated circuit. The semiconductor die further includes interconnect wiring over the active region in an interlayer dielectric and electrically connected to the devices in the active region, and ancillary wiring over the edge region in the interlayer dielectric and isolated from the interconnect wiring and the devices in the active device region. The interlayer dielectric is passivated, and bond pads are provided over the interconnect wiring and electrically connected to the interconnect wiring through openings in the passivation over the active region. Additional bond pads are provided over the ancillary wiring and are electrically connected to the interconnect wiring through additional openings in the passivation over the active region. | 08-21-2014 |
20140254792 | Masked Nonlinear Feedback Shift Register - An NLFSR of length k, configured to output a sequence of masked values x | 09-11-2014 |
20140260545 | SENSOR AND SENSING METHOD - A sensor is provided, which may include: a sensor layer containing a sensor material, wherein an electrical resistance of the sensor material changes upon adsorption of an adsorbate at the sensor material; a circuit electrically coupled to the sensor layer and configured to apply an electrical current to the sensor layer that heats the sensor layer. | 09-18-2014 |
20140291824 | Leadframe, Semiconductor Package Including a Leadframe and Method for Producing a Leadframe - A lead frame includes a die pad and a lead finger with an inner portion which is configured to be electrically connected to contact pads of a die and with an outer portion which has an attach portion. The attach portion is configured to be soldered to an external solder pad, wherein the attach portion has a width, a length and a thickness. An opening extends through the thickness of the attach portion. | 10-02-2014 |
20140306347 | Semiconductor Device with an Insulation Layer Having a Varying Thickness - A layer with a laterally varying thickness, a substrate with a first surface and an insulation layer formed on the first surface of the substrate is provided. A plurality of at least one of recesses and openings is formed in the insulation layer, wherein the plurality is arranged at a pitch. Each of the at least one of recesses and openings has a lateral width, wherein at least one of the pitch and the lateral width varies in a lateral direction. The plurality of the at least one of recesses and openings defines a given region in the insulation layer. The insulation layer having the plurality of the at least one of the recesses and openings is tempered at elevated temperatures so that the insulation layer at least partially diffluences to provide the insulation layer with a laterally varying thickness at least in the given region. | 10-16-2014 |
20140320231 | Integrated-Circuit Module with Waveguide Transition Element - An integrated-circuit module includes a package molding compound layer, a radio-frequency (RF) integrated circuit embedded within the package molding compound layer and having an RF port, a waveguide transition structure embedded within the package molding compound layer, and a redistribution layer. The waveguide transition structure includes a transmission line interface section, a waveguide interface section configured for coupling to a rectangular waveguide housing, and a transformer section configured to provide a mode transition between the transmission line interface section and the waveguide interface section. The redistribution layer includes at least one insulating layer and at least one metallization layer, extending between the RF integrated circuit and the waveguide transition structure across a surface of the package molding compound layer. The first redistribution layer includes an RF transmission line conductively connected between the RF port of the RF integrated circuit and the transmission line interface section of the waveguide transition structure. | 10-30-2014 |