Patent application number | Description | Published |
20140156566 | CUSTOMIZED PREDICTORS FOR USER ACTIONS IN AN ONLINE SYSTEM - Online systems generate predictors for predicting actions of users of the online system. The online system receives requests to generate predictor models for predicting whether a user is likely to take an action of a particular action type. The request specifies the type of action and criteria for identifying a successful instance of the action type and a failure instance of the action type. The online system collects data including successful and failure instances of the action type. The online system generates one or more predictors of different types using the generated data. The online system evaluates and compares the performance of the different predictors generated and selects a predictor based on the performance. The online system returns a handle to access the generated predictor to the requester of the predictor. | 06-05-2014 |
20160036887 | ELECTRONIC NOTIFICATIONS - In one embodiment, a method includes accessing for a user one or more electronic notifications that include information about a social network. The social network includes a plurality of nodes connected by a plurality of edges, with at least one node corresponding to the user. The method further includes determining, for each of the electronic notifications, a score that estimates whether a user interaction with the social network will result if the electronic notification is provided to the user. The method further includes determining, based at least in part on the determined scores, an action to take with respect to the electronic notifications. | 02-04-2016 |
20160103922 | PRESENTING CONTACTS TO A SOCIAL NETWORKING SYSTEM USER BASED ON USER INTERACTIONS WITH ADDITIONAL USERS AND WITH GROUPS - A social networking system selects a set of contacts for presentation to a user of the social networking system. A contact is an additional user or a group of users maintained by the social networking system. To select the set of contacts, the social networking system generates scores associated with additional users of the social networking system and groups of users based on interactions between the user and various additional users and between the user and groups of users. Based on the scores associated with additional users and with groups of users, the social networking system selects a set of contacts from the additional users and the groups of users. Information identifying the set of contacts is communicated from the social networking system to a client device for presentation to the user. | 04-14-2016 |
Patent application number | Description | Published |
20080209184 | PROCESSOR WITH RECONFIGURABLE FLOATING POINT UNIT - A technique of operating a processor includes determining whether a floating point unit (FPU) of the processor is to operate in a full-bit mode or a reduced-bit mode. An instruction is fetched and the instruction is decoded into a single operation, when the full-bit mode is indicated, or multiple operations, when the reduced-bit mode is indicated. | 08-28-2008 |
20080209185 | Processor with reconfigurable floating point unit - A technique of operating a processor includes determining whether a floating point unit (FPU) of the processor is to operate in a full-bit mode or a reduced-bit mode. An instruction is fetched and the instruction is decoded into one or more full-bit operations, when the full-bit mode is indicated, or one or more reduced-bit operations, when the reduced-bit mode is indicated. | 08-28-2008 |
20090024842 | Precise Counter Hardware for Microcode Loops - In an embodiment, a microcode unit for a processor is contemplated. The microcode unit comprises a microcode memory storing a plurality of microcode routines executable by the processor, wherein each microcode routine comprises two or more microcode operations. Coupled to the microcode memory, the sequence control unit is configured to control reading microcode operations from the microcode memory to be issued for execution by the processor. The sequence control unit is configured to stall issuance of microcode operations forming a body of a loop in a first routine of the plurality of microcode routines until a loop counter value that indicates a number of iterations of the loop is received by the sequence control unit. | 01-22-2009 |
20090037932 | MECHANISM FOR BROADCASTING SYSTEM MANAGEMENT INTERRUPTS TO OTHER PROCESSORS IN A COMPUTER SYSTEM - A computer system includes a system memory, a plurality of processor cores, and an input/output (I/O) hub that may communicate with each of the processor cores. In response to detecting an occurrence of an internal system management interrupt (SMI), each of the processor cores may save to a system management mode (SMM) save state in the system memory, information corresponding to a source of the internal SMI. In response to detecting the internal SMI, each processor core may further initiate an I/O cycle to a predetermined port address within the I/O hub. The I/O hub may broadcast an SMI message to each of the processor cores in response to receiving the I/O cycle. Each of the processor cores may further save to the SMM save state in the system memory, respective internal SMI source information in response to receiving the broadcast SMI message. | 02-05-2009 |
Patent application number | Description | Published |
20090037863 | Integration of Pre-Defined Functionality and a Graphical Program in a Circuit - System and method for designing a circuit. At least one graphical program comprising a plurality of interconnected nodes that visually indicate functionality of the graphical program is selected in response to user input. At least one pre-defined hardware configuration program (HCP) is selected from a plurality of pre-defined HCPs in response to user input, where the selected at least one pre-defined HCP specifies a fixed functionality, including interface functionality for communicating with the at least one graphical program when implemented on the circuit. At least a portion of a netlist is generated based on the at least one graphical program and the at least one selected pre-defined HCP, where the netlist is usable to configure a circuit, wherein a first portion of the circuit implements the functionality of the graphical program and a second portion of the circuit implements the fixed functionality. | 02-05-2009 |
20100031231 | Testing a Graphical Program Intended for a Programmable Hardware Element - Testing a first graphical program intended for implementation on a programmable hardware element. The first graphical program may be stored. The first graphical program may include a first plurality of nodes connected by lines which visually specify first functionality. The first graphical program may be intended for implementation by the programmable hardware element. A second graphical program may be stored which visually specifies testing functionality for the first graphical program. The second graphical program may be executable by a host computer to simulate input to the programmable hardware element when configured by the first graphical program. The first graphical program and the second graphical program may be executed (e.g., by a host computer) to test the first functionality when implemented by the programmable hardware element. During execution, simulated outputs may be monitored. | 02-04-2010 |
20130246997 | Managing Hardware Implementation and Deployment of a Graphical Program - System and method for managing and specifying hardware implementation of a graphical program. A graphical program that implements an algorithm is stored in a memory of a computer system. The graphical program meets one or more first specified implementation requirements and is targeted for deployment to a programmable hardware element. A plurality of sets of descriptive directives are also stored in the memory, where the descriptive directives are associated with the graphical program and specify one or more additional specified implementation requirements, e.g., memory resource implementations, optimization directives, and so forth, where the additional directives result from programmatic and/or user-specification. Each set of descriptive directives is useable by a synthesis tool to generate a respective hardware configuration program for deployment to the graphical programmable hardware element. | 09-19-2013 |
20130246998 | Interactively Designing a Hardware Implementation of a Graphical Program - System and method for managing and specifying hardware implementation of a graphical program. A graphical program that implements an algorithm is stored in a memory of a computer system. The graphical program meets one or more first specified implementation requirements and is targeted for deployment to a programmable hardware element. A plurality of sets of descriptive directives are also stored in the memory, where the descriptive directives are associated with the graphical program and specify one or more additional specified implementation requirements, e.g., memory resource implementations, optimization directives, and so forth, where the additional directives result from programmatic and/or user-specification. Each set of descriptive directives is useable by a synthesis tool to generate a respective hardware configuration program for deployment to the graphical programmable hardware element. | 09-19-2013 |
Patent application number | Description | Published |
20140101462 | ENERGY-EFFICIENT UNINTERRUPTIBLE ELECTRICAL DISTRIBUTION SYSTEMS AND METHODS - A power distribution system for data center systems (and corresponding method) feeds DC power directly to a first AC-DC power supply of a computer system in the data center system and feeds AC power to a second AC-DC power supply of the computer system to efficiently and reliably provide an uninterruptible supply of power to the computer system. The power distribution system includes an energy storage unit for supplying the DC power, a charger for charging the energy storage unit, and an inverter through which the energy storage unit provides energy to an electrical substation of an electrical grid. The charger is configured to receive energy from a renewable energy source and the electrical substation. The inverter may also be configured to receive renewable energy from the renewable energy source and supply that energy to the electrical substation. An uninterruptible power supply may be coupled between the electrical substation and the AC power feed. The power distribution system further includes a monitor for monitoring the flow of current to and/or from the electrical substation, a communications interface for receiving messages or requests from a utility company associated with the electrical substation, and a controller for controlling the components of the power distribution system based on requests from the utility company and the information gathered by the monitor. | 04-10-2014 |
20140169053 | DISTRIBUTED VOLTAGE SOURCE INVERTERS - Systems and methods are disclosed with multiple direct current (DC) voltage source inverters to supply power to an alternating current (AC) power system. The system includes a plurality of full bridge inverter stages, each having a primary node and a secondary node, each of said full bridge inverter stages having positive and negative node, each of said full bridge inverter stages having a voltage supporting device electrically connected in a parallel relationship between said positive node and said negative node and a direct current (DC) source connected between the positive and negative nodes; at least one stacked inverter phase, each stacked inverter phase having a plurality of said full bridge inverter stages, each of said full bridge inverter stages in each stacked inverter phase interconnected in a series relationship with said secondary node of one of said full bridge inverter stages connected to said primary node of another full bridge inverter, said series interconnection defining a first full bridge inverter stage and a last full bridge inverter stage, each phase having an input node at said primary node of said first full bridge inverter stage and an output node at said secondary node of said last full bridge inverter stage; a local controller coupled to each full bridge inverter stage providing the control signals to each full bridge inverter stage to output an approximate nearly sinusoidal voltage waveform; and a system controller which communicating with each local controller; the system controller generating system control signals for configuration, synchronization, activation, deactivation and operating mode selection of said local controller. | 06-19-2014 |
20150303829 | STACKED VOLTAGE SOURCE INVERTER WITH SEPARATE DC SOURCES - A stacked voltage source inverter having separate DC sources is described herein. This inverter is applicable to low or medium voltage, low to medium power applications such as photovoltaic utility interface systems, battery storage application such as peak shaving with renewables, motor drive applications and for electric vehicle drive systems. The stacked inverter consists of at least one phase wherein each phase has a plurality of low voltage full bridge inverters equipped with an independent DC source. This inverter develops a near sinusoidal approximation voltage waveform with fast switching and small low pass AC output filter. A system controller controls operating parameters for each inverter. The inverter may have either single-phase or multi-phase embodiments connected in either wye or delta configurations. | 10-22-2015 |
20150357940 | BI-DIRECTIONAL ENERGY CONVERTER WITH MULTIPLE DC SOURCES - A multiple dc sources bi-directional energy converter includes a plurality of direct current (DC) power sources; one alternating current (AC) power source; at least one stacked alternating current (AC) phase, each stacked alternating current (AC) phase having at least two or more full bridge converters, each respectively coupled to one of the direct current power sources, each full bridge converter having an inductor electrically coupled thereto; and a local controller coupled to each full bridge converter controlling the firing sequence of the switching devices in said full bridge converter to generate an approximately nearly sinusoidal voltage waveform when operated as a voltage source inverter in one direction or generate an approximately nearly constant direct current (DC) output when operated as a full-wave active rectifier in the opposite direction. | 12-10-2015 |
Patent application number | Description | Published |
20080203070 | ARC RECOVERY WITHOUT OVER-VOLTAGE FOR PLASMA CHAMBER POWER SUPPLIES USING A SHUNT SWITCH - A system and method for over-voltage protection is described. In one embodiment of the invention, an apparatus includes an output port configured to deliver power to a plasma chamber to ignite a plasma. The apparatus also includes a shunt switch in parallel with the output port and a processor configured to receive an indicator of an arc in the plasma. The processor is configured to close the shunt switch for a period of time to divert current away from the arc. The processor is also configured to trigger a pulse of the shunt switch to limit a voltage of an increasing voltage condition associated with the arc. | 08-28-2008 |
20080291712 | INTERLEAVED SOFT SWITCHING BRIDGE POWER CONVERTER - An interleaved soft switching bridge power converter comprises switching poles operated in an interleaved manner so as to substantially reduce turn-on switching losses and diode reverse-recovery losses in the switching pole elements. Switching poles are arranged into bridge circuits that are operated so as to provide a desired voltage, current and/or power waveform to a load. By reducing switching turn on and diode reverse recovery losses, soft switching power converters of the invention may operate efficiently at higher switching frequencies. Soft switching power converters of the invention are well suited to high power and high voltage applications such as plasma processing, active rectifiers, distributed generation, motor drive inverters and class D power amplifiers. | 11-27-2008 |
20090008240 | METHOD AND SYSTEM FOR CONTROLLING A VAPOR DEPOSITION PROCESS - A method and system for conditioning a vapor deposition target is described. In one illustrative embodiment, a vapor deposition system is operated in which a vapor deposition target is used, the occurrence of electrical arcs in the vapor deposition system is detected, and the vapor deposition target is conditioned by adjusting an output current of a power supply that powers the vapor deposition system and adjusting an interval during which energy is delivered to each arc to deliver substantially the same energy to each arc. In some embodiments, the energy delivered to each arc is approximately equal to the maximum energy that the vapor deposition target can withstand without being damaged. The described method and system significantly reduces the time required to remove impurities from a target and does not require the venting of the vacuum chamber or the removal of the target from the chamber. | 01-08-2009 |
20100034002 | Interleaved soft switching bridge power converter - An interleaved soft switching bridge power converter comprises switching poles operated in an interleaved manner so as to substantially reduce turn-on switching losses and diode reverse-recovery losses in the switching pole elements. Switching poles are arranged into bridge circuits that are operated so as to provide a desired voltage, current and/or power waveform to a load. By reducing switching turn on and diode reverse recovery losses, soft switching power converters of the invention may operate efficiently at higher switching frequencies. Soft switching power converters of the invention are well suited to high power and high voltage applications such as plasma processing, active rectifiers, distributed generation, motor drive inverters and class D power amplifiers. | 02-11-2010 |
20100140231 | ARC RECOVERY WITH OVER-VOLTAGE PROTECTION FOR PLASMA-CHAMBER POWER SUPPLIES - A system and method for managing power delivered to a processing chamber is described. In one embodiment current is drawn away from the plasma processing chamber while initiating an application of power to the plasma processing chamber during an initial period of time, the amount of current being drawn away decreasing during the initial period of time so as to increase the amount of power applied to the plasma processing chamber during the initial period of time. | 06-10-2010 |
20100141221 | DELIVERED ENERGY COMPENSATION DURING PLASMA PROCESSING - An apparatus and method for controlling an application of power to power a plasma chamber. A detector detects actual power out from the power stage to the plasma chamber during a sampling interval. A compare module compares the actual power out during the sampling interval to a present power setting during the sampling interval and generates a compensation value. An adjust module updates the present power setting for the power stage with the compensation value to provide a new power setting for the power stage to control the power out from power stage to the plasma chamber during the deposition process whereby power losses occurring during the deposition process are compensated during the deposition process. If there is a fixed time period for the deposition process, the compensation method and apparatus may be used to compensate the deposition process for energy losses without extending the duration of the deposition process. | 06-10-2010 |
20100141224 | DIGITAL CHARGE-MODE CONTROL OF A POWER SUPPLY - Disclosed herein are an apparatus and method for charge-mode control. An embodiment of a charge mode controller may include an analog/digital converter configured to monitor the current through a duty cycle switch and convert the current to a switch current value; an accumulator module configured to integrate the switch current value during the switching cycle and output an accumulated charge value; and a comparator module responsive to the accumulated charge value and a charge set point configured to generate a gate drive signal for the duty cycle switch that turns the duty cycle switch ON when the accumulated charge value is less than the charge set point and turns the duty cycle switch OFF when the accumulated charge value reaches the charge set point and thereby controls the duty cycle of the converter and the power supplied by the power stage. | 06-10-2010 |
20130180964 | OVER-VOLTAGE PROTECTION DURING ARC RECOVERY FOR PLASMA-CHAMBER POWER SUPPLIES - A system and method for managing power delivered to a processing chamber is described. In one embodiment current is drawn away from the plasma processing chamber while initiating an application of power to the plasma processing chamber during an initial period of time, the amount of current being drawn away decreasing during the initial period of time so as to increase the amount of power applied to the plasma processing chamber during the initial period of time. | 07-18-2013 |