Patent application number | Description | Published |
20120255404 | ELECTRONIC TORQUE WRENCH WITH A ROTATABLE DISPLAY UNIT - An electronic torque wrench includes a wrench head unit adapted to engage and turn a fastener, a tubular wrench body which includes a front tubular end fittingly engaged and secured with the wrench head unit, and an intermediate tubular segment having an access opening, a grip handle which is configured to securely grip a rear tubular end of the tubular wrench body, a mounting shell which is sleeved on the intermediate tubular segment, and which has an access hole communicated with the access opening, a housing sleeve sleeved on, and rotatable relative to the mounting shell about a lengthwise axis, and a display unit disposed on the housing sleeve to provide a display representing a torque measured by a strain gauge on the wrench head unit. By rotating the housing sleeve, the display unit can be adjusted to a desired angular position for being viewed easily by the user. | 10-11-2012 |
20120255405 | ELECTRONIC TORQUE WRENCH WITH A ROTATABLE DISPLAY UNIT - An electronic torque wrench a wrench head unit adapted to engage and turn a fastener, a tubular first wrench body securely engaged with the wrench head unit, a tubular second wrench body coupled and aligned with the first wrench body by a fitting member to permit rotation of the second wrench body relative to the first wrench body, a mounting shell sleeved on the second wrench body for mounting a display unit to provide a display representing a measured torque. By rotation of the second wrench body, the display unit can be adjusted to a desired angular position for being viewed easily by the user. | 10-11-2012 |
20140298960 | Adjustable Driving Tool - An adjustable driving tool includes a handle and a driving rod. The handle has a limiting portion disposed in the handle and a slot. The limiting portion has an inner space communicating with openings of a first sleeve portion and a second sleeve portion. The slot communicates with the inner space. The handle provided with a pin disposed through the inner space, and the first and second sleeve portions are disposed around the pin. The driving rod has a working end and a fixation end having an elongate through hole around the pin. The fixation end is disposed into the inner space through the slot. The driving rod is slidable relative to the pin, and the fixation end is .controllably selectively inserted into the first sleeve portion or the second sleeve portion so that the driving rod is held. | 10-09-2014 |
Patent application number | Description | Published |
20090103068 | EXPOSURE APPARATUS AND METHOD FOR PHOTOLITHOGRAPHY PROCESS - Provided is an exposure apparatus including a variable focusing device. The variable focusing device may include a transparent membrane that may be deformed in the presence of an electric field. The deformation of the transparent membrane may allow the focus length of a radiation beam to be modified. In an embodiment, the variable focusing device may be modulated such that a radiation beam having a first focus length is provided for a first position on an exposure target and a radiation beam having a second focus length is provided for a second position on the exposure target. A method and computer-readable medium are also provided. | 04-23-2009 |
20110164234 | NOVEL PHOTORESIST MATERIALS AND PHOTOLITHOGRAPHY PROCESSES - A material for use in lithography processing includes a polymer that turns soluble to a base solution in response to reaction with acid and a plurality of magnetically amplified generators (MAGs) each having a magnetic element and each decomposing to form acid bonded with the magnetic element in response to radiation energy. | 07-07-2011 |
20110165515 | NOVEL PHOTORESIST MATERIALS AND PHOTOLITHOGRAPHY PROCESSES - A material for use in lithography processing includes a polymer that turns soluble to a base solution in response to reaction with acid and a plurality of magnetically amplified generators (MAGs) each having a magnetic element and each decomposing to form acid bonded with the magnetic element in response to radiation energy. | 07-07-2011 |
20110212403 | METHOD AND APPARATUS FOR ENHANCED DIPOLE LITHOGRAPHY - Provided is a lithography system that includes a source for providing energy, an imaging system configured to direct the energy onto a substrate to form an image thereon, and a diffractive optical element (DOE) incorporated with the imaging system, the DOE having a first dipole located in a first direction and a second dipole located in the first direction or a second direction perpendicular the first direction. The first dipole includes a first energy-transmitting region spaced a first distance from a center of the DOE. The second dipole includes a second energy-transmitting region spaced a second distance from the center of the DOE. The first distance is greater than the second distance. | 09-01-2011 |
20110284966 | Structure and Method for Alignment Marks - The alignment mark and method for making the same are described. In one embodiment, a semiconductor structure includes a plurality of gate stacks formed on the semiconductor substrate and configured as an alignment mark; doped features formed in the semiconductor substrate and disposed on sides of each of the plurality of gate stacks; and channel regions underlying the plurality of gate stacks and free of channel dopant. | 11-24-2011 |
20110285036 | OVERLAY MARK ASSISTANT FEATURE - A method and apparatus for alignment are disclosed. An exemplary apparatus includes a substrate having an alignment region; an alignment feature in the alignment region of the substrate; and a dummy feature disposed within the alignment feature. A dimension of the dummy feature is less than a resolution of an alignment mark detector. | 11-24-2011 |
20120082940 | PHOTOLITHOGRAPHY PROCESS FOR SEMICONDUCTOR DEVICE - Provided is a non-transitory computer readable medium including instructions to generate a level sensor map and create a compensation map from the level sensor map. The level sensor map includes a first determination of a first height above a reference plane of a feature disposed on a semiconductor substrate, and a second determination of a second height above the reference plane of a second feature disposed on a semiconductor substrate. The first and second feature are in a single exposure field. The compensation map includes a determination of at least one parameter to be used during exposure of a single field during an exposure process for the semiconductor substrate. | 04-05-2012 |
20120146159 | STRUCTURE AND METHOD FOR OVERLAY MARKS - The overlay mark and method for making the same are described. In one embodiment, a semiconductor overlay structure includes gate stack structures formed on the semiconductor substrate and configured as an overlay mark, and a doped semiconductor substrate disposed on both sides of the gate stack structure that includes at least as much dopant as the semiconductor substrate adjacent to the gate stack structure in a device region. The doped semiconductor substrate is formed by at least three ion implantation steps. | 06-14-2012 |
20130188164 | DOUBLE DIPOLE LITHOGRAPHY METHOD FOR SEMICONDUCTOR DEVICE FABRICATION - A method of photolithography including coupling a first aperture to a lithography system, then performing a first illumination process to form a first pattern on a layer of a substrate using the first aperture, thereafter coupling a second aperture to the lithography system, and performing a second illumination process to form a second pattern on the layer of the substrate using the second aperture. The first aperture includes a first pair and a second pair of radiation-transmitting regions. The second aperture includes a second plate having a third pair and a fourth pair of radiation-transmitting regions. | 07-25-2013 |
20130330904 | OVERLAY MARK ASSISTANT FEATURE - A method and apparatus for alignment are disclosed. An exemplary apparatus includes a substrate having an alignment region; an alignment feature in the alignment region of the substrate; and a dummy feature disposed within the alignment feature. A dimension of the dummy feature is less than a resolution of an alignment mark detector. | 12-12-2013 |
20150179573 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing semiconductor device is provided. The method includes the following operations: providing a first conductive portion, a second conductive portion and a third conductive portion over a substrate; forming a dielectric layer over the first conductive portion, the second conductive portion, and the third conductive portion; forming a high-resistance layer over the first conductive portion; forming an oxide layer over the high-resistance layer and the dielectric layer; patterning the dielectric layer and the oxide layer by using the high-resistance layer as a blocking layer to form a first recess to expose the second conductive portion and the third conductive portion and to prevent the first conductive portion from exposure; and forming a plug layer in the first recess to connect the second conductive portion and the third conductive portion. | 06-25-2015 |
20150194422 | SEMICONDUCTOR ARRANGEMENT AND FORMATION THEREOF - A semiconductor arrangement and method of formation are provided herein. A semiconductor arrangement includes a metal connect in contact with a first active region and a second active region, and over a shallow trench isolation region located between the first active region and a second active region. A method of forming the semiconductor arrangement includes recessing the metal connect over the STI region to form a recessed portion of the metal connect. Forming the recessed portion of the metal connect in contact with the first active region and the second active region mitigates RC coupling, such that a first gate is formed closer to a second gate, thus reducing a size of a chip on which the recessed portion is located. | 07-09-2015 |
20150194425 | SEMICONDUCTOR DEVICE AND FORMATION THEREOF - A semiconductor device and method of formation are provided herein. A semiconductor device includes a first active region adjacent a first side of a shallow trench isolation (STI) region. The first active region including a first proximal fin having a first proximal fin height adjacent the STI region, and a first distal fin having a first distal fin height adjacent the first proximal fin, the first proximal fin height less than the first distal fin height. The STI region includes oxide, the oxide having an oxide volume, where the oxide volume is inversely proportional to the first proximal fin height. A method of formation includes forming a first proximal fin with a first proximal fin height less than a first distal fin height of a first distal fin, such that the first proximal fin is situated between the first distal fin and an STI region. | 07-09-2015 |
20150194516 | SEMICONDUCTOR ARRANGEMENT AND FORMATION THEREOF - A semiconductor arrangement and method of forming the same are described. A semiconductor arrangement includes a third metal connect in contact with a first metal connect in a first active region and a second metal connect in a second active region, and over a shallow trench isolation region located between the first active region and a second active region. A method of forming the semiconductor arrangement includes forming a first opening over the first metal connect, the STI region, and the second metal connect, and forming the third metal connect in the first opening. Forming the third metal connect over the first metal connect and the second metal connect mitigates RC coupling. | 07-09-2015 |
20150206872 | METHOD OF FORMING CONTACT STRUCTURE OF GATE STRUCTURE - A method of forming a contact structure of a gate structure is provided. In the method, an oxidation layer and a first sidewall layer disposed between a first metal gate and a second metal gate are etched to expose an underlying silicon substrate. A silicide portion defined by a contact profile is deposited in the exposed portion of the silicon substrate. A second sidewall layer substantially covers the first sidewall layer and at least partially covering the silicide portion is formed after depositing the silicide portion. A metal glue layer is deposited around the first metal gate and the second metal gate defining a trench above the silicide portion. A metal plug is deposited within the trench. | 07-23-2015 |
20150333149 | SEMICONDUCTOR ARRANGEMENT AND FORMATION THEREOF - A semiconductor arrangement and method of formation are provided herein. A semiconductor arrangement includes a metal connect in contact with a first active region and a second active region, and over a shallow trench isolation region located between the first active region and a second active region. A method of forming the semiconductor arrangement includes recessing the metal connect over the STI region to form a recessed portion of the metal connect. Forming the recessed portion of the metal connect in contact with the first active region and the second active region mitigates RC coupling, such that a first gate is formed closer to a second gate, thus reducing a size of a chip on which the recessed portion is located. | 11-19-2015 |
20150380270 | METHOD OF FORMING CONTACT STRUCTURE OF GATE STRUCTURE - A method of forming a contact structure of a gate structure is provided. In the method, an oxidation layer and a first sidewall layer disposed between a first metal gate and a second metal gate are etched to expose an underlying silicon substrate. A silicide portion defined by a contact profile is deposited in the exposed portion of the silicon substrate. A second sidewall layer substantially covers the first sidewall layer and at least partially covering the silicide portion is formed after depositing the silicide portion. A metal glue layer is deposited around the first metal gate and the second metal gate defining a trench above the silicide portion. A metal plug is deposited within the trench. | 12-31-2015 |