Patent application number | Description | Published |
20080318358 | IMAGE SENSOR PIXEL HAVING PHOTODIODE WITH INDIUM PINNING LAYER - An active pixel using a pinned photodiode with a pinning layer formed from indium is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is an N | 12-25-2008 |
20090194671 | IMAGE SENSOR REFLECTOR - An array of pixels is formed using a substrate, where each pixel has a substrate having an incident side for receiving incident light, a photosensitive region formed in the substrate, and a reflector having a complex-shaped surface. The reflector is formed in a portion of the substrate that is opposed to the incident side such that light incident on the complex-shaped surface of the reflector is reflected towards the photosensitive region. | 08-06-2009 |
20090194798 | BACKSIDE ILLUMINATED IMAGING SENSOR HAVING A CARRIER SUBSTRATE AND A REDISTRIBUTION LAYER - A backside illuminated imaging sensor includes a semiconductor substrate having a front surface and a back surface. The semiconductor substrate has at least one imaging array formed on the front surface. The imaging sensor also includes a carrier substrate to provide structural support to the semiconductor substrate, where the carrier substrate has a first surface coupled to the front surface of the semiconductor substrate. A redistribution layer is formed between the front surface of the semiconductor substrate and the second surface of the carrier substrate to route electrical signals between the imaging array and a second surface of the carrier substrate. | 08-06-2009 |
20090200469 | ALTERNATING ROW INFRARED FILTER FOR AN IMAGE SENSOR - An image sensor includes near-infrared cut filters formed over an array of photosensitive elements in a predetermined pattern. The near-infrared cut filters may be formed over one half of a photosensitive element in a split pixel arrangement, over one half the photosensitive elements in the array, over every other photosensitive element in the array, and/or in a checkerboard pattern. | 08-13-2009 |
20090200580 | Image sensor and pixel including a deep photodetector - What is disclosed is an apparatus comprising a transfer gate formed on a substrate and a photodiode formed in the substrate next to the transfer gate. The photodiode comprises a shallow N-type collector formed in the substrate, a deep N-type collector formed in the substrate, wherein a lateral side of the deep N-type collector extends at least under the transfer gate, and a connecting N-type collector formed in the substrate between the deep N-type collector and the shallow N-type collector, wherein the connecting implant connects the deep N-type collector and the shallow N-type collector. Also disclosed is a process comprising forming a deep N-type collector in the substrate, forming a shallow N-type collector formed in the substrate, and forming a connecting N-type collector in the substrate between the deep N-type collector and the shallow N-type collector, wherein the connecting implant connects the deep N-type collector and the shallow N-type collector. A transfer gate is formed on the substrate next to the deep photodiode, wherein a lateral side of the deep N-type collector extends at least under the transfer gate. Other embodiments are disclosed and claimed. | 08-13-2009 |
20090200585 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH BACKSIDE P+ DOPED LAYER - A backside illuminated imaging sensor includes a semiconductor layer having a P-type region. A frontside and backside P | 08-13-2009 |
20090200586 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH SILICIDE LIGHT REFLECTING LAYER - A backside illuminated imaging sensor includes a semiconductor layer, a metal interconnect layer and a silicide light reflecting layer. The semiconductor layer has a front surface and a back surface. An imaging pixel that includes a photodiode region is formed within the semiconductor layer. The metal interconnect layer is electrically coupled to the photodiode region and the silicide light reflecting layer is coupled between the metal interconnect layer and the front surface of the semiconductor layer. In operation, the photodiode region receives light from the back surface of the semiconductor layer, where a portion of the received light propagates through the photodiode region to the silicide light reflecting layer. The silicide light reflecting layer is configured to reflect the portion of light received from the photodiode region. | 08-13-2009 |
20090200589 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH IMPROVED INFRARED SENSITIVITY - A backside illuminated imaging sensor includes a semiconductor layer and an infrared detecting layer. The semiconductor layer has a front surface and a back surface. An imaging pixel includes a photodiode region formed within the semiconductor layer. The infrared detecting layer is disposed above the front surface of the semiconductor layer to receive infrared light that propagates through the imaging sensor from the back surface of the semiconductor layer. | 08-13-2009 |
20090200590 | IMAGE SENSOR WITH LOW ELECTRICAL CROSS-TALK - An array of pixels is formed using a substrate, where each pixel has a substrate having a backside and a frontside that includes metalization layers, a photodiode formed in the substrate, frontside P-wells formed using frontside processing that are adjacent to the photosensitive region, and an N-type region formed in the substrate below the photodiode. The N-type region is formed in a region of the substrate below the photodiode and is formed at least in part in a region of the substrate that is deeper than the depth of the frontside P-wells. | 08-13-2009 |
20090200622 | SELF-ALIGNED FILTER FOR AN IMAGE SENSOR - An image sensor includes at least one photosensitive element disposed in a semiconductor substrate. Metal conductors may be disposed on the semiconductor substrate. A filter may be disposed between at least two individual metal conductors and a micro-lens may be disposed on the filter. There may be insulator material disposed between the metal conductors and the semiconductor substrate and/or between individual metal conductors. The insulator material may be removed so that the filter may be disposed on the semiconductor substrate. | 08-13-2009 |
20090200623 | IMAGE SENSOR WITH MICRO-LENSES OF VARYING FOCAL LENGTHS - An image sensor having a plurality of micro-lenses disposed on a semiconductor substrate. A first micro-lens has a different focal length, height, shape, curvature, thickness, etc., than a second micro-lens. The image sensor may be back side illuminated or front side illuminated. | 08-13-2009 |
20090200624 | Circuit and photo sensor overlap for backside illumination image sensor - A backside illuminated (“BSI”) imaging sensor pixel includes a photodiode region and pixel circuitry. The photodiode region is disposed within a semiconductor die for accumulating an image charge in response to light incident upon a backside of the BSI imaging sensor pixel. The pixel circuitry includes transistor pixel circuitry disposed within the semiconductor die between a frontside of the semiconductor die and the photodiode region. At least a portion of the pixel circuitry overlaps the photodiode region. | 08-13-2009 |
20090200625 | BACKSIDE ILLUMINATED IMAGE SENSOR HAVING DEEP LIGHT REFLECTIVE TRENCHES - An array of pixels is formed using a substrate having a frontside and a backside that is for receiving incident light. Each pixel typically includes metallization layers included in the frontside of the substrate, a photosensitive region formed in the backside of the substrate, and a trench formed around the photosensitive region in the backside of the substrate. The trench causes the incident light to be directed away from the trench and towards the photosensitive region. | 08-13-2009 |
20090200626 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH VERTICAL PIXEL SENSOR - A backside illuminated imaging sensor includes a vertical stacked sensor that reduces cross talk by using different silicon layers to form photodiodes at separate levels within a stack (or separate stacks) to detect different colors. Blue light-, green light-, and red light-detection silicon layers are formed, with the blue light detection layer positioned closest to the backside of the sensor and the red light detection layer positioned farthest from the backside of the sensor. An anti-reflective coating (ARC) layer can be inserted in between the red and green light detection layers to reduce the optical cross talk captured by the red light detection layer. Amorphous polysilicon can be used to form the red light detection layer to boost the efficiency of detecting red light. | 08-13-2009 |
20090200631 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH LIGHT ATTENUATING LAYER - A backside illuminated imaging sensor includes a semiconductor substrate, a metal interconnect layer and a light attenuating layer. The semiconductor substrate has a front surface, a back surface, and includes at least one imaging pixel formed on the front surface of the semiconductor substrate. The metal interconnect layer is electrically coupled to the imaging pixel and the light attenuating layer is coupled between the metal interconnect layer and the front surface of the semiconductor substrate. In operation, the imaging pixel receives light from the back surface of the semiconductor substrate, where a portion of the received light propagates through the imaging pixel to the light attenuating layer. The light attenuating layer is configured to substantially attenuate the portion of light received from the imaging pixel. | 08-13-2009 |
20090201393 | Black reference pixel for backside illuminated image sensor - An imaging sensor pixel array includes a semiconductor substrate, a plurality of active pixels and at least one black reference pixel. The plurality of active pixels are disposed in the semiconductor substrate for capturing an image. Each of the active pixels includes a first region for receiving light including a p-n junction for accumulating an image charge and active pixel circuitry coupled to the first region to readout the image charge. The black reference pixel is also disposed within the semiconductor substrate for generating a black level reference value. The black reference pixel includes a second region for receiving light without a p-n junction and black pixel circuitry coupled to the photodiode region without the p-n junction to readout a black level reference signal. | 08-13-2009 |
20090267070 | Multilayer image sensor structure for reducing crosstalk - An image sensor pixel includes a substrate, an epitaxial layer, and a light collection region. The substrate is doped to have a first conductivity type. The epitaxial layer is disposed over the substrate and doped to have a second conductivity type opposite of the first conductivity type. The light collection region is disposed within the epitaxial layer for collecting photo-generated charge carriers. The light collection region is doped to have the first conductivity type as well. | 10-29-2009 |
20090294632 | GLOBALLY RESET IMAGE SENSOR PIXELS - An imaging circuit includes a pixel array that is arranged to concurrently reset pixels in a pixel array in response to a global reset signal. The pixels are arranged in rows, such that the rows can be individually selected by a row select line. A reset transistor concurrently resets the pixels by coupling a reset voltage to a floating diffusion of the pixel. A transfer gate transistor selectively couples the floating diffusion to a storage region. A storage gate transistor selectively couples the storage region to a photosensitive region so that the reset transistor, the transfer gate transistor, and the storage gate transistor for each of the pixels can be activated in response to the global reset signal. A double correlated sampler may be used to provide a correlated double sample using a first sampled voltage of a reset voltage and a second sampled voltage of a pixel voltage that is produced when a photodiode region is exposed to incident light. | 12-03-2009 |
20090294811 | IMAGE SENSOR WITH BACKSIDE PASSIVATION AND METAL LAYER - An image sensor includes a semiconductor layer that low-pass filters light of different wavelengths. For example, the semiconductor layer proportionately absorbs photons of shorter wavelengths and proportionately passes more photons of longer wavelengths such that the longer wavelength photons often pass through without being absorbed. An imaging pixel having a photodiode is formed on a front surface of the semiconductor layer, where the photodiode is an N | 12-03-2009 |
20090294858 | TRANSISTOR WITH CONTACT OVER GATE ACTIVE AREA - A transistor contact over a gate active area includes a transistor gate formed on a substrate of an integrated circuit. A gate insulator is formed beneath the transistor gate and helps define an active area for the transistor gate. An insulating layer is formed over the transistor gate. A metal contact plug is formed within a portion of the insulating layer that lies over the active area such that the metal contact plug forms an electrical contact with the transistor gate. | 12-03-2009 |
20090295962 | IMAGE SENSOR HAVING DIFFERING WAVELENGTH FILTERS - An image sensor includes filters formed over a portion of an array of photosensitive elements in a predetermined pattern. The pattern can be such that the exposure of a matrix (such as a 2-by-2 square of pixels) to light (such as blue light) is improved, while maintaining acceptable capability to capture light across the entire spectrum. The pattern can be such that two blue filters, one red, and one green filter is used by a 2-by-2 square matrix of pixels. The pattern can also include cyan, yellow, and magenta (CYM) filters. | 12-03-2009 |
20090302358 | CMOS image sensor with high full-well-capacity - An image sensor with a high full-well capacity includes a photosensitive region, a transfer gate, and sidewall spacers. The photosensitive region is formed to accumulate an image charge in response to light. The transfer gate disposed adjacent to the photosensitive region and coupled to selectively transfer the image charge from the photosensitive region to other pixel circuitry. First and second sidewall spacers are disposed on either side of the transfer gate. The first sidewall spacer closest to the photosensitive region is narrower than the second sidewall spacer. In some cases, the first sidewall spacer may be omitted. | 12-10-2009 |
20090302409 | IMAGE SENSOR WITH MULTIPLE THICKNESS ANTI-RELFECTIVE COATING LAYERS - An image sensor includes a substrate having a surface at which incident light is received. A pixel array is formed over and within the substrate. The pixel array includes a first and a second pixel arranged to receive light of different colors. The first pixel includes a photosensitive region formed in the substrate and has a first anti-reflective coating (ARC) layer formed over the photosensitive region. The first ARC layer has a first thickness that produces destructive interference above the first ARC layer in response to the incident light. The second pixel includes a photosensitive region formed in the substrate, and a second ARC layer formed over the photosensitive region that produces destructive interference above the second ARC layer in response to the incident light. | 12-10-2009 |
20100013039 | Backside-illuminated imaging sensor including backside passivation - The disclosure describes embodiments of a process comprising forming a pixel on a frontside of a substrate, the substrate having a frontside, a backside, and a thickness substantially equal to a distance between the frontside and the backside. The thickness of the substrate is reduced by removing material from the backside of the substrate to allow for backside illumination of the pixel, and the backside of the substrate is treated with a hydrogen plasma to passivate the backside. The disclosure also describes embodiments of an apparatus comprising a semiconductor wafer having a frontside, a backside, and a thickness substantially equal to a distance between the frontside and the backside, and a pixel formed on the frontside, wherein the thickness of the wafer is selected and adjusted to allow for illumination of the pixel through the backside of the wafer, and wherein the backside is treated with a hydrogen plasma to passivate the backside. | 01-21-2010 |
20100038523 | IMAGE SENSOR WITH BURIED SELF ALIGNED FOCUSING ELEMENT - An image sensor includes an optical sensor region, a stack of dielectric and metal layers, and an embedded layer. The optical sensor is disposed within a semiconductor substrate. The stack of dielectric and metal layers are disposed on the front side of the semiconductor substrate above the optical sensor region. The embedded focusing layer is disposed on the backside of the semiconductor substrate in a Backside Illuminated (BSI) image sensor, supported by a support grid, or a support grid composed of the semiconductor substrate. | 02-18-2010 |
20100084692 | IMAGE SENSOR WITH LOW CROSSTALK AND HIGH RED SENSITIVITY - A color pixel array includes first, second, and third pluralities of color pixels each including a photosensitive region disposed within a first semiconductor layer. In one embodiment, a second semiconductor layer including deep dopant regions is disposed below the first semiconductor layer. The deep dopant regions each reside below a corresponding one of the first plurality of color pixels but substantially not below the second and third pluralities of color pixels. In one embodiment, buried wells are disposed beneath the second and third pluralities of color pixels but substantially not below the first plurality of color pixels. | 04-08-2010 |
20100109060 | IMAGE SENSOR WITH BACKSIDE PHOTODIODE IMPLANT - An array of pixels is formed using a substrate. Each pixel can be formed on the substrate, which has a backside and a frontside that includes metalization layers. A photodiode is formed in the substrate and frontside P-wells are formed using frontside processing that are adjacent to the photosensitive region. A first N-type region is formed in the substrate below the photodiode. A second N-type region is formed in a region of the substrate below the first N-type region and is formed using backside processing. | 05-06-2010 |
20100117123 | IMAGE SENSOR PIXEL HAVING A LATERAL DOPING PROFILE FORMED WITH INDIUM DOPING - An active pixel using a transfer gate that has a polysilicon gate doped with indium. The pixel includes a photosensitive element formed in a semiconductor substrate and an n-type floating node formed in the semiconductor substrate. An n-channel transfer transistor having a transfer gate is formed between the floating node and the photosensitive element. The pixel substrate has a laterally doping gradient doped with an indium dopant. | 05-13-2010 |
20100123069 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH IMPROVED ANGULAR RESPONSE - A backside illuminated imaging pixel with improved angular response includes a semiconductor layer having a front and a back surface. The imaging pixel also includes a photodiode region formed in the semiconductor layer. The photodiode region includes a first and a second n-region. The first n-region has a centerline projecting between the front and back surfaces of the semiconductor layer. The second n-region is disposed between the first n-region and the back surface of the semiconductor layer such that the second n-region is offset from the centerline of the first n-region. | 05-20-2010 |
20100123174 | LIGHTLY-DOPED DRAINS (LDD) OF IMAGE SENSOR TRANSISTORS USING SELECTIVE EPITAXY - Embodiments of the present invention are directed to an image sensor having pixel transistors and peripheral transistors disposed in a silicon substrate. For some embodiments, a protective coating is disposed on the peripheral transistors and doped silicon is epitaxially grown on the substrate to form lightly-doped drain (LDD) areas for the pixel transistors. The protective oxide may be used to prevent epitaxial growth of silicon on the peripheral transistors during formation of the LDD areas of the pixel transistors. | 05-20-2010 |
20100140675 | CMOS IMAGE SENSOR WITH IMPROVED BACKSIDE SURFACE TREATMENT - An apparatus and method for fabricating an array of backside illuminated (“BSI”) image sensors is disclosed. Front side components of the BSI image sensors are formed into a front side of the array. A dopant layer is implanted into a backside of the array. The dopant layer establishes a dopant gradient to encourage photo-generated charge carriers to migrate towards the front side of the array. At least a portion of the dopant layer is annealed. A surface treatment is formed on the backside of the dopant layer to cure surface defects. | 06-10-2010 |
20100144081 | IMAGE SENSOR PIXEL HAVING PHOTODIODE WITH MULTI-DOPANT IMPLANTATION - An active pixel using a photodiode with multiple species of N type dopants is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is an N | 06-10-2010 |
20100159632 | TECHNIQUE FOR FABRICATION OF BACKSIDE ILLUMINATED IMAGE SENSOR - An array of backside illuminated image sensors is fabricated using a number of processes. These processes include fabricating front side components of the backside illuminated image sensors into or onto a first side of an epitaxial layer disposed over a substrate layer. Dopants are diffused from the substrate through a second side of the epitaxial layer to create a dopant gradient band in the epitaxial layer adjacent to the substrate layer. The backside of the array is then thinned to remove the substrate layer while retaining at least a portion of the dopant gradient band in the epitaxial layer. | 06-24-2010 |
20100165134 | Arrayed Imaging Systems And Associated Methods - Arrayed imaging systems include an array of detectors formed with a common base and a first array of layered optical elements, each one of the layered optical elements being optically connected with a detector in the array of detectors. | 07-01-2010 |
20100271524 | MULTILAYER IMAGE SENSOR PIXEL STRUCTURE FOR REDUCING CROSSTALK - An image sensor pixel includes a substrate, a first epitaxial layer, a collector layer, a second epitaxial layer and a light collection region. The substrate is doped to have a first conductivity type. The first epitaxial layer is disposed over the substrate and doped to have the first conductivity type as well. The collector layer is selectively disposed over at least a portion of the first epitaxial layer and doped to have a second conductivity type. The second epitaxial layer is disposed over the collector layer and doped to have the first conductivity type. The light collection region collects photo-generated charge carriers and is disposed within the second epitaxial layer. The light collection region is also doped to have the second conductivity type. | 10-28-2010 |
20100289911 | IMAGE SENSOR AND PIXEL THAT HAS POSITIVE TRANSFER GATE VOLTAGE DURING INTEGRATION PERIOD - A pixel and image sensor formed in accordance with the present invention has two modes of operation: a normal mode and a low light mode. The present invention switches from a normal to a low light mode based upon the amount of illumination on the image sensor. Once the level of illumination is determined, a decision is made by comparing the level of illumination to a threshold whether to operate in normal mode or low light mode. In low light mode, the reset transistor (for a 3T pixel) or the transfer transistor (for a 4T pixel) is biased positive. | 11-18-2010 |
20100323470 | BACKSIDE ILLUMINATED IMAGE SENSOR HAVING DEEP LIGHT REFLECTIVE TRENCHES - An array of pixels is formed using a semiconductor layer having a frontside and a backside through which incident light is received. Each pixel typically includes a photosensitive region formed in the semiconductor layer and a trench formed adjacent to the photosensitive region. The trench causes the incident light to be directed away from the trench and towards the photosensitive region. | 12-23-2010 |
20110068429 | IMAGE SENSOR WITH CONTACT DUMMY PIXELS - An image sensor array includes a substrate layer, a metal layer, an epitaxial layer, a plurality of imaging pixels, and a contact dummy pixel. The metal layer is disposed above the substrate layer. The epitaxial layer is disposed between the substrate layer and the metal layer. The imaging pixels are disposed within the epitaxial layer and each include a photosensitive element for collecting an image signal. The contact dummy pixel is dispose within the epitaxial layer and includes an electrical conducting path through the epitaxial layer. The electrical conducting path couples to the metal layer above the epitaxial layer. | 03-24-2011 |
20110085062 | SYSTEM AND METHOD FOR IMPROVED IMAGE PROCESSING - A system and method for improving image processing. In one aspect of the invention the method includes receiving data indicating an intensity of light incident on a first pixel of a pixel array and determining from the received data if the intensity of incident light on the first pixel satisfies a first condition. A processing operation is performed on data received from a second, third and fourth pixel of the pixel array but skipped on the data received from the first pixel if the first condition is satisfied. The first condition includes whether the first pixel is substantially saturated in response to an intensity of light incident on the first pixel. | 04-14-2011 |
20110085067 | MULTILAYER IMAGE SENSOR PIXEL STRUCTURE FOR REDUCING CROSSTALK - An image sensor pixel includes a substrate, a first epitaxial layer, a collector layer, a second epitaxial layer and a light collection region. The substrate is doped to have a first conductivity type. The first epitaxial layer is disposed over the substrate and doped to have the first conductivity type as well. The collector layer is selectively disposed over at least a portion of the first epitaxial layer and doped to have a second conductivity type. The second epitaxial layer is disposed over the collector layer and doped to have the first conductivity type. The light collection region collects photo-generated charge carriers and is disposed within the second epitaxial layer. The light collection region is also doped to have the second conductivity type. | 04-14-2011 |
20110089311 | TRENCH TRANSFER GATE FOR INCREASED PIXEL FILL FACTOR - An image sensor provides high scalability and reduced image lag. The sensor includes a first imaging pixel that has a first photodiode region formed in a substrate of the image sensor. The sensor also includes a first vertical transfer transistor coupled to the first photodiode region. The first vertical transfer transistor can be used to establish an active channel. The active channel typically extends along the length of the first vertical transfer transistor and couples the first photodiode region to a floating diffusion. | 04-21-2011 |
20110089517 | CMOS IMAGE SENSOR WITH HEAT MANAGEMENT STRUCTURES - An image sensor includes a device wafer substrate of a device wafer, a device layer of the device wafer, and optionally a heat control structure and/or a heat sink. The device layer is disposed on a frontside of the device wafer substrate and includes a plurality of photosensitive elements disposed within a pixel array region and peripheral circuitry disposed within a peripheral circuits region. The photosensitive elements are sensitive to light incident on a backside of the device wafer substrate. The heat control structure is disposed within the device wafer substrate and thermally isolates the pixel array region from the peripheral circuits region to reduce heat transfer between the peripheral circuits region and the pixel array region. The heat sink conducts heat away from the device layer. | 04-21-2011 |
20110095188 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH IMPROVED INFRARED SENSITIVITY - A backside illuminated imaging sensor includes a semiconductor layer and an infrared detecting layer. The semiconductor layer has a front surface and a back surface. An imaging pixel includes a photodiode region formed within the semiconductor layer. The infrared detecting layer is disposed above the front surface of the semiconductor layer to receive infrared light that propagates through the imaging sensor from the back surface of the semiconductor layer. | 04-28-2011 |
20110115002 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH REINFORCED PAD STRUCTURE - A backside illuminated imaging sensor with reinforced pad structure includes a device layer, a metal stack, an opening and a frame. The device layer has an imaging array formed in a front side of the device layer and the imaging array is adapted to receive light from a back side of the device layer. The metal stack is coupled to the front side of the device layer where the metal stack includes at least one metal interconnect layer having a metal pad. The opening extends from the back side of the device layer to the metal pad to expose the metal pad for wire bonding. The frame is disposed within the opening to structurally reinforce the metal pad. | 05-19-2011 |
20110140222 | PASSIVATION PLANARIZATION - A pixel cell is formed by locating a first passivation layer over the final layer of metal lines. Subsequently, the uneven, non-uniform passivation layer is subjected to a planarization process such as chemical mechanical polishing, mechanical abrasion, or etching. A spin-on glass layer may be deposited over the non-uniform passivation layer prior to planarization. Once a uniform, flat first passivation layer is achieved over the final metal, a second passivation layer, a color filter array, or a lens forming layer with uniform thickness is formed over the first passivation layer. The passivation layers can be oxide, nitride, a combination of oxide and nitride, or other suitable materials. The color filter array layer may also undergo a planarization process prior to formation of the lens forming layer. The present invention is also applicable to other devices. | 06-16-2011 |
20110177650 | CMOS IMAGE SENSOR WITH SELF-ALIGNED PHOTODIODE IMPLANTS - An example method of forming a pinned photodiode includes applying a photoresist mask to a semiconductor layer at a location where a transfer gate will subsequently be formed. First dopant ions are then implanted at a first angle to form a first dopant region under an edge of the photoresist mask. Next, a photoresist mask is etched such that a thickness of the photoresist mask is reduced to form a trimmed photoresist mask. Second dopant ions are then implanted at a second angle to form a second dopant region, wherein the second dopant ions are shadowed by the trimmed photoresist mask to exclude the second dopant ions from a region partially above the first dopant region and adjacent to an edge of the trimmed photoresist mask. | 07-21-2011 |
20110199518 | IMAGE SENSOR WITH IMPROVED BLACK LEVEL CALIBRATION - An imaging system capable of black level calibration includes an imaging pixel array, at least one black reference pixel, and peripheral circuitry. The imaging pixel array includes a plurality of active pixels each coupled to capture image data. The black reference pixel is coupled to generate a black reference signal for calibrating the image data. Light transmitting layers are disposed on a first side of a pixel array die including the imaging system and cover at least the imaging pixel array and the black reference pixel. A light shielding layer is disposed on the first side of the pixel array die and covers a portion of the light transmitting layers and the black reference pixel without covering the imaging pixel array. | 08-18-2011 |
20110241090 | HIGH FULL-WELL CAPACITY PIXEL WITH GRADED PHOTODETECTOR IMPLANT - Embodiments of a process for forming a photodetector region in a CMOS pixel by dopant implantation, the process comprising masking a photodetector area of a surface of a substrate for formation of the photodetector region, positioning the substrate at a plurality of twist angles, and at each of the plurality of twist angles, directing dopants at the photodetector area at a selected tilt angle. Embodiments of a CMOS pixel comprising a photodetector region formed in a substrate, the photodetector region comprising overlapping first and second dopant implants, wherein the overlap region has a different dopant concentration than the non-overlapping parts of the first and second implants, a floating diffusion formed in the substrate, and a transfer gate formed on the substrate between the photodetector and the transfer gate. Other embodiments are disclosed and claimed. | 10-06-2011 |
20110260221 | LASER ANNEAL FOR IMAGE SENSORS - A technique for fabricating an image sensor including a pixel circuitry region and a peripheral circuitry region includes fabricating front side components on a front side of the image sensor. A dopant layer is implanted on a backside of the image sensor. A anti-reflection layer is formed on the backside and covers a first portion of the dopant layer under the pixel circuitry region while exposing a second portion of the dopant layer under the peripheral circuitry region. The first portion of the dopant layer is laser annealed from the backside of the image sensor through the anti-reflection layer. The anti-reflection layer increases a temperature of the first portion of the dopant layer during the laser annealing. | 10-27-2011 |
20110278436 | IMAGE SENSOR WITH BACKSIDE PASSIVATION AND METAL LAYER - An image sensor includes a semiconductor layer that filters light of different wavelengths. For example, the semiconductor layer absorbs photons of shorter wavelengths and passes more photons of longer wavelengths such that the longer wavelength photons often pass through without being absorbed. An imaging pixel having a photodiode is formed near a front side of the semiconductor layer. A dopant layer is formed below the photodiode near a back side of the semiconductor layer. A mirror that primarily reflects photons of longer visible wavelengths is disposed on the back side of the semiconductor layer. | 11-17-2011 |
20120001242 | SINGLE POLY CMOS IMAGER - More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent gates in each pixel cell, and particularly at least between the charge collecting gate and the gate downstream to the charge collecting gate. To reduce the gaps between gates, an insulator cap with spacers on its sidewalls is formed for each gate over a conductive layer. The gates are then etched from the conductive layer using the insulator caps and spacers as hard masks, enabling the gates to be formed significantly closer together than previously possible, which, in turn increases charge transfer efficiency. By providing a lightly doped region on between adjacent gates, a more complete charge transfer is effected from the charge collecting gate. | 01-05-2012 |
20120013777 | CMOS IMAGE SENSOR WITH IMPROVED PHOTODIODE AREA ALLOCATION - Embodiments of an apparatus comprising a pixel array comprising a plurality of macropixels. Each macropixel includes a pair of first pixels each including a color filter for a first color, the first color being one to which pixels are most sensitive, a second pixel including a color filter for a second color, the second color being one to which the pixels are least sensitive and a third pixel including a color filter for a third color, the third color being one to which pixels have a sensitivity between the least sensitive and the most sensitive, wherein the first pixels each occupy a greater proportion of the light-collection area of the macropixel than either the second pixel or the third pixel. Corresponding process and system embodiments are disclosed and claimed. | 01-19-2012 |
20120018620 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH VERTICAL PIXEL SENSOR - A backside illuminated imaging sensor includes a vertical stacked sensor that reduces cross talk by using different silicon layers to form photodiodes at separate levels within a stack (or separate stacks) to detect different colors. Blue light-, green light-, and red light-detection silicon layers are formed, with the blue light detection layer positioned closest to the backside of the sensor and the red light detection layer positioned farthest from the backside of the sensor. An anti-reflective coating (ARC) layer can be inserted in between the red and green light detection layers to reduce the optical cross talk captured by the red light detection layer. Amorphous polysilicon can be used to form the red light detection layer to boost the efficiency of detecting red light. | 01-26-2012 |
20120019695 | IMAGE SENSOR HAVING DARK SIDEWALLS BETWEEN COLOR FILTERS TO REDUCE OPTICAL CROSSTALK - An apparatus and technique for fabricating an image sensor including the dark sidewall films disposed between adjacent color filters. The image sensor further includes an array of photosensitive elements disposed in a substrate layer, a color filter array (“CFA”) including CFA elements having at least two different colors disposed on a light incident side of the substrate layer, and an array of microlenses disposed over the CFA. Each microlens is aligned to direct light incident on the light incident side of the image sensor through a corresponding CFA element to a corresponding photosensitive element. The dark sidewall films are disposed on sides of the CFA elements and separate adjacent ones of the CFA elements having different colors. | 01-26-2012 |
20120038014 | BACKSIDE ILLUMINATED IMAGE SENSOR WITH STRESSED FILM - A backside illuminated (“BSI”) complementary metal-oxide semiconductor (“CMOS”) image sensor includes a photosensitive region disposed within a semiconductor layer and a stress adjusting layer. The photosensitive region is sensitive to light incident on a backside of the BSI CMOS image sensor to collect an image charge. The stress adjusting layer is disposed on a backside of the semiconductor layer to establish a stress characteristic that encourages photo-generated charge carriers to migrate towards the photosensitive region. | 02-16-2012 |
20120062762 | METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT AND PHOTOSENSOR CELL WITH SELECTIVELY SILICIDED GATES - The invention also relates to an apparatus and method for selectively providing a silicide coating over the transistor gates of a CMOS imager to improve the speed of the transistor gates. The method further includes an apparatus and method for forming a self aligned photo shield over the CMOS imager. | 03-15-2012 |
20120086844 | CIRCUIT AND PHOTO SENSOR OVERLAP FOR BACKSIDE ILLUMINATION IMAGE SENSOR - A method of operation of a backside illuminated (BSI) pixel array includes acquiring an image signal with a first photosensitive region of a first pixel within the BSI pixel array. The image signal is generated in response to light incident upon a backside of the first pixel. The image signal acquired by the first photosensitive region is transferred to pixel circuitry of the first pixel disposed on a frontside of the first pixel opposite the backside. The pixel circuitry at least partially overlaps the first photosensitive region of the first pixel and extends over die real estate above a second photosensitive region of a second pixel adjacent to the first pixel such that the second pixel donates die real estate unused by the second pixel to the first pixel to accommodate larger pixel circuitry than would fit within the first pixel. | 04-12-2012 |
20120104525 | IMAGE SENSOR WITH COLOR PIXELS HAVING UNIFORM LIGHT ABSORPTION DEPTHS - An example image sensor includes first, second, and third micro-lenses. The first micro-lens is in a first color pixel and has a first curvature and a first height. The second micro-lens is in a second color pixel and has a second curvature and a second height. The third micro-lens is in a third color pixel and has a third curvature and a third height. The first curvature is the same as both the second curvature and the third curvature and the first height is greater than the second height and the second height is greater than the third height, such that light absorption depths for the first, second, and third color pixels are the same. | 05-03-2012 |
20120153123 | IMAGE SENSOR HAVING SUPPLEMENTAL CAPACITIVE COUPLING NODE - An image sensor includes a pixel array, a bit line, supplemental capacitance node line, and a supplemental capacitance circuit. The pixel array includes a plurality of pixel cells each including a floating diffusion (“FD”) node and a photosensitive element coupled to selectively transfer image charge to the FD node. The bit line is coupled to selectively conduct image data output from a first group of the pixel cells. The supplemental capacitance node line is coupled to the FD node of a second group of the pixel cells to selectively couple a supplemental capacitance to the FD nodes of the second group in response to a control signal. In various embodiments, the first and second group of pixel cells may be the same group or a different group of the pixel cells and may add a capacitive boost feature or a multi conversion gain feature. | 06-21-2012 |
20120235212 | BACKSIDE-ILLUMINATED (BSI) IMAGE SENSOR WITH REDUCED BLOOMING AND ELECTRICAL SHUTTER - Embodiments of a pixel including a photosensitive region formed in a surface of a substrate and an overflow drain formed in the surface of the substrate at a distance from the photosensitive area, an electrical bias of the overflow drain being variable and controllable. Embodiments of a pixel including a photosensitive region formed in a surface of a substrate, a source-follower transistor coupled to the photosensitive region, the source-follower transistor including a drain, and a doped bridge coupling the photosensitive region to the drain of the source-follower transistor. | 09-20-2012 |
20120249845 | IMAGE SENSOR WITH IMPROVED BLACK LEVEL CALIBRATION - An imaging system capable of black level calibration includes an imaging pixel array, at least one black reference pixel, and peripheral circuitry. The imaging pixel array includes a plurality of active pixels each coupled to capture image data. The black reference pixel is coupled to generate a black reference signal for calibrating the image data. Light transmitting layers are disposed on a first side of a pixel array die including the imaging system and cover at least the imaging pixel array and the black reference pixel. A light shielding layer is disposed on the first side of the pixel array die and covers a portion of the light transmitting layers and the black reference pixel without covering the imaging pixel array. | 10-04-2012 |
20120282728 | BACKSIDE ILLUMINATED IMAGING SENSOR WITH REINFORCED PAD STRUCTURE - A method of fabricating a backside illuminated imaging sensor that includes a device layer, a metal stack, and an opening is disclosed. The device layer has an imaging array formed in a front side of the device layer, where the imaging array is adapted to receive light from a back side of the device layer. The metal stack is coupled to the front side of the device layer and includes at least one metal interconnect layer having a metal pad. The opening extends from the back side of the device layer to the metal pad to expose the metal pad for wire bonding. The method includes depositing a film on the back side of the device layer and within the opening, then etching the film to form a frame within the opening to structurally reinforce the metal pad. | 11-08-2012 |
20120295385 | LIGHTLY-DOPED DRAINS (LDD) OF IMAGE SENSOR TRANSISTORS USING SELECTIVE EPITAXY - Embodiments of the present invention are directed to an image sensor having pixel transistors and peripheral transistors disposed in a silicon substrate. For some embodiments, a protective coating is disposed on the peripheral transistors and doped silicon is epitaxially grown on the substrate to form lightly-doped drain (LDD) areas for the pixel transistors. The protective oxide may be used to prevent epitaxial growth of silicon on the peripheral transistors during formation of the LDD areas of the pixel transistors. | 11-22-2012 |
20120302000 | LASER ANNEAL FOR IMAGE SENSORS - A technique for fabricating an image sensor including a pixel circuitry region and a peripheral circuitry region includes fabricating front side components on a front side of the image sensor. A dopant layer is implanted on a backside of the image sensor. A anti-reflection layer is formed on the backside and covers a first portion of the dopant layer under the pixel circuitry region while exposing a second portion of the dopant layer under the peripheral circuitry region. The first portion of the dopant layer is laser annealed from the backside of the image sensor through the anti-reflection layer. The anti-reflection layer increases a temperature of the first portion of the dopant layer during the laser annealing. | 11-29-2012 |
20120313197 | IN-PIXEL HIGH DYNAMIC RANGE IMAGING - Embodiments of the invention describe providing high dynamic range imaging (HDRI or simply HDR) to an imaging pixel by coupling a floating diffusion node of the imaging pixel to a plurality of metal-oxide semiconductor (MOS) capacitance regions. It is understood that a MOS capacitance region only turns “on” (i.e., changes the overall capacitance of the floating diffusion node) when the voltage at the floating diffusion node (or a voltage difference between a gate node and the floating diffusion node) is greater than its threshold voltage; before the MOS capacitance region is “on” it does not contribute to the overall capacitance or conversion gain of the floating diffusion node. | 12-13-2012 |
20130001661 | HIGH FULL-WELL CAPACITY PIXEL WITH GRADED PHOTODETECTOR IMPLANT - Embodiments of a process for forming a photodetector region in a CMOS pixel by dopant implantation, the process comprising masking a photodetector area of a surface of a substrate for formation of the photodetector region, positioning the substrate at a plurality of twist angles, and at each of the plurality of twist angles, directing dopants at the photodetector area at a selected tilt angle. Embodiments of a CMOS pixel comprising a photodetector region formed in a substrate, the photodetector region comprising overlapping first and second dopant implants, wherein the overlap region has a different dopant concentration than the non-overlapping parts of the first and second implants, a floating diffusion formed in the substrate, and a transfer gate formed on the substrate between the photodetector and the transfer gate. Other embodiments are disclosed and claimed. | 01-03-2013 |
20130009043 | IMAGE SENSOR HAVING SUPPLEMENTAL CAPACITIVE COUPLING NODE - An image sensor includes a pixel array, a bit line, a supplemental capacitance node line, and a control circuit. The pixel array includes a plurality of pixel cells each including a floating diffusion (“FD”) node and a photosensitive element coupled to selectively transfer image charge to the FD node. The bit line is coupled to selectively conduct image data output from a first group of the pixel cells. The supplemental capacitance node line is coupled to the FD node of a second group of the pixel cells different from the first group. The control circuit is coupled to the supplemental capacitance node line to selectively increase the potential at the FD node of each of the pixel cells of the second group by selectively asserting a FD boost signal on the supplemental capacitance node line. | 01-10-2013 |
20130026547 | ACTIVE PIXEL SENSOR WITH A DIAGONAL ACTIVE AREA - An imaging device formed as a CMOS semiconductor integrated circuit having two adjacent pixels in a row connected to a common column line and a processor based system with such an imaging device. By having adjacent pixels of a row share column lines, the CMOS imager circuit eliminates half the column lines of a traditional imager allowing the fabrication of a smaller imager. The imaging device also may be fabricated to have a diagonal active area to facilitate contact of two adjacent pixels with the single column line and allow linear row select lines, reset lines and column lines. | 01-31-2013 |
20130032921 | BACKSIDE ILLUMINATED IMAGE SENSOR WITH STRESSED FILM - An image sensor includes a photosensitive region disposed within a semiconductor layer and a stress adjusting layer. The photosensitive region is sensitive to light incident through a first side of the image sensor to collect an image charge. The stress adjusting layer is disposed over the first side of the semiconductor layer to establish a stress characteristic that encourages photo-generated charge carriers to migrate towards the photosensitive region. | 02-07-2013 |
20130033627 | COLOR FILTER PATTERNING USING HARD MASK - Embodiments are disclosed of an apparatus comprising a color filter arrangement including a set of color filters. The set of color filters includes a pair of first color filters, each having first and second hard mask layers formed thereon, a second color filter having the first hard mask layer formed thereon, and a third color filter having no hard mask layer formed thereon. Other embodiments are disclosed and claimed. | 02-07-2013 |
20130033629 | IMAGE SENSOR WITH IMPROVED BLACK LEVEL CALIBRATION - An imaging system capable of black level calibration includes an imaging pixel array, at least one black reference pixel, and peripheral circuitry. The imaging pixel array includes a plurality of active pixels each coupled to capture image data. The black reference pixel is coupled to generate a black reference signal for calibrating the image data. Light transmitting layers are disposed on a first side of a pixel array die including the imaging system and cover at least the imaging pixel array and the black reference pixel. A light shielding layer is disposed on the first side of the pixel array die and covers a portion of the light transmitting layers and the black reference pixel without covering the imaging pixel array. | 02-07-2013 |
20130069188 | DUAL-FACING CAMERA ASSEMBLY - Embodiments of the invention relate to a camera assembly including a rear-facing camera and a front-facing camera operatively coupled together (e.g., bonded, stacked on a common substrate). | 03-21-2013 |
20130082163 | IMAGE SENSOR WITH MICRO-LENS COATING - Techniques and architectures for providing a coating for one or more micro-lenses of a pixel array. In an embodiment, a pixel element includes a micro-lens and a coating portion extending over a surface of the micro-lens, where a profile of the coating portion is super-conformal to, or at least conformal to, a profile of the micro-lens. In another embodiment, the coating portion is formed at least in part by orienting the surface of the micro-lens to face generally downward with the direction of gravity, the orienting to allow a fluid coating material to flow for formation of the coating portion. | 04-04-2013 |
20130092982 | PARTIAL BURIED CHANNEL TRANSFER DEVICE FOR IMAGE SENSORS - Embodiments of an image sensor pixel that includes a photosensitive element, a floating diffusion region, and a transfer device. The photosensitive element is disposed in a substrate layer for accumulating an image charge in response to light. The floating diffusion region is dispose in the substrate layer to receive the image charge from the photosensitive element. The transfer device is disposed between the photosensitive element and the floating diffusion region to selectively transfer the image charge from the photosensitive element to the floating diffusion region. The transfer device includes a buried channel device including a buried channel gate disposed over a buried channel dopant region. The transfer device also includes a surface channel device including a surface channel gate disposed over a surface channel region. The surface channel device is in series with the buried channel device. The surface channel gate has the opposite polarity of the buried channel gate. | 04-18-2013 |
20130113065 | PAD DESIGN FOR CIRCUIT UNDER PAD IN SEMICONDUCTOR DEVICES - Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via. | 05-09-2013 |
20130113969 | METHOD, APPARATUS AND SYSTEM FOR PROVIDING IMPROVED FULL WELL CAPACITY IN AN IMAGE SENSOR PIXEL - Techniques and mechanisms for improving full well capacity for pixel structures in an image sensor. In an embodiment, a first pixel structure of the image sensor includes an implant region, where a skew of the implant region corresponds to an implant angle, and a second pixel structure of the image sensor includes a transfer gate. In another embodiment, an offset of the implant region of the first pixel structure from the transfer gate of the second pixel structure corresponds to the implant angle. | 05-09-2013 |
20130207212 | LATERAL LIGHT SHIELD IN BACKSIDE ILLUMINATED IMAGING SENSORS - A backside illuminated image sensor includes a semiconductor layer and a trench disposed in the semiconductor layer. The semiconductor layer has a frontside surface and a backside surface. The semiconductor layer includes a light sensing element of a pixel array disposed in a sensor array region of the semiconductor layer. The pixel array is positioned to receive external incoming light through the backside surface of the semiconductor layer. The semiconductor layer also includes a light emitting element disposed in a periphery circuit region of the semiconductor layer external to the sensor array region. The trench is disposed in the semiconductor layer between the light sensing element and the light emitting element. The trench is positioned to impede a light path between the light emitting element and the light sensing element when the light path is internal to the semiconductor layer. | 08-15-2013 |
20130217173 | METHODS OF FORMING VARYING DEPTH TRENCHES IN SEMICONDUCTOR DEVICES - A method of forming trenches in a semiconductor device includes forming an etchant barrier layer above a first portion of a semiconductor layer. A first trench is etched in a second portion of the semiconductor layer using a first etchant. The second portion of the semiconductor layer is not disposed underneath the etchant barrier layer. The etchant barrier layer is etched through using a second etchant that does not substantially etch the semiconductor layer. A second trench is etched in the first portion of the semiconductor layer using a third etchant. The third etchant also extends a depth of the first trench. | 08-22-2013 |
20130256509 | DUAL SOURCE FOLLOWER PIXEL CELL ARCHITECTURE - Techniques for providing a pixel cell which includes two source follower transistors. In an embodiment, a first source follower transistor of a pixel cell and a second source follower transistor of the pixel cell are coupled in parallel with one another, where the source follower transistors are each coupled via their respective gates to a floating diffusion node of the pixel cell. In another embodiment, the first source follower transistor and second source follower transistor each operate based on a voltage of the floating diffusion node to provide a respective component of an amplification signal, where the pixel cell outputs an analog signal based on the amplification signal. | 10-03-2013 |
20130258144 | SYSTEM, APPARATUS AND METHOD FOR DARK CURRENT CORRECTION - Embodiments of the invention describe a system, apparatus and method for obtaining black reference pixels for dark current correction processing are described herein. Embodiments of the invention capture image signal data via a plurality of pixel cells of a pixel unit of an image device, wherein capturing image signal data involves establishing a first state of exposing incident light on each pixel of the pixel unit and a second state of shielding incident light from one or more pixels of the pixel unit via a shutter unit disposed over the pixel unit. Image signal data from each pixel of the pixel unit captured during the first state and the second state is read, and scene image data is created by combining a subset of image signal data captured during the first state with a dark current component including a subset of image signal data captured during the second state. | 10-03-2013 |
20130264688 | METHOD AND APPARATUS PROVIDING INTEGRATED CIRCUIT SYSTEM WITH INTERCONNECTED STACKED DEVICE WAFERS - An integrated circuit system includes a first device wafer that has a first semiconductor layer proximate to a first metal layer including a first conductor disposed within a first metal layer oxide. A second device wafer that has a second semiconductor layer proximate to a second metal layer including a second conductor disposed within a second metal layer oxide is also included. A frontside of the first metal layer oxide is bonded to a frontside of the second metal layer oxide at an oxide bonding interface between the first metal layer oxide and the second metal layer oxide. A conductive path couples the first conductor to the second conductor with conductive material formed in a cavity etched between the first conductor and the second conductor and etched through the oxide bonding interface and through the second semiconductor layer from a backside of the second device wafer. | 10-10-2013 |
20140014813 | INTEGRATED CIRCUIT STACK WITH INTEGRATED ELECTROMAGNETIC INTERFERENCE SHIELDING - An integrated circuit system includes a first device wafer having a first semiconductor layer proximate to a first metal layer including a first conductor disposed within a first metal layer oxide. A second device wafer having a second semiconductor layer proximate to a second metal layer including a second conductor is disposed within a second metal layer oxide. A frontside of the first device wafer is bonded to a frontside of the second device wafer at a bonding interface. A conductive path couples the first conductor to the second conductor through the bonding interface. A first metal EMI shield is disposed in one of the first metal oxide layer and second metal layer oxide layer. The first EMI shield is included in a metal layer of said one of the first metal oxide layer and the second metal layer oxide layer nearest to the bonding interface. | 01-16-2014 |
20140048897 | PIXEL WITH NEGATIVELY-CHARGED SHALLOW TRENCH ISOLATION (STI) LINER - Embodiments of a pixel including a substrate having a front surface and a photosensitive region formed in or near the front surface of the substrate. An isolation trench is formed in the front surface of the substrate adjacent to the photosensitive region. The isolation trench includes a trench having a bottom and sidewalls, a passivation layer formed on the bottom and the sidewalls, and a filler to fill the portion of the trench not filled by the passivation layer. | 02-20-2014 |
20140103189 | Compact In-Pixel High Dynamic Range Imaging - Embodiments of the invention describe providing a compact solution to provide high dynamic range imaging (HDRI or simply HDR) for an imaging pixel by utilizing a control node for resetting a floating diffusion node to a reference voltage value and for selectively transferring an image charge from a photosensitive element to a readout node. Embodiments of the invention further describe control node to have to a plurality of different capacitance regions to selectively increase the overall capacitance of the floating diffusion node. This variable capacitance of the floating diffusion node increases the dynamic range of the imaging pixel, thereby providing HDR for the host imaging system, as well as increasing the signal-to-noise ratio (SNR) of the imaging system. | 04-17-2014 |
20140117485 | NEGATIVELY CHARGED LAYER TO REDUCE IMAGE MEMORY EFFECT - An image sensor pixel includes a photodiode region having a first polarity doping type disposed in a semiconductor layer. A pinning surface layer having a second polarity doping type is disposed over the photodiode region in the semiconductor layer. The second polarity is opposite from the first polarity. A first polarity charge layer is disposed proximate to the pinning surface layer over the photodiode region. An contact etch stop layer is disposed over the photodiode region proximate to the first polarity charge layer. The first polarity charge layer is disposed between the pinning surface layer and the contact etch stop layer such that first polarity charge layer cancels out charge having a second polarity that is induced in the contact etch stop layer. A passivation layer is also disposed over the photodiode region between the pinning surface layer and the contact etch stop layer. | 05-01-2014 |
20140124889 | DIE SEAL RING FOR INTEGRATED CIRCUIT SYSTEM WITH STACKED DEVICE WAFERS - An integrated circuit system includes a first device wafer bonded to a second device wafer at a bonding interface of dielectrics. Each wafer includes a plurality of dies, where each die includes a device, a metal stack, and a seal ring that is formed at an edge region of the die. Seal rings included in dies of the second device wafer each include a first conductive path provided with metal formed in a first opening that extends from a backside of the second device wafer, through the second device wafer, and through the bonding interface to the seal ring of a corresponding die in the first device wafer. | 05-08-2014 |
20140210028 | COLOR FILTER INCLUDING CLEAR PIXEL AND HARD MASK - Embodiments of an apparatus including a color filter arrangement formed on a substrate having a pixel array formed therein. The color filter arrangement includes a clear filter having a first clear hard mask layer and a second clear hard mask layer formed thereon, a first color filter having the first clear hard mask layer and the second hard mask layer formed thereon, a second color filter having the first clear hard mask layer formed thereon, and a third color filter having no clear hard mask layer formed thereon. Other embodiments are disclosed and claimed. | 07-31-2014 |
20140220713 | ARRAYED IMAGING SYSTEMS HAVING IMPROVED ALIGNMENT AND ASSOCIATED METHODS - Arrayed imaging systems include an array of detectors formed with a common base and a first array of layered optical elements, each one of the layered optical elements being optically connected with a detector in the array of detectors. | 08-07-2014 |
20140239351 | PROCESS TO ELIMINATE LAG IN PIXELS HAVING A PLASMA-DOPED PINNING LAYER - Embodiments of a process including depositing a sacrificial layer on the surface of a substrate over a photosensitive region, over the top surface of a transfer gate, and over at least the sidewall of the transfer gate closest to the photosensitive region, the sacrificial layer having a selected thickness. A layer of photoresist is deposited over the sacrificial layer, which is patterned and etched to expose the surface of the substrate over the photosensitive region and at least part of the transfer gate top surface, leaving a sacrificial spacer on the sidewall of the transfer gate closest to the photosensitive region. The substrate is plasma doped to form a pinning layer between the photosensitive region and the surface of the substrate. The spacing between the pinning layer and the sidewall of the transfer gate substantially corresponds to a thickness of the sacrificial spacer. Other embodiments are disclosed and claimed. | 08-28-2014 |
20150048427 | IMAGE SENSOR PIXEL CELL WITH SWITCHED DEEP TRENCH ISOLATION STRUCTURE - A pixel cell includes a photodiode disposed in an epitaxial layer in a first region of semiconductor material. A floating diffusion is disposed in a well region disposed in the epitaxial layer in the first region. A transfer transistor is disposed in the first region and coupled between the photodiode and the floating diffusion to selectively transfer image charge from the photodiode to the floating diffusion. A deep trench isolation (DTI) structure lined with a dielectric layer inside the DTI structure is disposed in the semiconductor material isolates the first region on one side of the DTI structure from a second region of the semiconductor material on an other side of the DTI structure. Doped semiconductor material inside the DTI structure is selectively coupled to a readout pulse voltage in response to the transfer transistor selectively transferring the image charge from the photodiode to the floating diffusion. | 02-19-2015 |