Ho, Tainan City

Chang-Hsien Ho, Tainan City TW

Patent application number	Description	Published
20160095375	INTEGRALLY FORMED SAFETY HELMET STRUCTURE - An integrally formed safety helmet structure includes an assembly of a helmet shell or a shell body, a foam filling body enclosed in the shell body and a structure body. Geometrical array texture structures are disposed at the assembling interfaces between the shell body, the structure body and the foam filling body. In manufacturing, by means of a mold or molding module and solid foaming technique, the foam filling body is integrally formed to bond with the shell body and the structure body and the geometrical array texture structures so as to form a compact and rigid multilayer complex reinforcement structure. The complex reinforcement structure not only can enhance the structural strength of the entire safety helmet, but also has the advantages of material-saving, lightweight, high security and easy manufacturing.	04-07-2016

Chia-Chi Ho, Tainan City TW

Patent application number	Description	Published
20130323470	CONDUCTIVE STRUCTURE FOR PANEL AND MANUFACTURING METHOD THEREOF - A conductive structure for a panel is formed on a plate and includes a first metal layer, a nitride layer, and a second metal layer. The first metal layer is located on the plate and has a first side surface and a lower surface connected to the first side surface, while the lower surface makes contact with the plate. The first metal layer contains molybdenum. The nitride layer is located on the first metal layer and has a second side surface. The nitride layer contains molybdenum. The second metal layer is located on the nitride layer and has a third side surface. The second side surface is adjacent to the first side surface and the third side surface, to form an inclined surface. An included angle between the inclined surface and the lower surface is between 20 degrees and 75 degrees.	12-05-2013

Chien-Peng Ho, Tainan City TW

Patent application number	Description	Published
20150110466	VIDEO INDEXING METHOD, VIDEO INDEXING APPARATUS AND COMPUTER READABLE MEDIUM - A video indexing method, a video indexing apparatus, and a computer readable medium are disclosed. The video indexing apparatus comprises a generation module, a calculation module and a construction module. The generation module generates a frame movement analysis graphics according to a plurality of analysis points corresponding to a plurality of video frames of a video record. The calculation module calculates a plurality of frame movement velocities corresponding to the video frames according to the frame movement analysis graphics. The construction module constructs an indexing graphics of the video record according to the frame movement velocities.	04-23-2015

Chi-Hon Ho, Tainan City TW

Patent application number	Description	Published
20120127625	TRENCH CAPACITOR STRUCTURES AND METHOD OF MANUFACTURING THE SAME - A trench capacitor structure is provided. The trench capacitor structure includes a substrate, a trench formed in the substrate, a plurality of scallops formed in the sidewalls of the trench, and at least one capacitor formed within at least one of the scallops. The disclosure also provides a method of manufacturing the trench capacitor structure.	05-24-2012
20130270713	DUAL DAMASCENE STRUCTURE HAVING THROUGH SILICON VIA AND MANUFACTURING METHOD THEREOF - A dual damascene structure having a through silicon via and a manufacturing method thereof are provided. The method includes forming a first, a second, and a third dielectric layers a on a substrate having a conductive structure. A trench is formed in the third dielectric layer. A hard mask layer is formed on the third dielectric layer and a surface of the trench. A first opening having a tapered sidewall is formed in the hard mask layer. A second opening is formed in the second and the third dielectric layers. The substrate exposed by the second opening and the first opening is etched to form a through hole so as to form a dual damascene opening. A liner layer is formed on a surface of the dual damascene opening and the conductive structure is exposed. The dual damascene opening is filled with a conductive material.	10-17-2013

Chi-Hsin Ho, Tainan City TW

Patent application number	Description	Published
20110162163	Apparatus Erasing Blackboard through Areas - The present invention wipes a writing board through areas. A teacher can wipe an area of a blackboard while writing on another area. Thus, a writing board can be flexibly used with convenience obtained and time saved.	07-07-2011

Chin-Chen Ho, Tainan City TW

Patent application number	Description	Published
20150181362	Application software and method for automatically adjusting environmental frequency response - Disclosed is an application software for automatically adjusting environmental frequency response, and the application software is installed in a communication device and provided for outputting a sine wave audio frequency to a stereo, and the stereo receives and plays the sine wave audio frequency, and a built-in microphone of the communication device receives the audio frequency outputted from the stereo. After obtaining an appropriate reference gain of 1 KHz, the application software outputs a sine wave audio frequency of 20 Hz˜20 KHz to the stereo and compares the gain value of the audio frequency outputted from the stereo with the reference gain value, and the micro-controller of the stereo adjusts the gain of the current audio frequency to comply with the reference gain value, so that the stereo can have an output approaching/reaching an ideal frequency response curve.	06-25-2015

Ching-Yuan Ho, Tainan City TW

Patent application number	Description	Published
20100093142	METHOD OF FABRICATING DEVICE - A method of fabricating a device is described. A substrate having at least two isolation structures is provided. A first oxide layer and a first conductive layer are sequentially formed on the substrate between the isolation structures. A first nitridation process is performed to form a first nitride layer on the surface of the first conductive layer and a first oxynitride layer on the surface of the isolation structures. A second oxide layer is formed on the first nitride layer and first oxynitride layer. A densification process is performed to oxidize the first oxynitride layer on the surface of the isolation structures. A second nitride layer and a third oxide layer are sequentially formed on the second oxide layer. A second nitridation process is performed to form a third nitride layer on the surface of the third oxide layer. A second conductive layer is formed on the third nitride layer.	04-15-2010

Chun-Te Ho, Tainan City TW

Patent application number	Description	Published
20130307835	PANEL CONTROL APPARATUS AND OPERATING METHOD THEREOF - A panel control apparatus and an operating method thereof are provided, and which includes a scalar and a timing controller. The scalar transmits a present display data for composing a display frame, and determines whether to generate a refresh request signal according to a state of the display frame. The timing controller includes a memory, an over driving unit and a panel self refresh unit. When the refresh request signal is not generated, the over driving unit converts the present display data into an over driving display data according to a previous compression data from the memory. When the refresh request signal is generated, the panel self refresh unit compresses the present display data into a refresh display data, and stores the refresh display data into the memory.	11-21-2013

Jhu-Syuan Ho, Tainan City TW

Patent application number	Description	Published
20150045683	ELECTROCARDIOGRAPHY SIGNAL EXTRACTION METHOD - An electrocardiography signal extraction method includes receiving an electrocardiography signal, detecting a peak of a wave of the electrocardiography signal, separating the wave into left and right waves, normalizing the left wave and a plurality of scales of Gaussian, comparing the normalized left wave with a left part of the normalized scales of Gaussian, acquiring a left part error function, indicating a left minimum comparative error, selecting a left scale of Gaussian with the left minimum comparative error, obtaining a left duration of the wave, normalizing the right wave, comparing the normalized right wave with a right part of the normalized scales of Gaussian, acquiring a right part error function, indicating a right minimum comparative error, selecting a right scale of Gaussian with the right minimum comparative error, obtaining a right duration of the wave, and obtaining an extracted wave.	02-12-2015

Ke-Wei Ho, Tainan City TW

Patent application number	Description	Published
20140261207	Container Water-Stopping Structure - A water-stopping structure for a container is disclosed. A float is provided in an internal space of a guiding element. A rod extending from one end of the float is movably received in a tube which penetrates an upper surface of the guiding element. A limiting element in which a water-stopping ball is movably received is mounted around the tube such that the water-stopping ball can be supported by the rod. A lower section of the guiding element is peripherally provided with grooves for guiding water out. A lower cover is mounted around an annular section concavely provided at a lower end of the guiding element. The water-stopping unit thus formed is connected to the bottom of a bucket and placed on a bottom plate so as to stop water from flowing from the bucket to the bottom plate when a predetermined water level is achieved in the bottom plate.	09-18-2014

Kuan-Jui Ho, Tainan City TW

Patent application number	Description	Published
20100033517	BI-STABLE DISPLAY AND DRIVING METHOD THEREOF - A bi-stable display having a plurality of bi-stable light emitting diodes (LEDs) and a driver are provided. The bi-stable LEDs have bi-stable memory characteristics and emit light according to a plurality of specified voltages, wherein the driver is used to apply the specified voltages to the bi-stable LEDs. The driver further has a brightness controller. The brightness controller is used to control the brightness of the bi-stable display by controlling a plurality of durations in which the specified voltages are applied to the bi-stable LEDs for a plurality of frames.	02-11-2010

Mengfen Ho, Tainan City TW

Patent application number	Description	Published
20130065955	CRYSTALLINE FORMS OF CABAZITAXEL - The present invention provides crystalline forms, including an anhydrate form, of cabazitaxel and processes for the preparation of these forms, designated as Forms C1, C2, C3, C4, C5, C6, C7, C8, C8	03-14-2013
20140045926	CRYSTALLINE FORMS OF CABAZITAXEL - The present invention provides crystalline forms, including an anhydrate form, of cabazitaxel and processes for the preparation of these forms, designated as Forms C1, C2, C3, C4, C5, C6, C7, C8, C8b, C9 and C9p.	02-13-2014

Meng-Fen Ho, Tainan City TW

Patent application number	Description	Published
20130237487	CRYSTALLINE AND NON-CRYSTALLINE FORMS OF SGLT2 INHIBITORS - The present invention provides amorphous forms and the crystalline complexes of SGLT2 inhibitors as a novel material, in particular in pharmaceutically acceptable form. The crystalline forms of SGLT2 inhibitor canagliflozin are designated as Forms CS1, CS2, CS3, CS4 and CS5.	09-12-2013

Nien-Ting Ho, Tainan City TW

Patent application number	Description	Published
20090090395	METHOD OF REMOVING PARTICLES FROM WAFER - A method of removing particles from a wafer is provided. The method is adopted after a process for removing unreactive metal of a salicide process or after a salicide process and having oxide residue remaining on a wafer or after a chemical vapor deposition (CVD) process that resulted with particles on a wafer. The method includes performing at least two cycles (stages) of intermediate rinse process. Each cycle of the intermediate rinse process includes conducting a procedure of rotating the wafer at a high speed first, and then conducting a procedure of rotating the wafer at a low speed.	04-09-2009
20090155999	METHOD FOR FABRICATING METAL SILICIDE - A method for fabricating a metal silicide film is described. After providing a silicon material layer, a metal alloy layer is formed to cover the silicon material layer. A thermal process is performed to form a metal alloy silicide layer in a self-aligned way. A wet etching process is performed by using a cleaning solution including sulfuric acid and hydrogen peroxide to remove the residual metals and unreacted metal alloy.	06-18-2009
20090191714	Method of removing oxides - The present invention provides a method of removing oxides. First, a substrate having the oxides is loaded into a reaction chamber, which includes a susceptor setting in the bottom portion of the chamber, a shower head setting above the susceptor, and a heater setting above the susceptor. Subsequently, an etching process is performed. A first thermal treatment process is then carried out. Finally, a second thermal treatment process is carried out, and a reaction temperature of the second thermal treatment process is higher than a reaction temperature of the first thermal treatment process.	07-30-2009
20100035401	METHOD FOR FABRICATING MOS TRANSISTORS - A method for fabricating metal-oxide transistors is disclosed. First, a semiconductor substrate having a gate structure is provided, in which the gate structure includes a gate dielectric layer and a gate. A source/drain region is formed in the semiconductor substrate, and a cleaning step is performed to fully remove native oxides from the surface of the semiconductor substrate. An oxidation process is conducted to form an oxide layer on the semiconductor substrate and the oxide layer is then treated with fluorine-containing plasma to form a fluorine-containing layer on the surface of the semiconductor substrate. A metal layer is deposited on the semiconductor substrate thereafter and a thermal treatment is performed to transform the metal layer into a silicide layer.	02-11-2010
20110127589	SEMICONDUCTOR STRUCTURE HAIVNG A METAL GATE AND METHOD OF FORMING THE SAME - A method of forming a semiconductor structure having a metal gate. Firstly, a semiconductor substrate is provided. Subsequently, at least a gate structure is formed on the semiconductor substrate. Afterwards, a spacer structure is formed to surround the gate structure. Then, an interlayer dielectric is formed. Afterwards, a planarization process is performed for the interlayer dielectric. Then, a portion of the sacrificial layer is removed to form an initial etching depth, such that an opening is formed to expose a portion of the spacer structure. The portion of the spacer structure exposed to the opening is removed so as to broaden the opening. Afterwards, remove the sacrificial layer completely via the opening. Finally, a gate conductive layer is formed to fill the opening.	06-02-2011
20110140207	METAL GATE STRUCTURE AND METHOD OF FORMING THE SAME - The metal gate structure of the present invention can include a TiN complex, and the N/Ti proportion of the TiN complex is decreased from bottom to top. In one embodiment, the TiN complex can include a single TiN layer, which has an N/Ti proportion gradually decreasing from bottom to top. In another embodiment, the TiN complex can include a plurality of TiN layers stacking together. In such a case, the lowest TiN layer has a higher N/Ti proportion than the adjusted TiN layer.	06-16-2011
20110266596	Semiconductor device and method of making the same - In a method of the present invention during a salicide process, before a second thermal process, a dopant is implanted at a place located in a region ranging from a Ni	11-03-2011
20120088345	METHOD OF FORMING SILICIDE FOR CONTACT PLUGS - A method for forming silicide is provided. First, a substrate is provided. Second, a gate structure is formed on the substrate which includes a silicon layer, a gate dielectric layer and at least one spacer. Then, a pair of source and drain is formed in the substrate and adjacent to the gate structure. Later, an interlayer dielectric layer is formed to cover the gate structure, the source and the drain. Afterwards, the interlayer dielectric layer is selectively removed to expose the gate structure. Next, multiple contact holes are formed in the interlayer dielectric layer to expose part of the substrate. Afterwards, the exposed substrate is converted to form silicide.	04-12-2012
20120122288	METHOD OF FABRICATING A SILICIDE LAYER - During a salicide process, and before a second thermal treatment is performed to a silicide layer of a semiconductor substrate, a thermal conductive layer is formed to cover the silicide layer. The heat provided by the second thermal treatment can be conducted to the silicide layer uniformly through the thermal conductive layer. The thermal conductive layer can be a CESL layer, TiN, or amorphous carbon. Based on different process requirements, the thermal conductive layer can be removed optionally after the second thermal treatment is finished.	05-17-2012
20120181635	Semiconductor device - In a method of the present invention during a salicide process, before a second thermal process, a dopant is implanted at a place located in a region ranging from a Ni	07-19-2012
20130071981	FABRICATING METHOD OF SEMICONDUCTOR ELEMENTS - A fabricating method of a semiconductor element includes the following steps. First, a substrate is provided. A metal gate structure and source/drain electrodes are already formed on the substrate. An amorphization process is performed in the source/drain electrodes to form an amorphous portion. An interlayer dielectric layer is formed on surfaces of the source/drain electrodes and a through hole contact is formed within the interlayer dielectric layer. A silicidation process is performed with the through hole contact and the amorphous portion of the source/drain electrodes to form a metal silicide layer. The fabricating method is capable of finishing the formation of the metal silicide layer in the condition that diameters of the through hole contact is becoming smaller and smaller.	03-21-2013
20130078800	METHOD FOR FABRICATING MOS TRANSISTOR - A method for fabricating metal-oxide semiconductor (MOS) transistor is disclosed. The method includes the steps of: providing a semiconductor substrate having a silicide thereon; performing a first rapid thermal process to drive-in platinum from a surface of the silicide into the silicide; and removing un-reacted platinum in the first rapid thermal process.	03-28-2013
20130273736	METHOD FOR FABRICATING MOS TRANSISTOR - A method for fabricating metal-oxide semiconductor (MOS) transistor is disclosed. The method includes the steps of: providing a semiconductor substrate having a silicide thereon; performing a first rapid thermal process to drive-in platinum from a surface of the silicide into the silicide; and removing un-reacted platinum in the first rapid thermal process.	10-17-2013
20130288456	SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF - A manufacturing method of a semiconductor device comprises the following steps. First, a substrate is provided, at least one fin structure is formed on the substrate, and a metal layer is then deposited on the fin structure to form a salicide layer. After depositing the metal layer, the metal layer is removed but no RTP is performed before the metal layer is removed. Then a RTP is performed after the metal layer is removed.	10-31-2013
20140017888	SALICIDE PROCESS - A salicide process is described. A substrate having thereon an insulating layer and a silicon-based region is provided. A nickel-containing metal layer is formed on the substrate. A first anneal process is performed to form a nickel-rich silicide layer on the silicon-based region. The remaining nickel-containing metal layer is stripped. A thermal recovery process is performed at a temperature of 150-250° C. for a period longer than 5 minutes. A second anneal process is performed to change the phase of the nickel-rich silicide layer and form a low-resistivity mononickel silicide layer.	01-16-2014
20140239419	SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a semiconductor device is provided. A silicon substrate is provided, and a gate insulating layer is formed on the silicon substrate. Then, a silicon barrier layer is formed on the gate insulating layer by the physical vapor deposition (PVD) process. Next, a silicon-containing layer is formed on the silicon barrier layer. The silicon barrier layer of the embodiment is a hydrogen-substantial-zero silicon layer, which has a hydrogen concentration of zero substantially.	08-28-2014
20140248762	METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A manufacturing method of a semiconductor device comprises the following steps. First, a substrate is provided, at least one fin structure is formed on the substrate, and a metal layer is then deposited on the fin structure to form a salicide layer. After depositing the metal layer, the metal layer is removed but no RTP is performed before the metal layer is removed. Then a RTP is performed after the metal layer is removed.	09-04-2014
20140306273	STRUCTURE OF METAL GATE STRUCTURE AND MANUFACTURING METHOD OF THE SAME - A manufacturing method of a metal gate structure is provided. First, a substrate covered by an interlayer dielectric is provided. A gate trench is formed in the interlayer dielectric, wherein a gate dielectric layer is formed in the gate trench. A silicon-containing work function layer is formed on the gate dielectric layer in the gate trench. Finally, the gate trench is filled up with a conductive metal layer.	10-16-2014
20150061042	METAL GATE STRUCTURE AND METHOD OF FABRICATING THE SAME - A metal gate structure is provided. The metal gate structure includes a semiconductor substrate, a gate dielectric layer, a multi-layered P-type work function layer and a conductive metal layer. The gate dielectric layer is disposed on the semiconductor substrate. The multi-layered P-type work function layer is disposed on the gate dielectric layer, and the multi-layered P-type work function layer includes at least a crystalline P-type work function layer and at least an amorphous P-type work function layer. Furthermore, the conductive metal layer is disposed on the multi-layered P-type work function layer.	03-05-2015
20150249142	SEMICONDUCTOR STRUCTURE HAVING A METAL GATE WITH SIDE WALL SPACERS - A method of forming a semiconductor structure having a metal gate. Firstly, a semiconductor substrate is provided. Subsequently, at least a gate structure is formed on the semiconductor substrate. Afterwards, a spacer structure is formed to surround the gate structure. Then, an interlayer dielectric is formed. Afterwards, a planarization process is performed for the interlayer dielectric. Then, a portion of the sacrificial layer is removed to form an initial etching depth, such that an opening is formed to expose a portion of the spacer structure. The portion of the spacer structure exposed to the opening is removed so as to broaden the opening. Afterwards, remove the sacrificial layer completely via the opening. Finally, a gate conductive layer is formed to fill the opening.	09-03-2015
20150380312	METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device is provided. The method includes the following steps. A substrate including a first transistor having a first conductivity type, a second transistor having a second conductivity type and a third transistor having the first conductivity type is formed. An inner-layer dielectric layer is formed on the substrate, and includes a first gate trench corresponding to the first transistor, a second gate trench corresponding to the second transistor and a third gate trench corresponding to the third transistor. A work function metal layer is formed on the inner-layer dielectric layer. An anti-reflective layer is coated on the work function metal layer. The anti-reflective layer on the second transistor and on the top portion of the third gate trench is removed to expose the work function metal layer. The exposed work function metal layer is removed.	12-31-2015
20160104786	SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having an interlayer dielectric (ILD) layer thereon; forming a first recess, a second recess, and a third recess in the ILD layer; forming a material layer on the ILD layer and in the first recess, the second recess, and the third recess; performing a first treatment on the material layer in the first recess; and performing a second treatment on the material layer in the first recess and second recess.	04-14-2016

Sheng-Yen Ho, Tainan City TW

Patent application number	Description	Published
20120014234	DATA RECORDING METHOD AND APPARATUS FOR RE-VERIFYING CORRECTNESS OF RECORDED DATA ON OPTICAL STORAGE MEDIUM - An exemplary data recording method of an optical storage medium includes following steps: during a current recording operation for recording first data onto the optical storage medium, detecting if a fatal recording error occurs; and when the fatal recording error is detected, activating a current verifying operation to verify correctness of a recorded data section on the optical storage medium. The recorded data section is recorded onto the optical storage medium according to second data during a previous recording operation, and data recording of the second data has been verified during a previous verifying operation prior to the current recording operation.	01-19-2012

Sin-Hua Ho, Tainan City TW

Patent application number	Description	Published
20120196393	PACKAGING METHOD OF WAFER LEVEL CHIPS - A packaging method of wafer level chips including following steps is provided. First, a plurality of chips attached on a first film is provided, and the chips on the first film are disposed respectively corresponding to a plurality of electrode patterns of a substrate. Then, a phosphor layer is respectively formed on at least one surface of each of the chips. Next, a second film is disposed on the phosphor layers, and the second film is opposite to the first film. Further, the first film is removed from the base surface of each of the chips. Then, the base surfaces of the chips are attached to the substrate. Afterward, each of the chips is electrically connected with the corresponding electrode pattern through a wire bonding. Finally, a packaging gel is provided to cover each of the chips, and the packaging gel is solidified.	08-02-2012
20120256217	LIGHT-EMITTING DIODE PACKAGE - A light-emitting diode (LED) package including a substrate, an LED chip, a polarizer, and a supporter is provided. The LED chip is disposed on the substrate. The polarizer is disposed above the LED chip. The supporter is disposed on the substrate for supporting the polarizer.	10-11-2012
20120319292	STRUCTURE OF A WAFER LEVEL SUBSTRATE FOR CARRYING LIGHT EMITTING DEVICES - Structure and fabricating method of a wafer level substrate for carrying light emitting devices are provided in present invention. The wafer level silicon substrate structure includes a first substrate and a second substrate. A metal line is constructed on a surface of the first substrate according to a predetermined pattern. The predetermined pattern is divided into a plurality of first portions and a plurality of second portions. The second substrate is adhered to the surface of the first substrate. The second substrate has a plurality of through holes. Each of the through holes is respectively corresponding to the first portions. Each of the first portions is adapted to electrically connect with a light emitting device. The provided wafer level substrate structure configured with light emitting devices is capable of providing uniform light output, having better light extraction property, improving process yield, higher production yield and achieving product uniformity.	12-20-2012

Sui-Wen Ho, Tainan City TW

Patent application number	Description	Published
20100193727	FUNCTIONALIZED NANO-CARBON MATERIALS AND METHOD FOR FUNCTIONALIZING NANO-CARBON MATERIALS THEREOF - A method of functionalizing nano-carbon materials with a diameter less than 1 μm, comprising: contacting the nano-carbon materials with a free radical generating compound such as azo-compound in an organic solvent under an inert gas atmosphere, thereby obtaining nano-carbon materials with functional groups thereon. The physical and chemical properties of the nano-carbon materials can be modified through the aforementioned method.	08-05-2010

Tzong-Che Ho, Tainan City TW

Patent application number	Description	Published
20130140655	MEMS ACOUSTIC TRANSDUCER AND METHOD FOR FABRICATING THE SAME - A MEMS acoustic transducer is provided, which includes a substrate, a MEMS chip, and a housing. The substrate has a first opening area and a lower electrode layer disposed over a surface of the substrate, wherein the first opening area includes at least one hole allowing acoustic pressure to enter the MEMS acoustic transducer. The MEMS chip is disposed over the surface of the substrate, including a second opening area and an upper electrode layer partially sealing the second opening area, wherein the upper electrode layer and the lower electrode layer, which are parallel to each other and have a gap therebetween, form an induction capacitor. The housing is disposed over the MEMS chip or the surface of the substrate creating a cavity with the MEMS chip or the substrate. In addition, a method for fabricating the above MEMS acoustic transducer is also provided.	06-06-2013

Wang-Jyun Ho, Tainan City TW

Patent application number	Description	Published
20140261207	Container Water-Stopping Structure - A water-stopping structure for a container is disclosed. A float is provided in an internal space of a guiding element. A rod extending from one end of the float is movably received in a tube which penetrates an upper surface of the guiding element. A limiting element in which a water-stopping ball is movably received is mounted around the tube such that the water-stopping ball can be supported by the rod. A lower section of the guiding element is peripherally provided with grooves for guiding water out. A lower cover is mounted around an annular section concavely provided at a lower end of the guiding element. The water-stopping unit thus formed is connected to the bottom of a bucket and placed on a bottom plate so as to stop water from flowing from the bucket to the bottom plate when a predetermined water level is achieved in the bottom plate.	09-18-2014
20150208610	Water Container Structure - The present invention provides a water container structure, which is a container combination for an animal to drink water and comprises a containing unit, for water to be added, at an upper end and a receiving unit for the animal to drink the water with its mouth at a lower end. A plurality of grooves, spaced up and down, are concaved at two corresponding sides at a predetermined height of the containing unit at the upper end for two projecting portions extending inward at an upside of the receiving unit at the lower end to insert in. A water dispensing amount of the container combination is controlled by installing and screwing the water dispensing device of the containing unit and the upper end on the receiving unit at the lower end by hand to allow to predetermined control of the water dispensing amount.	07-30-2015

Wen-Yueh Ho, Tainan City TW

Patent application number	Description	Published
20120273044	ELECTROLYTE COMPOSITION AND DYE-SENSITIZED SOLAR CELL USING THE SAME - The disclosure provides an electrolyte composition and dye-sensitized solar cell using the same. The electrolyte composition includes a diionic liquid of Formula: Z	11-01-2012

Yen-Teng Ho, Tainan City TW

Patent application number	Description	Published
20110062437	Method for growing non-polar m-plane epitaxial layer of wurtzite semiconductors on single crystal oxide substrates - The present invention relates to a method for growing a non-polar m-plane epitaxial layer on a single crystal oxide substrate, which comprises the following steps: providing a single crystal oxide with a perovskite structure; using a plane of the single crystal oxide as a substrate; and forming an m-plane epitaxial layer of wurtzite semiconductors on the plane of the single crystal oxide by a vapor deposition process. The present invention also provides an epitaxial layer having an m-plane obtained according to the aforementioned method.	03-17-2011
20130240876	Non-polar plane of wurtzite structure material - The present invention relates to a method for growing a novel non-polar (13	09-19-2013

Yi-Long Ho, Tainan City TW

Patent application number	Description	Published
20150272791	ABSORBENT ARTICLE - An absorbent article includes an absorbent core, liquid impervious backsheet, a liquid pervious topsheet, a functional layer, an adhesive layer and a releasable film. The functional layer includes a plurality of functional particles that are made from a material selected from sodium carbonate, argireline, mineral rock crystal, porphyritic andesite, borneol, mint essential oil, eucalyptus essential oil, jasmine essential oil, far-infrared radiation Particles and combinations thereof.	10-01-2015

Ying-Kuan Ho, Tainan City TW

Patent application number	Description	Published
20090288613	Pet Cage Assembly - A pet cage assembly comprises two lateral panels, a front panel, a rear panel, a bottom panel and a top panel. Each of the lateral panels comprises an upper and a lower sub-panel, each formed with fasteners extending inwards from two ends thereof for engaging with cavities formed on corresponding edges of the front and rear panels. Each of the lower sub-panels is formed with an extended, engaging portion adjacent to a section thereof to which the front panel is assembled, so that the front panel can be retained bilaterally by the engaging portions. The lateral, front and rear panels are fastened to a bottom side of the top panel, which is formed with an opening for receiving an upper door resiliently engaged therein. The rear panel comprises a frame pivotally attached by a rear door, which is resiliently engaged at an edge thereof with the frame.	11-26-2009
20100024735	Structure of Feeder for Supplying Water and Pet Food - An improved structure of a feeder for supplying water and pet food is disclosed. Therein, a base has a shifting space adjacent to a side of a bowl settled in the base so as to receive a dispensing controller. A container unit equipped with a hopper and a water supplier is provided on top of the dispending controller. The dispensing controller can be shifted in the shifting space so that an opening limit is formed when projections formed on two rear ends of the dispensing controller abut against blocks provided bilaterally in the shifting space, and a closing limit is formed when a groove of the dispensing controller abuts against a stop plate formed at a rear section of the shifting space. Thus, the container unit can be easily opened to dispense pet food or closed to not dispense pet food.	02-04-2010