Patent application number | Description | Published |
20090021312 | PLL circuit - It has been difficult that conventional PLL circuits have a suppression characteristic of suppressing the phase noise which is free of variation due to temperature and individual difference and stable in a wide frequency band. The present invention provides a PLL circuit which can absorb variation of phase noise characteristic due to temperature and individual difference and has a phase noise suppression characteristic stable in a wide frequency band. The PLL circuit comprises, at the succeeding stage, a first register for storing a first parameter for controlling the loop gain, a first multiplier for multiplying the output of the phase comparator by a first parameter, a second register for storing a second parameter for controlling the response characteristic, a second multiplier for multiplying the output of the first multiplier by a second parameter, and a CPU for setting optimum parameters in the first and second registers depending on the use frequency band, the ambient temperature, and the device individual difference. By controlling the loop gain and the response characteristic to optimum values, a good suppression characteristic in a wide frequency band is achieved. | 01-22-2009 |
20090039973 | VCO driving circuit and frequency synthesizer - A VCO driving circuit and a frequency synthesizer wherein the impedance viewed from a VCO control terminal is reduced to prevent the VCO phase noise characteristic from degrading. A VCO driving circuit and a frequency synthesizer having the VCO driving circuit, which comprises a coarse adjustment DAC that receives a digital data, which has a coarse adjustment frequency, to output an analog signal; a fine adjustment DAC that receives a digital data, which has a fine adjustment frequency, to output an analog signal; a low response speed LPF | 02-12-2009 |
20100060365 | Oscillation frequency control circuit - To provide a highly stable oscillation frequency control circuit wherein the frequency thereof is corrected, an adequate range of the input levels of external reference signals is determined in accordance with temperature characteristics in detecting the external reference signal, and the control voltage to a VCO is controlled within and outside the adequate range. An oscillation frequency control circuit includes a selection switch that connects the phase comparator to the loop filter in an external reference synchronization mode and that connects the fixed voltage supplying circuit to the loop filter in a fixed voltage mode, and a CPU that switches the selection switch to the external reference synchronization mode or to the fixed voltage mode based on whether the detected voltage of an external reference signal level is within or outside of the adequate range. | 03-11-2010 |
20100264962 | VCO DRIVING CIRCUIT AND FREQUENCY SYNTHESIZER - A VCO driving circuit and a frequency synthesizer wherein the impedance viewed from a VCO control terminal is reduced to prevent the VCO phase noise characteristic from degrading. A VCO driving circuit and a frequency synthesizer having the VCO driving circuit, which comprises a coarse adjustment DAC that receives a digital data, which has a coarse adjustment frequency, to output an analog signal; a fine adjustment DAC that receives a digital data, which has a fine adjustment frequency, to output an analog signal; a low response speed LPF | 10-21-2010 |
20100315137 | PLL circuit - A PLL circuit which can obtain a VCO output having satisfactory spurious output characteristics with respect to all channels and which can suppress the fluctuation of the characteristics due to a temperature change is disclosed. A control circuit | 12-16-2010 |
20110204935 | PLL circuit - Provided is a PLL circuit improving reliability while suppressing power consumption without degrading noise characteristics. The PLL circuit includes a PLL IC that divides an output frequency Fout from a VCO, compares phase with a reference signal, and feeds back a phase difference as a control voltage to the VCO. A control circuit is capable of finely setting both of a reference frequency Fref and an output frequency Fdds in a DDS circuit, and the DDS circuit generates folding signals of Fdds for Fref and an integral multiple frequency thereof based on the combination of the frequencies. A first AMP amplifies a signal, a variable filter selects a desired Fdds (desired) and a second AMP amplifies the signal and supplies the same to the PLL IC as a reference signal. The control circuit further supplies a division ratio N to the PLL IC. | 08-25-2011 |
Patent application number | Description | Published |
20090027041 | BUFFER CIRCUIT, AMPLIFIER CIRCUIT, AND TEST APPARATUS - There is provided a buffer circuit that outputs a signal according to an input signal. The buffer circuit includes a first receiving transistor that receives the input signal through its base terminal, a first clamp transistor having polarity same as that of the first receiving transistor, of which an emitter terminal and a collector terminal are connected to corresponding terminals of the first receiving transistor and which receives a first clamp voltage restricting a signal level output from the buffer circuit through its base terminal, and a first current defining section that is commonly provided for the first receiving transistor and the first clamp transistor and defines a total amount of emitter currents flowing into the first receiving transistor and the first clamp transistor. The buffer circuit outputs an output signal according to an emitter voltage of the first receiving transistor. | 01-29-2009 |
20090033528 | TEST APPARATUS, MANUFACTURING METHOD, AND TEST METHOD - There is provided a test apparatus for testing a device under test, the test apparatus including: a test signal supplying section that supplies a digital input signal for testing purposes, to the device under test; a reference signal output section that outputs an analogue reference signal in accordance with the digital input signal; a difference obtaining section that outputs an analogue difference signal representing a difference between the analogue reference signal and an analogue output signal outputted by the device under test in accordance with the digital input signal; and a determining section that determines whether the analogue output signal shows a defect or not based on the analogue difference signal. | 02-05-2009 |
20090079480 | OSCILLATING APPARATUS - An oscillating apparatus is provided that includes: an integration circuit that outputs a control signal based on an integration value of two inputted voltage values; an oscillator that outputs an oscillation signal of a frequency that is based on the control signal; a phase comparator that outputs a phase difference signal of a pulse width that is in accordance with a phase difference between the oscillation signal and the reference signal, by comparing the oscillation signal with a reference signal of a predetermined frequency; a controlling circuits that controls the two inputted voltage values based on the phase difference signal, so as to approximate a phase difference between the oscillation signal and the reference signal to a predetermined reference phase difference; and a voltage stabilizing current that defines the two inputted voltages based on a predetermined reference voltage. | 03-26-2009 |
20090230978 | SWITCH CIRCUIT, FILTER CIRCUIT AND TEST APPARATUS - There is provided a switch circuit for switching whether to output an input signal, including: a transmission path that transmits the input signal from an input end to an output end of the switch circuit; a first semiconductor switch that is provided on the transmission path and switches whether to transmit the input signal; a second semiconductor switch that is opened when the first semiconductor switch is short-circuited, and that is short-circuited when the first semiconductor switch is opened, thereby grounding, to a ground potential, a high-frequency signal leaked to the transmission path between the first semiconductor switch and the output end; and a voltage controller that causes a potential difference on both ends of the second semiconductor switch when the second semiconductor switch is opened. | 09-17-2009 |
20110271870 | INK FOR BALLPOINT PENS AND BALLPOINT PEN USING SAME - A ballpoint pen ink ensuring a very soft and smooth writing feel even when a strong writing pressure is applied, is obtained. | 11-10-2011 |
20140015049 | SEMICONDUCTOR DEVICE - An LDMOSFET includes a semiconductor substrate having a first semiconductor region formed of a feeding region of a first conduction type at a position where a field oxide film is not present on a surface layer of a semiconductor region in which the field oxide film is selectively formed, and a second semiconductor region formed of a well region of a second conduction type which is an opposite conduction type, and feeding regions of the first and second conduction types formed on an upper layer of the well region, and a gate electrode that faces the well region through a gate oxide film. The feeding region is formed at a distance from the field oxide film in an end portion in a longitudinal direction, and desirably the feeding region is intermittently formed at given intervals in the longitudinal direction, and the feeding region is applied to the first semiconductor region. | 01-16-2014 |
20140284714 | SEMICONDUCTOR DEVICE - Disclosed is a semiconductor device that includes a first MOS transistor having a predetermined size and a second MOS transistor having a lager size than the first MOS transistor. The first MOS transistor is divided into two or more sections, each paired with a corresponding section of the second MOS transistor to form a unit cell. As the unit cell is cyclically formed on a substrate, the current mirror ratio between the total size of the first MOS transistor and the total size of the second MOS transistor remains unaffected by the nonuniformity of position-dependent temperature distribution. | 09-25-2014 |
20150041883 | SEMICONDUCTOR DEVICE - An object of the present invention is to improve the ESD resistance of an electrostatic protection element. | 02-12-2015 |