Patent application number | Description | Published |
20080261066 | FABRICATING A CONTACT RHODIUM STRUCTURE BY ELECTROPLATING AND ELECTROPLATING COMPOSITION - A contact rhodium structure is fabricated by a process that comprises obtaining a substrate having a dielectric layer thereon, wherein the dielectric layer has cavities therein into which the contact rhodium is to be deposited; depositing a seed layer in the cavities and on the dielectric layer; and depositing the rhodium by electroplating from a bath comprising a rhodium salt; an acid and a stress reducer; and then optionally annealing the structure. | 10-23-2008 |
20090014878 | STRUCTURE AND METHOD OF FORMING ELECTRODEPOSITED CONTACTS - A contact metallurgy structure comprising a patterned dielectric layer having cavities on a substrate; a silicide or germanide layer such as of cobalt and/or nickel located at the bottom of cavities; a contact layer comprising Ti or Ti/TiN located on top of the dielectric layer and inside the cavities and making contact to the silicide or germanide layer on the bottom; a diffusion barrier layer located on top of the contact layer and inside the cavities; optionally a seed layer for plating located on top of the barrier layer; a metal fill layer in vias is provided along with a method of fabrication. The metal fill layer is electrodeposited with at least one member selected from the group consisting of copper, rhodium, ruthenium, iridium, molybdenum, gold, silver, nickel, cobalt, silver, gold, cadmium and zinc and alloys thereof. When the metal fill layer is rhodium, ruthenium, or iridium, an effective diffusion barrier layer is not required between the fill metal and the dielectric. When the barrier layer is platable, such as ruthenium, rhodium, platinum, or iridium, the seed layer is not required. | 01-15-2009 |
20090038960 | APPARATUS AND METHOD OF ELECTROLYTIC REMOVAL OF METALS FROM A WAFER SURFACE - An apparatus and method designed to remove metals from a wafer surface using an electrolytic removal process. The apparatus includes a conductive pad having a plurality of alternating cathodes and anodes provided with a power source. The conductive pad is structured and configured to contact all metal islands on a surface of the wafer. Gaps are provided between pairs of the plurality of alternating cathodes and anodes. | 02-12-2009 |
20090057154 | APPARATUS AND METHOD FOR ELECTROCHEMICAL PROCESSING OF THIN FILMS ON RESISTIVE SUBSTRATES - An electrochemical process comprising: providing a 125 mm or larger semiconductor wafer in electrical contact with a conducting surface, wherein at least a portion of the semiconductor wafer is in contact with an electrolytic solution, said semiconductor wafer functioning as a first electrode; providing a second electrode in the electrolytic solution, the first and second electrode connected to opposite ends of an electric power source; and irradiating a surface of the semiconductor wafer with a light source as an electric current is applied across the first and the second electrodes. The invention is also directed to an apparatus including a light source and electrochemical components to conduct the electrochemical process. | 03-05-2009 |
20090095634 | Plating method - A plating method can form a plated film having a uniform thickness over the entire surface, including the peripheral surface, of a substrate. The plating method includes: disposing an anode so as to face a conductive film, formed on a substrate, which serves as a cathode, and disposing an auxiliary cathode on an ring-shaped seal member for sealing a peripheral portion of the substrate; bringing the conductive film, the anode and the auxiliary cathode into contact with a plating solution; and supplying electric currents between the anode and the conductive film, and between the anode and the auxiliary cathode to carry out plating. | 04-16-2009 |
20090127121 | METHOD AND APPARATUS FOR ELECTROPLATING ON SOI AND BULK SEMICONDUCTOR WAFERS - An electroplating apparatus and method for depositing a metallic layer on the surface of a wafer is provided wherein said apparatus and method do not require physical attachment of an electrode to the wafer. The surface of the wafer to be plated is positioned to face the anode and a plating fluid is provided between the wafer and the electrodes to create localized metallic plating. The wafer may be positioned to physically separate and lie between the anode and cathode so that one side of the wafer facing the anode contains a catholyte solution and the other side of the wafer facing the cathode contains an anolyte solution. Alternatively, the anode and cathode may exist on the same side of the wafer in the same plating fluid. In one example, the anode and cathode are separated by a semi permeable membrane. | 05-21-2009 |
20090130845 | DIRECT ELECTRODEPOSITION OF COPPER ONTO TA-ALLOY BARRIERS - A method of depositing copper directly onto a tantalum alloy layer of an on-chip copper interconnect structure, which includes electrodepositing copper from a neutral or basic electrolyte onto a surface of a tantalum alloy layer, in which the tantalum alloy layer is deposited on a substrate of the on-chip copper interconnect structure, and in which the copper nucleates onto the surface of the tantalum alloy layer without use of a seed layer to form a copper conductor. | 05-21-2009 |
20090179279 | METAL GATE ELECTRODE STABILIZATION BY ALLOYING - Stabilized metal gate electrode for complementary metal-oxide-semiconductor (“CMOS”) applications and methods of making the stabilized metal gate electrodes are disclosed. Specifically, the metal gate electrodes are stabilized by alloying wherein the alloy comprises a metal selected from the group consisting of Re, Ru, Pt, Rh, Ni, Al and combinations thereof and an element selected from the group consisting of W, V, Ti, Ta and combinations thereof. | 07-16-2009 |
20090275179 | COMPLEMENTARY METAL OXIDE SEMICONDUCTOR DEVICE WITH AN ELECTROPLATED METAL REPLACEMENT GATE - Disclosed herein are embodiments of a method of forming a complementary metal oxide semiconductor (CMOS) device that has at least one high aspect ratio gate structure with a void-free and seam-free metal gate conductor layer positioned on top of a relatively thin high-k gate dielectric layer. These method embodiments incorporate a gate replacement strategy that uses an electroplating process to fill, from the bottom upward, a high-aspect ratio gate stack opening with a metal gate conductor layer. The source of electrons for the electroplating process is a current passed directly through the back side of the substrate. This eliminates the need for a seed layer and ensures that the metal gate conductor layer will be formed without voids or seams. Furthermore, depending upon the embodiment, the electroplating process is performed under illumination to enhance electron flow to a given area (i.e., to enhance plating) or in darkness to prevent electron flow to a given area (i.e., to prevent plating). | 11-05-2009 |
20090294989 | FORMATION OF VERTICAL DEVICES BY ELECTROPLATING - The present invention is related to a method for forming vertical conductive structures by electroplating. Specifically, a template structure is first formed, which includes a substrate, a discrete metal contact pad located on the substrate surface, an inter-level dielectric (ILD) layer over both the discrete metal contact pad and the substrate, and a metal via structure extending through the ILD layer onto the discrete metal contact pad. Next, a vertical via is formed in the template structure, which extends through the ILD layer onto the discrete metal contact pad. A vertical conductive structure is then formed in the vertical via by electroplating, which is conducted by applying an electroplating current to the discrete metal contact pad through the metal via structure. Preferably, the template structure comprises multiple discrete metal contact pads, multiple metal via structures, and multiple vertical vias for formation of multiple vertical conductive structures. | 12-03-2009 |
20090301890 | FORMATION OF NANOSTRUCTURES COMPRISING COMPOSITIONALLY MODULATED FERROMAGNETIC LAYERS BY PULSED ECD - The present invention is related to a method for forming a structure that contains alternating first and second ferromagnetic layers of different material compositions. A substrate containing a supporting matrix with at least one open pore and a conductive base layer is first formed. Electroplating of the substrate is then carried out in an electroplating solution that contains at least one ferromagnetic metal element and one or more additional, different metal elements. A pulsed current with alternating high and low potentials is applied to the conductive base layer of the substrate structure to thereby form alternating ferromagnetic layers of different material compositions in the open pore of the supporting matrix. | 12-10-2009 |
20090302305 | SELF-CONSTRAINED ANISOTROPIC GERMANIUM NANOSTRUCTURE FROM ELECTROPLATING - A nanostructure comprising germanium, including wires of less than 1 micron in diameter and walls of less than 1 micron in width, in contact with the substrate and extending outward from the substrate is provided along with a method of preparation. | 12-10-2009 |
20090302353 | STRUCTURES CONTAINING ELECTRODEPOSITED GERMANIUM AND METHODS FOR THEIR FABRICATION - Methods for electrodepositing germanium on various semiconductor substrates such as Si, Ge, SiGe, and GaAs are provided. The electrodeposited germanium can be formed as a blanket or patterned film, and may be crystallized by solid phase epitaxy to the orientation of the underlying semiconductor substrate by subsequent annealing. These plated germanium layers may be used as the channel regions of high-mobility channel field effect transistors (FETs) in complementary metal oxide semiconductor (CMOS) circuits. | 12-10-2009 |
20090321833 | VERTICAL PROFILE FinFET GATE FORMED VIA PLATING UPON A THIN GATE DIELECTRIC - Methods of making vertical profile FinFET gate electrodes via plating upon a thin gate dielectric are disclosed. In one embodiment, a method for forming a transistor, comprises: providing a semiconductor topography comprising a semiconductor substrate and a semiconductor fin structure extending above the substrate; forming a gate dielectric across exposed surfaces of the semiconductor topography; patterning a mask upon the semiconductor topography such that only a select portion of the gate dielectric is exposed that defines where a gate electrode is to be formed; and plating a metallic material upon the select portion of the gate dielectric to form a gate electrode across a portion of the fin structure. | 12-31-2009 |
20100047990 | METHOD OF FABRICATING A HIGH Q FACTOR INTEGRATED CIRCUIT INDUCTOR - A method of forming an inductor. The method including: (a) forming a dielectric layer on a top surface of a substrate; after (a), (b) forming a lower trench in the dielectric layer; after (b), (c) forming a resist layer on a top surface of the dielectric layer; after (c), (d) forming an upper trench in the resist layer, the upper trench aligned to the lower trench, a bottom of the upper trench open to the lower trench; and after (d), (e) completely filling the lower trench and at least partially filling the upper trench with a conductor in order to form the inductor. | 02-25-2010 |
20100051474 | METHOD AND COMPOSITION FOR ELECTRO-CHEMICAL-MECHANICAL POLISHING - Methods and compositions for electro-chemical-mechanical polishing (e-CMP) of silicon chip interconnect materials, such as copper, are provided. The methods include the use of compositions according to the invention in combination with pads having various configurations. | 03-04-2010 |
20100219078 | PLATING APPARATUS AND PLATING METHOD - A plating apparatus securely carries out a flattening plating of a substrate to form a plated film having a flat surface without using a costly mechanism, and without applying an extra plating to the substrate. The plating apparatus includes a substrate holder; a cathode section having a seal member for watertightly sealing a peripheral portion of the substrate, and a cathode electrode for supplying an electric current to the substrate; an anode disposed in a position facing the surface of the substrate; a porous member disposed between the anode and the surface of the substrate; a constant-voltage control section for controlling a voltage applied between the cathode electrode and the anode at a constant value; and a current monitor section for monitoring an electric current flowing between the cathode electrode and the anode, and feeding back a detection signal to the constant-voltage control section. | 09-02-2010 |
20110012085 | METHODS OF MANUFACTURE OF VERTICAL NANOWIRE FET DEVICES - A vertical Field Effect Transistor (FET) comprising a vertical semiconductor nanowire is formed by the following steps. Create a columnar pore in a bottom dielectric layer formed on a bottom electrode. Fill the columnar pore by plating a vertical semiconductor nanowire having a bottom end contacting the bottom electrode. The semiconductor nanowire forms an FET device with a FET channel region between a source region and a drain region formed in distal ends of the vertical semiconductor nanowire. Form a gate dielectric layer around the channel region of the vertical semiconductor nanowire and then form a gate electrode around the gate dielectric layer. Form a top electrode contacting a top end of the vertical semiconductor nanowire. | 01-20-2011 |
20110084393 | METHOD OF FORMING ELECTRODEPOSITED CONTACTS - A contact metallurgy structure comprising a patterned dielectric layer having vias on a substrate; a silicide layer of cobalt and/or nickel located at the bottom of vias; a contact layer comprising Ti located in vias on top of the silicide layer; a diffusion layer located in vias and on top of the contact layer; a metal fill layer in vias is provided along with a method of fabrication. The metal fill layer comprises at least one member selected from the group consisting of copper, ruthenium, rhodium platinum, palladium, iridium, rhenium, tungsten, gold, silver and osmium and alloys thereof. When the metal fill layer comprises rhodium, the diffusion layer is not required. Optionally a seed layer for the metal fill layer can be employed. | 04-14-2011 |
20110108115 | Forming a Photovoltaic Device - Methods for forming photovoltaic devices, methods for forming semiconductor compounds, photovoltaic device and chemical solutions are presented. For example, a method for forming a photovoltaic device comprising a semiconductor layer includes forming the semiconductor layer by electrodeposition from an electrolyte solution. The electrolyte solution includes copper, indium, gallium, selenous acid (H | 05-12-2011 |
20110108803 | VERTICAL NANOWIRE FET DEVICES - A Vertical Field Effect Transistor (VFET) formed on a substrate, with a conductive bottom electrode formed thereon. A bottom dielectric spacer layer and a gate dielectric layer surrounded by a gate electrode are formed thereabove. Thereabove is an upper spacer layer. A pore extends therethrough between the electrodes. A columnar Vertical Semiconductor Nanowire (VSN) fills the pore and between the top and bottom electrodes. An FET channel is formed in a central region of the VSN between doped source and drain regions at opposite ends of the VSN. The gate dielectric structure, that is formed on an exterior surface of the VSN above the bottom dielectric spacer layer, separates the VSN from the gate electrode. | 05-12-2011 |
20110312164 | FORMING AN ELECTRODE HAVING REDUCED CORROSION AND WATER DECOMPOSITION ON SURFACE USING A CUSTOM OXIDE LAYER - The present invention provides a method of forming an electrode having reduced corrosion and water decomposition on a surface thereof. A conductive layer is deposited on a substrate. The conductive layer is partially oxidized by an oxygen plasma process to convert a portion thereof to an oxide layer thereby forming the electrode. The oxide layer is free of surface defects and the thickness of the oxide layer is from about 0.09 nm to about 10 nm and ranges therebetween, controllable with 0.2 nm precision. | 12-22-2011 |
20110312176 | FORMING AN ELECTRODE HAVING REDUCED CORROSION AND WATER DECOMPOSITION ON SURFACE USING AN ORGANIC PROTECTIVE LAYER - Accordingly, the present invention provides a method of forming an electrode having reduced corrosion and water decomposition on a surface thereof. A substrate which has a conductive layer disposed thereon is provided and the conductive layer has an oxide layer with an exposed surface. The exposed surface of the oxide layer contacts a solution of an organic surface active compound in an organic solvent to form a protective layer of the organic surface active compound over the oxide layer. The protective layer has a thickness of from about 0.5 nm to about 5 nm and ranges therebetween depending on a chemical structure of the surface active compound. | 12-22-2011 |
20120043216 | Working electrode design for electrochemical processing of electronic components - An electroplating apparatus is provided that includes a plating tank for containing a plating electrolyte. A counter electrode, e.g., anode, is present in a first portion of the plating tank. A cathode system is present in a second portion of the plating tank. The cathode system includes a working electrode and a thief electrode. The thief electrode is present between the working electrode and the counter electrode. The thief electrode includes an exterior face that is in contact with the plating electrolyte that is offset from the plating surface of the working electrode. In one embodiment, the thief electrode overlaps a portion of the working electrode about the perimeter of the working electrode. In one embodiment, a method is provided of using the aforementioned electroplating apparatus that provides increased uniformity in the plating thickness. | 02-23-2012 |
20120043217 | Rinsing and drying for electrochemical processing - An electroplating/etch apparatus including a fluid jet and a dryer present over the tank containing the electrolyte for the electroplating/etch process. The fluid jet and the dryer remove excess liquids, such as electrolyte, from the component being plated or etched, e.g., working electrode. The working electrode is present on a holder that traverses from a first position within the tank during a plating or etch operation to a second position that is outside the containing the plating electrolyte. The fluid jet rinses the working electrode when the holder is in the second position, and the forced air dryer blows any remaining fluid from the fluid jet and the electrolyte from the working electrode into the tank. | 02-23-2012 |
20120043301 | METHOD AND APPARATUS FOR CONTROLLING AND MONITORING THE POTENTIAL - An electroplating apparatus including a reference electrode to control the potential during an electro-deposition process. The electroplating apparatus may include a bath containing a plating electrolyte and an anode present in a first portion of the bath containing the plating electrolyte. A cathode is present in a second portion of the bath containing the plating electrolyte. A reference electrode is present at a perimeter of the cathode. The electroplating apparatus also includes a control system to bias the cathode and the anode to provide a potential. A measuring system is provided in electrical communication with the reference electrode to measure the potential of the cathode. Methods of using the above described electroplating apparatus are also provided. Structures and method for electroless deposition are also provided. | 02-23-2012 |
20120061247 | Method and Chemistry for Selenium Electrodeposition - Techniques for electrodepositing selenium (Se)-containing films are provided. In one aspect, a method of preparing a Se electroplating solution is provided. The method includes the following steps. The solution is formed from a mixture of selenium oxide; an acid selected from the group consisting of alkane sulfonic acid, alkene sulfonic acid, aryl sulfonic acid, heterocyclic sulfonic acid, aromatic sulfonic acid and perchloric acid; and a solvent. A pH of the solution is then adjusted to from about 2.0 to about 3.0. The pH of the solution can be adjusted to from about 2.0 to about 3.0 by adding a base (e.g., sodium hydroxide) to the solution. A Se electroplating solution, an electroplating method and a method for fabricating a photovoltaic device are also provided. | 03-15-2012 |
20120061250 | Zinc Thin Films Plating Chemistry and Methods - Techniques for electrodepositing zinc (Zn)-containing films are provided. In one aspect, a method of preparing a Zn electroplating solution is provided. The method includes the following steps. The solution is formed from a mixture of at least one zinc salt, a sulfonic acid and a solvent. The sulfonic acid is quenched with a base. A pH of the solution is adjusted to be either less than about 3.5 or greater than about 8.0. The pH of the solution can be adjusted by adding additional sulfonic acid to the solution to adjust the pH of the solution to be less than about 3.5 or by adding a second base to the solution to adjust the pH of the solution to be greater than about 8.0. A Zn electroplating solution and an electroplating method are also provided. | 03-15-2012 |
20120061790 | Structure and Method of Fabricating a CZTS Photovoltaic Device by Electrodeposition - Techniques for using electrodeposition to form absorber layers in diodes (e.g., solar cells) are provided. In one aspect, a method for fabricating a diode is provided. The method includes the following steps. A substrate is provided. A backside electrode is formed on the substrate. One or more layers are electrodeposited on the backside electrode, wherein at least one of the layers comprises copper, at least one of the layers comprises zinc and at least one of the layers comprises tin. The layers are annealed in an environment containing a sulfur source to form a p-type CZTS absorber layer on the backside electrode. An n-type semiconductor layer is formed on the CZTS absorber layer. A transparent conductive layer is formed on the n-type semiconductor layer. A diode is also provided. | 03-15-2012 |
20120292771 | FABRICATING A CONTACT RHODIUM STRUCTURE BY ELECTROPLATING AND ELECTROPLATING COMPOSITION - A contact rhodium structure is fabricated by a process that comprises obtaining a substrate having a dielectric layer thereon, wherein the dielectric layer has cavities therein into which the contact rhodium is to be deposited; depositing a seed layer in the cavities and on the dielectric layer; and depositing the rhodium by electroplating from a bath comprising a rhodium salt; an acid and a stress reducer; and then optionally annealing the structure. | 11-22-2012 |
20120318666 | METHOD AND APPARATUS FOR ELECTROPLATING ON SOI AND BULK SEMICONDUCTOR WAFERS - An electroplating apparatus and method for depositing a metallic layer on the surface of a wafer is provided wherein said apparatus and method do not require physical attachment of an electrode to the wafer. The surface of the wafer to be plated is positioned to face the anode and a plating fluid is provided between the wafer and the electrodes to create localized metallic plating. The wafer may be positioned to physically separate and lie between the anode and cathode so that one side of the wafer facing the anode contains a catholyte solution and the other side of the wafer facing the cathode contains an anolyte solution. Alternatively, the anode and cathode may exist on the same side of the wafer in the same plating fluid. In one example, the anode and cathode are separated by a semi permeable membrane. | 12-20-2012 |
20120318673 | APPARATUS AND METHOD FOR ELECTROCHEMICAL PROCESSING OF THIN FILMS ON RESISTIVE SUBSTRATES - An electrochemical process comprising: providing a 125 mm or larger semiconductor wafer in electrical contact with a conducting surface, wherein at least a portion of the semiconductor wafer is in contact with an electrolytic solution, said semiconductor wafer functioning as a first electrode; providing a second electrode in the electrolytic solution, the first and second electrode connected to opposite ends of an electric power source; and irradiating a surface of the semiconductor wafer with a light source as an electric current is applied across the first and the second electrodes. The invention is also directed to an apparatus including a light source and electrochemical components to conduct the electrochemical process. | 12-20-2012 |
20120322243 | APPARATUS AND METHOD FOR ELECTROCHEMICAL PROCESSING OF THIN FILMS ON RESISTIVE SUBSTRATES - An electrochemical process comprising: providing a 125 mm or larger semiconductor wafer in electrical contact with a conducting surface, wherein at least a portion of the semiconductor wafer is in contact with an electrolytic solution, said semiconductor wafer functioning as a first electrode; providing a second electrode in the electrolytic solution, the first and second electrode connected to opposite ends of an electric power source; and irradiating a surface of the semiconductor wafer with a light source as an electric current is applied across the first and the second electrodes. The invention is also directed to an apparatus including a light source and electrochemical components to conduct the electrochemical process. | 12-20-2012 |
20130001198 | METHOD AND APPARATUS FOR CONTROLLING AND MONITORING THE POTENTIAL - An electroplating apparatus including a reference electrode to control the potential during an electro-deposition process. The electroplating apparatus may include a bath containing a plating electrolyte and an anode present in a first portion of the bath containing the plating electrolyte. A cathode is present in a second portion of the bath containing the plating electrolyte. A reference electrode is present at a perimeter of the cathode. The electroplating apparatus also includes a control system to bias the cathode and the anode to provide a potential. A measuring system is provided in electrical communication with the reference electrode to measure the potential of the cathode. Methods of using the above described electroplating apparatus are also provided. Structures and method for electroless deposition are also provided. | 01-03-2013 |
20130062209 | WORKING ELECTRODE DESIGN FOR ELECTROCHEMICAL PROCESSING OF ELECTRONIC COMPONENTS - An electroplating apparatus including a plating tank for containing a plating electrolyte. A counter electrode, e.g., anode, is present in a first portion of the plating tank. A cathode system is present in a second portion of the plating tank. The cathode system includes a working electrode and a thief electrode. The thief electrode is present between the working electrode and the counter electrode. The thief electrode includes an exterior face that is in contact with the plating electrolyte that is offset from the plating surface of the working electrode. In one embodiment, the thief electrode overlaps a portion of the working electrode about the perimeter of the working electrode. In one embodiment, a method is provided of using the aforementioned electroplating apparatus that provides increased uniformity in the plating thickness. | 03-14-2013 |
20130074915 | METHOD OF FABRICATING A FLEXIBLE PHOTOVOLTAIC FILM CELL WITH AN IRON DIFFUSION BARRIER LAYER - A method of fabricating a flexible photovoltaic film cell with an iron diffusion barrier layer. The method includes: providing a foil substrate including iron; forming an iron diffusion barrier layer on the foil substrate, where the iron diffusion barrier layer prevents the iron from diffusing; forming an electrode layer on the iron diffusion barrier layer; and forming at least one light absorber layer on the electrode layer. A flexible photovoltaic film cell is also provided, which cell includes: a foil substrate including iron; an iron diffusion barrier layer formed on the foil substrate to prevent the iron from diffusing; an electrode layer formed on the iron diffusion barrier layer; and at least one light absorber layer formed on the electrode layer. | 03-28-2013 |
20130125977 | Structure and Method of Fabricating a CZTS Photovoltaic Device by Electrodeposition - Techniques for using electrodeposition to form absorber layers in diodes (e.g., solar cells) are provided. In one aspect, a method for fabricating a diode is provided. The method includes the following steps. A substrate is provided. A backside electrode is formed on the substrate. One or more layers are electrodeposited on the backside electrode, wherein at least one of the layers comprises copper, at least one of the layers comprises zinc and at least one of the layers comprises tin. The layers are annealed in an environment containing a sulfur source to form a p-type CZTS absorber layer on the backside electrode. An n-type semiconductor layer is formed on the CZTS absorber layer. A transparent conductive layer is formed on the n-type semiconductor layer. A diode is also provided. | 05-23-2013 |
20130183553 | BATTERY WITH SELF-PROGRAMMING FUSE - A useful lifetime of an energy storage device can be extended by providing a series connection of a battery cell and an self-programming fuse. A plurality of series connections of a battery cell and an self-programming fuse can then be connected in a parallel connection to expand the energy storage capacity of the energy storage device. Each self-programming fuse can be a strip of a metal semiconductor alloy material, which electromigrates when a battery cell is electrically shorted and causes increases in the amount of electrical current therethrough. Thus, each self-programming fuse is a self-programming circuit that opens once the battery cell within the same series connection is shorted. | 07-18-2013 |
20140026949 | OHMIC CONTACT OF THIN FILM SOLAR CELL - A chalcogen-resistant material including at least one of a conductive elongated nanostructure layer and a high work function material layer is deposited on a transition metal layer on a substrate. A semiconductor chalcogenide material layer is deposited over the chalcogen-resistant material. The conductive elongated nanostructures, if present, can reduce contact resistance by providing direct electrically conductive paths from the transition metal layer through the chalcogen-resistant material and to the semiconductor chalcogenide material. The high work function material layer, if present, can reduce contact resistance by blocking chalcogenization of the transition metal in the transition metal layer. Reduction of the contact resistance can enhance efficiency of a solar cell including the chalcogenide semiconductor material. | 01-30-2014 |
20140030843 | OHMIC CONTACT OF THIN FILM SOLAR CELL - A chalcogen-resistant material including at least one of a carbon nanotube layer and a high work function material layer is deposited on a transition metal layer on a substrate. A semiconductor chalcogenide/kesterite material layer is deposited over the chalcogen-resistant material. The carbon nanotubes, if present, can reduce contact resistance by providing direct electrically conductive paths from the transition metal layer through the chalcogen-resistant material and to the semiconductor chalcogenide material. The high work function material layer, if present, can reduce contact resistance by reducing chalcogenization of the transition metal in the transition metal layer. Reduction of the contact resistance can enhance efficiency of a solar cell including the chalcogenide semiconductor material. | 01-30-2014 |
20140045295 | PLASMA ANNEALING OF THIN FILM SOLAR CELLS - Embodiments relate to a method for annealing a solar cell structure including forming an absorber layer on a molybdenum (Mo) layer of a solar cell base structure. The solar cell base structure includes a substrate and the Mo layer is located on the substrate. The absorber layer includes a semiconductor chalcogenide material. Annealing the solar cell base structure is performed by exposing an outer layer of the solar cell base structure to a plasma. | 02-13-2014 |
20140097091 | Design of 60x120 cm2 Prototype Electrodeposition Cell for Processing of Thin Film Solar Panels - Techniques for electrodeposition of thin film solar panels are provided. In one aspect, an electrodeposition apparatus is provided. The electrodeposition apparatus includes at least one electroplating cell; and a conveyor for moving panels over the electroplating cell, wherein the conveyor comprises at least one metal belted track over the electroplating cell surrounding a plurality of metal rollers. The electroplating cell can include an anode at a bottom of the electroplating cell; and a plurality of paddles at a top of the electroplating cell. A baffle may be located in between the anode and the paddles. An electroplating process is also provided. | 04-10-2014 |
20140252530 | Structure and Method of Fabricating a CZTS Photovoltaic Device by Electrodeposition - Techniques for using electrodeposition to form absorber layers in diodes (e.g., solar cells) are provided. In one aspect, a method for fabricating a diode is provided. The method includes the following steps. A substrate is provided. A backside electrode is formed on the substrate. One or more layers are electrodeposited on the backside electrode, wherein at least one of the layers comprises copper, at least one of the layers comprises zinc and at least one of the layers comprises tin. The layers are annealed in an environment containing a sulfur source to form a p-type CZTS absorber layer on the backside electrode. An n-type semiconductor layer is formed on the CZTS absorber layer. A transparent conductive layer is formed on the n-type semiconductor layer. A diode is also provided. | 09-11-2014 |
20140346051 | Method and Chemistry for Selenium Electrodeposition - Techniques for electrodepositing selenium (Se)-containing films are provided. In one aspect, a method of preparing a Se electroplating solution is provided. The method includes the following steps. The solution is formed from a mixture of selenium oxide; an acid selected from the group consisting of alkane sulfonic acid, alkene sulfonic acid, aryl sulfonic acid, heterocyclic sulfonic acid, aromatic sulfonic acid and perchloric acid; and a solvent. A pH of the solution is then adjusted to from about 2.0 to about 3.0. The pH of the solution can be adjusted to from about 2.0 to about 3.0 by adding a base (e.g., sodium hydroxide) to the solution. A Se electroplating solution, an electroplating method and a method for fabricating a photovoltaic device are also provided. | 11-27-2014 |
20140352139 | POWER SOURCE ENCAPSULATION - A method comprising the steps of encapsulating a power source including a set of power terminals in a cover and sealing the power source including the set of power terminals within the cover and inserting a set of conductive contacts through the cover to contact the set of power terminals and provide conductive access to the set of power terminals of the power source from outside the cover without allowing exposure of the power source to an environment outside the cover. | 12-04-2014 |
20140356699 | POWER SOURCE ENCAPSULATION - A system includes a power source having a set of power terminals, a cover encapsulating the power source including the set of power terminals and sealing the power source including the set of power terminals within the cover, and a set of conductive contacts passing through the cover, contacting the set of power terminals, and providing conductive access to the set of power terminals of the power source from outside the cover without allowing exposure of the power source to an environment outside the cover. | 12-04-2014 |
20150079723 | Pressure Transfer Process for Thin Film Solar Cell Fabrication - In one aspect, a method for fabricating a thin film solar cell includes the following steps. A first absorber material is deposited as a layer A on a substrate while applying pressure to the substrate/layer A. A second absorber material is deposited as a layer B on layer A while applying pressure to the substrate/layer B. A third absorber material is deposited as a layer C on layer B while applying pressure to the substrate/layer C. A fourth absorber material is deposited as a layer D on layer C while applying pressure to the substrate/layer D. The first absorber material comprises copper, the second absorber material comprises indium, the third absorber material comprises gallium, and the fourth absorber material comprises one or more of sulfur and selenium, and wherein by way of performing the steps of claim | 03-19-2015 |