| Patent application number | Description | Published |
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| 20100290277 | RESISTIVE MEMORY CELL ACCESSED USING TWO BIT LINES - An integrated circuit includes a first bit line and a resistance changing memory element coupled to the first bit line. The integrated circuit includes a second bit line and a heater coupled to the second bit line. The integrated circuit includes an access device coupled to the resistance changing memory element and the heater. | 11-18-2010 |
| 20130045558 | DEVICE AND METHOD FOR PRECIPITATING A LAYER ON A SUBSTRATE - A device for depositing a layer containing at least two components on an object, including: a deposition chamber; a source containing a material to be deposited; and a control device, which controls the deposition process, implemented such that a concentration of the component of the material can be modified in its gas phase prior to deposition on the object by selective binding a specified quantity of the component, wherein the selectively bound quantity of the component is controlled by modifying a control parameter that is actively coupled to a binding rate or the component, and wherein the control device contains a gettering element containing a reactive material containing copper and/or molybdenum. Also, a method for depositing a layer containing at least two components on an object, wherein a selectively bound quantity of a component is controlled by modifying a binding rate of the component of the control device. | 02-21-2013 |
| 20130319518 | SOLAR MODULE WITH A CONNECTING ELEMENT - A solar module having a connecting element is described. The solar module has a substrate, a back electrode layer, a photovoltaically active absorber layer, and a cover pane disposed one over the other, at least one prefabricated conductive film at least one connection housing. | 12-05-2013 |
| 20140216527 | FRAMELESS SOLAR MODULE WITH MOUNTING HOLES - A frameless solar module having a carrier substrate and a top layer connected thereto, between which there is a layer structure which forms a plurality of solar cells connected in series for the photovoltaic generation of power is described. The carrier substrate and/or the top layer of the frameless solar module is/are provided with mounting holes for mounting the solar module on a module bracket or for connection to at least one further solar module. The mounting holes are produced in a coating-free zone within a photovoltaically active region. Mounting arrangements having such a solar module which contain fixing elements which pass through the mounting holes are also described. Furthermore, a method for producing such a solar module in which the mounting holes are produced in the carrier substrate and/or in the top layer is also described. | 08-07-2014 |
| 20140246074 | SOLAR MODULE WITH RIBBON CABLE, AND A METHOD FOR THE MANUFACTURE OF SAME - A solar module, more particularly a thin-film solar module having a plurality of solar cells connected in series for the photovoltaic generation of power, is described. The solar module has two voltage terminals of opposite polarity, which are each connected to an external surface of the module. Each of the two leads is electrically connected to a separate terminal device. Each of the two terminal housings is attached to the outer surface of the module. The two leads are electrically interconnected through a flyback diode, and the two terminal devices are electrically connected by a ribbon cable that is arranged between the two terminal housings and attached to the external surface of the module. A manufacturing method for the solar module is also described. | 09-04-2014 |
| 20150072460 | DEVICE AND METHOD FOR PRECIPITATING A LAYER ON A SUBSTRATE - The invention relates to a device for depositing a layer made of at least two components on an object, with a deposition chamber for disposing the object, at least one source with material to be deposited, as well as at least one device for controlling the deposition process, implemented such that the concentration of at least one component of the material to be deposited can be modified in its gas phase prior to deposition on the substrate by selective binding of a specified quantity of the at least one component, wherein the selectively bound quantity of the at least one component can be controlled by modifying at least one control parameter that is actively coupled to a binding rate or the component. It further relates to a device for depositing a layer made of at least two components on an object, wherein a device for controlling the deposition process has at least one gettering element made of a reactive material, wherein the reactive material includes copper and/or molybdenum. It further relates to a method for depositing a layer made of at least two components on an object, wherein a selectively bound quantity of at least one component is controlled by modifying a binding rate of a device for controlling the deposition process. | 03-12-2015 |
| Patent application number | Description | Published |
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| 20090242865 | MEMORY ARRAY WITH DIODE DRIVER AND METHOD FOR FABRICATING THE SAME - A method of fabricating a memory array. The method begins with a structure, generally composed of dielectric fill material and having conductive lines formed at its lower portion, and a sacrificial layer formed on its upper surface. Diodes are formed in the fill material, each diode having a lightly-doped first layer of the same conductivity type as the conductive lines; a heavily doped second layer of opposite conductivity type; and a conductive cap. Self-aligned vias are formed over the diodes. Self-aligned, and self-centered spacers in the self-aligned vias define pores that expose the conductive cap. Memory material is deposited within the pores, the memory material making contact with the conductive cap. A top electrode is formed in contact with the memory material. | 10-01-2009 |
| 20090251944 | MEMORY CELL HAVING IMPROVED MECHANICAL STABILITY - Memory cells are described along with methods for manufacturing. A memory cell described herein includes a bottom electrode comprising a base portion and a pillar portion on the base portion, the pillar portion and the base portion having respective outer surfaces and the pillar portion having a width less than that of the base portion. A memory element is on a top surface of the pillar portion of the bottom electrode, and a top electrode is on the memory element. A dielectric spacer contacts the outer surface of the pillar portion, the outer surface of the base portion of the bottom electrode self-aligned with an outer surface of the dielectric spacer. | 10-08-2009 |
| 20090267042 | Integrated Circuit and Method of Manufacturing an Integrated Circuit - According to one embodiment of the present invention, an integrated circuit including a plurality of resistance changing memory cells is provided. Each memory cell includes: a semiconductor substrate; a select device arranged within the semiconductor substrate; and a memory element being arranged above the semiconductor substrate. The select device is a diode comprising a first semiconductor area of a first conductive type and a second semiconductor area of a second conductive type which are arranged adjacent to each other such that a lateral pn-junction is formed. The first semiconductor area is connected to a word line arranged on or above the semiconductor substrate. The second semiconductor area is connected to the memory element via a conductive connection element. | 10-29-2009 |
| 20090315090 | Isolation Trenches with Conductive Plates - Methods of forming isolation trenches, semiconductor devices, structures thereof, and methods of operating memory arrays are disclosed. In one embodiment, an isolation trench includes a recess disposed in a workpiece. A conductive material is disposed in a lower portion of the channel. An insulating material is disposed in an upper portion of the recess over the conductive material. | 12-24-2009 |
| 20100019215 | MUSHROOM TYPE MEMORY CELL HAVING SELF-ALIGNED BOTTOM ELECTRODE AND DIODE ACCESS DEVICE - Memory devices are described along with methods for manufacturing. A memory device as described herein includes a plurality of word lines extending in a first direction, and a plurality of bit lines overlying the plurality of word lines and extending in a second direction. A plurality of memory cells are at cross-point locations. Each memory cell comprises a diode having first and second sides aligned with sides of a corresponding word line. Each memory cell also includes a bottom electrode self-centered on the diode, the bottom electrode having a top surface with a surface area less than that of the top surface of the diode. Each of the memory cells includes a strip of memory material on the top surface of the bottom electrode, the strip of memory material underlying and in electrical communication with a corresponding bit line. | 01-28-2010 |
| 20100054029 | CONCENTRIC PHASE CHANGE MEMORY ELEMENT - The present invention in one embodiment provides a memory device including a first electrode; a second electrode; and a memory cell positioned between the first electrode and the second electrode, the memory cell including a core of a first phase change material and a cladding of a second phase change material, wherein the first phase change material has a lower crystallization temperature than the second phase change material. The present invention also provides methods of forming the above described memory device. | 03-04-2010 |
