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Grupp

Daniel Grupp, San Francisco, CA US

Patent application numberDescriptionPublished
20110184391MULTI FLUID TISSUE RESECTION METHODS AND DEVICES - Prostate treatment using fluid stream to resect prostate tissue, thereby relieving symptoms of conditions such as BPH, prostatitis, and prostatic carcinoma. A device having a fluid delivery element is positioned within a lumen of the urethra within the prostate. A fluid stream is directed outwardly from the fluid delivery element toward a wall of the urethral lumen. The fluid delivery element is moved to scan the fluid stream over the wall to remove a volume of tissue surrounding the lumen. The fluid may be combined with therapeutically active substances or with substances that increase resection efficiency. Fluid force may be adjusted to provide selective tissue resection such that soft tissue is removed while harder tissue is left undamaged. In order to gain a working space within the urethra, another fluid may be introduced to insufflate the urethra in the region of treatment.07-28-2011

Daniel E. Grupp, Palo Alto, CA US

Patent application numberDescriptionPublished
20090104770METHOD FOR DEPINNING THE FERMI LEVEL OF A SEMICONDUCTOR AT AN ELECTRICAL JUNCTION AND DEVICES INCORPORATING SUCH JUNCTIONS - An electrical device in which an interface layer is disposed between and in contact with a metal and a Si-based semiconductor, the interface layer being of a thickness effective to depin of the Fermi level of the semiconductor while still permitting current to flow between the metal and the semiconductor. The interface layer may include a layer of a passivating material (e.g., made from nitrogen, oxygen, oxynitride, arsenic, hydrogen and/or fluorine) and sometimes also includes a separation layer. In some cases, the interface layer may be a monolayer of a semiconductor passivating material. The interface layer thickness corresponds to a minimum specific contact resistance of less than or equal to 10Ω-μm04-23-2009
20110008953METHOD FOR MAKING SEMICONDUCTOR INSULATED-GATE FIELD-EFFECT TRANSISTOR HAVING MULTILAYER DEPOSITED METAL SOURCE(S) AND/OR DRAIN(S) - A metal source/drain field effect transistor is fabricated such that the source/drain regions are deposited, multilayer structures, with at least a second metal deposited on exposed surfaces of a first metal.01-13-2011
20110124170PROCESS FOR FABRICATING A SELF-ALIGNED DEPOSITED SOURCE/DRAIN INSULATED GATE FIELD-EFFECT TRANSISTOR - Processes for forming self-aligned, deposited source/drain, insulated gate, transistors and, in particular, FETs. By depositing a source/drain in a recess such that it remains only in the recess, the source/drain can be formed self-aligned to a gate and/or a channel of such a device. For example, in one such process a gate structure of a transistor may be formed and, in a material surrounding the gate structure, a recess created so as to be aligned to an edge of the gate structure. Subsequently, a source/drain conducting material may be deposited in the recess. Such a source/drain conducting material may be deposited, in some cases, as layers, with one or more such layers being planarized following its deposition. In this way, the conducting material is kept within the boundaries of the recess.05-26-2011
20110169124METHOD FOR DEPINNING THE FERMI LEVEL OF A SEMICONDUCTOR AT AN ELECTRICAL JUNCTION AND DEVICES INCORPORATING SUCH JUNCTIONS - An electrical device in which an interface layer is disposed between and in contact with a metal and a Si-based semiconductor, the interface layer being of a thickness effective to depin of the Fermi level of the semiconductor while still permitting current to flow between the metal and the semiconductor. The interface layer may include a layer of a passivating material (e.g., made from nitrogen, oxygen, oxynitride, arsenic, hydrogen and/or fluorine) and sometimes also includes a separation layer. In some cases, the interface layer may be a monolayer of a semiconductor passivating material. The interface layer thickness corresponds to a minimum specific contact resistance of less than or equal to 10 Ω-μm07-14-2011
20110210376INSULATED GATE FIELD EFFECT TRANSISTOR HAVING PASSIVATED SCHOTTKY BARRIERS TO THE CHANNEL - A transistor includes a semiconductor channel disposed nearby a gate and in an electrical path between a source and a drain, wherein the channel and at least one of the source or the drain are separated by an interface layer so as to form a channel-interface layer-source/drain junction in which a Fermi level of the semiconductor channel is depinned in a region near the junction and the junction has a specific contact resistance of less than approximately 1000 Ω-μm09-01-2011
20120280294METHOD FOR DEPINNING THE FERMI LEVEL OF A SEMICONDUCTOR AT AN ELECTRICAL JUNCTION AND DEVICES INCORPORATING SUCH JUNCTIONS - An electrical device in which an interface layer comprising arsenic is disposed between and in contact with a conductor and a semiconductor. In some cases, the interface layer may be a monolayer of arsenic.11-08-2012

Patent applications by Daniel E. Grupp, Palo Alto, CA US

Daniel E. Grupp, San Francisco, CA US

Patent application numberDescriptionPublished
20130119446METHOD FOR DEPINNING THE FERMI LEVEL OF A SEMICONDUCTOR AT AN ELECTRICAL JUNCTION AND DEVICES INCORPORATING SUCH JUNCTIONS - An electrical device in which an interface layer comprising arsenic is disposed between and in contact with a conductor and a semiconductor. In some cases, the interface layer may be a monolayer of arsenic.05-16-2013
20130140629INSULATED GATE FIELD EFFECT TRANSISTOR HAVING PASSIVATED SCHOTTKY BARRIERS TO THE CHANNEL - A transistor having at least one passivated Schottky barrier to a channel includes an insulated gate structure on a p-type substrate in which the channel is located beneath the insulated gate structure. The channel and the insulated gate structure define a first and second undercut void regions that extend underneath the insulated gate structure toward the channel from a first and a second side of the insulated gate structure, respectively. A passivation layer is included on at least one exposed sidewall surface of the channel, and metal source and drain terminals are located on respective first and second sides of the channel, including on the passivation layer and within the undercut void regions beneath the insulated gate structure. At least one of the metal source and drain terminals comprises a metal that has a work function near a valence band of the p-type substrate.06-06-2013
20140284666INSULATED GATE FIELD EFFECT TRANSISTOR HAVING PASSIVATED SCHOTTKY BARRIERS TO THE CHANNEL - A transistor having at least one passivated Schottky barrier to a channel includes an insulated gate structure on a p-type substrate in which the channel is located beneath the insulated gate structure. The channel and the insulated gate structure define a first and second undercut void regions that extend underneath the insulated gate structure toward the channel from a first and a second side of the insulated gate structure, respectively. A passivation layer is included on at least one exposed sidewall surface of the channel and metal source and drain terminals are located on respective first and second sides of the channel, including on the passivation layer and within the undercut void regions beneath the insulated gate structure. At least one of the metal source and drain terminals comprises a metal that has a work function near a valence band of the p-type substrate.09-25-2014

David Grupp, Sacramento, CA US

Patent application numberDescriptionPublished
20120214077INTEGRATED RECIRCULATING FUEL CELL SYSTEM - A PEM fuel system includes a fuel cell stack comprising one or more PEM fuel cells and fan configured to provide process air to supply oxidizer to and cool the fuel cell stack. The system has an air duct coupled to the fan and the fuel cell stack, and an electrical service load coupled to the fuel cell stack for receiving electrical power generated from reactions within the fuel cell stack. The system further includes as auxiliary electrical load coupled to the fuel cell stack and located within the air duct to reduce potentials across the fuel cell stack. The air duct is configured to direct the flow of air to the fuel cell stack and auxiliary electrical load to provide cooling air to the fuel cell stack and auxiliary electrical load.08-23-2012

Joachim Grupp, Enges CH

Patent application numberDescriptionPublished
20090016173SPIRAL SPRING MADE OF ATHERMAL GLASS FOR CLOCKWORK MOVEMENT AND METHOD FOR MAKING SAME - The balance spring is made from a photostructurable glass plate by UV irradiation, thermal treatment and etching, said glass having a Young's modulus thermal coefficient CTE01-15-2009
20090237335DISPLAY DEVICE ABLE TO OPERATE IN LOW POWER PARTIAL DISPLAY MODE - The display device includes a display cell including liquid crystals and a matrix of electrodes arranged in lines and columns in a closed cavity. The lines and columns define display cell pixels. The display device includes a control circuit for lines and columns for display of data on the display cell. In complete display mode, all lines and columns are addressed at several voltage levels by successive line-by-line multiplexing. In low power partial display mode, two groups of adjacent lines are joined so they are each controlled by a respective line control signal from the control circuit. The N lines and groups of lines are simultaneously addressed in active manner at two voltage levels. N line control signals include a series of N-bit binary line words that change every determined period of time, T, so 209-24-2009
20100024930ELECTROFORMING METHOD AND PART OR LAYER OBTAINED VIA THE METHOD - The invention concerns an electroformed gold alloy part, characterized in that the gold alloy is made up of 88 to 94% by weight of gold, x % by weight of copper and/or silver, and 2x % by weight of zinc, x being comprised between 2 and 4.02-04-2010
20100308277ELECTRICALLY CONDUCTIVE NANOCOMPOSITE MATERIAL COMPRISING SACRIFICIAL NANOPARTICLES AND OPEN POROUS NANOCOMPOSITES PRODUCED THEREOF - Nanocomposites of conductive, nanoparticulate polymer and electronically active material, in particular PEDOT and LiFePO12-09-2010
20110056301PRESSURE SENSOR - The invention relates to a pressure sensor (03-10-2011
20120024432METHOD OF MANUFACTURING A WATCH PLATE - The present invention relates to a method of making a timepiece plate. This method is characterized in that it includes the following steps: 02-02-2012

Patent applications by Joachim Grupp, Enges CH

Judi A. Grupp, Northbrook, IL US

Patent application numberDescriptionPublished
20090259508METHOD AND SYSTEMS FOR OPTIMIZING SCHEDULED SERVICES - An automated system that improves utilization of resources and increases the effectiveness of prescribed procedures by insuring that required resources are available at the time of a scheduled service.10-15-2009

Stephan Grupp, Havertown, PA US

Patent application numberDescriptionPublished
20150202286Toxicity Management for Anti-Tumor Activity of CARs - The present invention provides compositions and methods for treating cancer in a patient. In one embodiment, the method comprises a first-line therapy comprising administering to a patient in need thereof a genetically modified T cell expressing a CAR wherein the CAR comprises an antigen binding domain, a transmembrane domain, a costimulatory signaling region, and a CD3 zeta signaling domain and monitoring the levels of cytokines in the patient post T cell infusion to determine the type of second-line of therapy appropriate for treating the patient as a consequence of the presence of the CAR T cell in the patient.07-23-2015
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