| Patent application number | Description | Published |
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| 20110318983 | FIRE RETARDANT PANEL COMPOSITIONS - A fire retardant structural board is provided that includes a body of fibrous material, a triglycidyle polyester binder, a sodium borate pentahydride fire retardant, and a sodium borate pentahydride fire retardant. The body of fibrous material has a weight, first and second surfaces, first and second sides, and a thickness. The fibrous material and triglycidyle polyester are dispersed throughout the thickness of the body. The sodium borate pentahydride fire retardant is dispersed between individual fibers of the fibrous material and throughout the thickness of the body. A sodium borate pentahydride fire retardant composition also coats at least the first surface of the body. | 12-29-2011 |
| 20120064329 | Methods of Making Fire Retardant Panel Compositions - A fire retardant structural board is provided that includes a body of fibrous material, a triglycidyle polyester binder, a sodium borate pentahydride fire retardant, and a sodium borate pentahydride fire retardant. The body of fibrous material has a weight, first and second surfaces, first and second sides, and a thickness. The fibrous material and triglycidyle polyester are dispersed throughout the thickness of the body. The sodium borate pentahydride fire retardant is dispersed between individual fibers of the fibrous material and throughout the thickness of the body. A sodium borate pentahydride fire retardant composition also coats at least the first surface of the body. | 03-15-2012 |
| Patent application number | Description | Published |
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| 20100082912 | SYSTEMS AND METHODS FOR RESOURCE ACCESS - Systems and methods are provided to manage access to computing resources. More specifically, certain embodiments are described in which a resource or resource consumer can engage access controls or request that access controls be engaged if the age of a request exceeds one or more thresholds. For example, a requester may, after the age of a request meets or exceeds a threshold, indicate to a destination that a control should be engaged. | 04-01-2010 |
| 20100153799 | METHOD AND APPARATUS FOR LOOPBACK SELF TESTING - A system and method for loopback self testing. A system includes a host device and an endpoint device. The host device transmits unencoded test symbols. The endpoint device loops back the unencoded test symbols to the host device. The host device drives at least some bits of each unencoded test symbol onto host device data signals and drives at least some bits of each unencoded test symbol onto host device control signals. | 06-17-2010 |
| 20110179423 | MANAGING LATENCIES IN A MULTIPROCESSOR INTERCONNECT - In a computing system having a plurality of transaction source nodes issuing transactions into a switching fabric, an underserviced node notifies source nodes in the system that it needs additional system bandwidth to timely complete an ongoing transaction. The notified nodes continue to process already started transactions to completion, but stop the introduction of new traffic into the fabric until such time as the underserviced node indicates that it has progressed to a preselected point. | 07-21-2011 |
| 20130188647 | COMPUTER SYSTEM FABRIC SWITCH HAVING A BLIND ROUTE - A fabric switch includes ports, a blind route determination function component, a location function component, and a routing function component. Packets are received and forwarded via the ports. The blind route determination function component determines whether a port at which a packet is received is configured for a blind route, the location function component provides for determining a location of routing information within the packet based at least in part on the input port at which the packet was received if a blind route is not defined for the port. The routing function component provides for determining an output port as a routing function based at least in part on the contents of the location, or the existence of a blind route. | 07-25-2013 |
| 20140324746 | TRAINING SEQUENCE - A computing system can include a memory controller and a first storage device. The first storage device is to receive a serially encoded request and forward the serially encoded request to a second storage device before deserializing the serially encoded request. The first storage device is also to return a training sequence from the target storage device to the memory controller. The first storage device is additionally to return a response from the target storage device to the memory controller. | 10-30-2014 |
| 20150039873 | PROCESSOR PROVIDING MULTIPLE SYSTEM IMAGES - An example processor includes a plurality of processing core components, one or more memory interface components, and a management component, wherein the one or more memory interface components are each shared by the plurality of processing core components, and wherein the management component is configured to assign each of the plurality of processing core components to one of a plurality of system images. | 02-05-2015 |
| Patent application number | Description | Published |
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| 20120070940 | FIXTURE TO CONSTRAIN LAMINATE AND METHOD OF ASSEMBLY - A fixture assembly and method of forming a chip assembly is provided. The fixture assembly includes a first plate having an opening sized to accommodate a chip mounted on a laminate. The fixture assembly further includes a second plate mated to the first plate by at least one mechanical fastening mechanism. The fixture assembly further includes a space defined by facing surfaces of the first plate and the second plate and confined by a raised stepped portion of at least one of the first plate and the second plate. The space is coincident with the opening. The space is sized and shaped such that the laminate is confined within the space and directly abuts the stepped portion and the facing surfaces of the first plate and the second plate to be confined in X, Y and Z directions. | 03-22-2012 |
| 20120187180 | FIXTURE TO CONSTRAIN LAMINATE AND METHOD OF ASSEMBLY - A fixture assembly and method of forming a chip assembly is provided. The fixture assembly includes a first plate having an opening sized to accommodate a chip mounted on a laminate. The fixture assembly further includes a second plate mated to the first plate by at least one mechanical fastening mechanism. The fixture assembly further includes a space defined by facing surfaces of the first plate and the second plate and confined by a raised stepped portion of at least one of the first plate and the second plate. The space is coincident with the opening. The space is sized and shaped such that the laminate is confined within the space and directly abuts the stepped portion and the facing surfaces of the first plate and the second plate to be confined in X, Y and Z directions. | 07-26-2012 |
| 20140197228 | FIXTURE TO CONSTRAIN LAMINATE AND METHOD OF ASSEMBLY - A fixture assembly and method of forming a chip assembly is provided. The fixture assembly includes a first plate having an opening sized to accommodate a chip mounted on a laminate. The fixture assembly further includes a second plate mated to the first plate by at least one mechanical fastening mechanism. The fixture assembly further includes a space defined by facing surfaces of the first plate and the second plate and confined by a raised stepped portion of at least one of the first plate and the second plate. The space is coincident with the opening. The space is sized and shaped such that the laminate is confined within the space and directly abuts the stepped portion and the facing surfaces of the first plate and the second plate to be confined in X, Y and Z directions. | 07-17-2014 |
| 20150077944 | MULTICHIP MODULE WITH STIFFENING FRAME AND ASSOCIATED COVERS - A multichip module includes a carrier, a stiffening frame, a plurality of semiconductor chips, and a plurality of covers. The carrier has a top surface and a bottom surface configured to be electrically connected to a motherboard. The stiffening frame includes a plurality of openings that accept the plurality of semiconductor chips and may be attached to the top surface of the carrier with an adhesive that absorbs dimensional changes between the stiffening frame and the carrier. The semiconductor chips are concentrically arranged within the plurality of openings of the stiffening frame and the plurality of covers are attached to the stiffening frame so as to enclose the plurality of openings. | 03-19-2015 |
