Gopalan, CA
Abishek Gopalan, San Jose, CA US
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20150244647 | SYSTEMS, APPARATUS, AND METHODS FOR NON-BLOCKING SWITCH NETWORKS - A switch network may include a plurality of switch stages arranged in sequential stages. The plurality of switch stages may include a first switch stage connected to a plurality of inputs, a second switch stage connected to each switch in the first switch stage, a third switch connected to each switch in the second switch stage, a fourth switch stage connected to each of the switches in the third switch stage, and a fifth switch stage connected to a plurality of outputs and each switch in the fourth switch stage, and a control element configured to control each of the plurality of switch stages for routing a signal from one of the plurality of inputs to one of the plurality of outputs. | 08-27-2015 |
Anand Gopalan, San Mateo, CA US
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20090157340 | Method and system for yield enhancement - Aspects of the disclosure provide a method for calibrating a circuit performance. The method can stabilize the circuit performance over time, and maintain the circuit performance substantially in a specification independent of various variation sources. Therefore, chip reliability can be improved and high product yield can be achieved. The method for calibrating the circuit performance can include assigning levels to a set of circuit parameters of a circuit, measuring values of the circuit parameters during operation of the circuit, generating a control signal that corresponds to the measured circuit parameters weighted according to the assigned levels, and adjusting a feedback relationship of a feedback loop circuit of the circuit in a close loop feedback system according to the control signal so as to change the circuit performance. | 06-18-2009 |
Anand Gopalan, San Jose, CA US
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20140266440 | OFFSET CANCELLATION WITH MINIMUM NOISE IMPACT AND GAIN-BANDWIDTH DEGRADATION - A system for cancelling offset includes a gain circuit. The gain circuit may include a transistor circuit connected to a pair of input nodes and configured to convert an input signal to an output signal so that the output signal has a gain compared with the input signal. The gain circuit also may include a pair of output nodes configured to receive the output signal from the transistor circuit. The gain circuit is configured to cause a voltage change at one of the output nodes relative to another output node, in response to the gain circuit receiving a feedback offset correction signal. This effectively cancels at least a portion of an offset in the output signal | 09-18-2014 |
Anand Gopalan, Belmont, CA US
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20130222067 | PHASE-LOCKED LOOP - A PLL circuit includes an oscillator, a detection block, an integral path and a proportional path. The oscillator generates an oscillation signal. The detection block detects a phase difference between the oscillation signal and a reference signal and generates an integral signal that represents an integral value of the phase difference and a proportional signal that represents a current value of the phase difference. The integral path includes a regulator that receives the integral signal and supplies a regulated integral signal to the oscillator, and the regulator has a feedback loop including an error amplifier. The proportional path supplies the proportional signal, separately from the integral signal, to the oscillator. The oscillator generates the oscillation signal having an oscillation frequency controlled by both of the regulated integral signal and the proportional signal such that the phase of the oscillation signal is locked to the phase of the reference signal. | 08-29-2013 |
Arvind Gopalan, Santa Clara, CA US
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20130091065 | AUTOMATIC SPIKE LICENSING - A license for one or more services may include a certain service capacity under the license. The services may be provided under the license within the service capacity. When there is a spike in service requests, the services requested may exceeds the service capacity under the license. It may be determined that the license includes a spike provision that allows for requested services to be provided in excess of the service capacity under the license. The spike provision may be activated so that the requested services in excess of the service capacity under the license are provided under the spike provision | 04-11-2013 |
Badri P. Gopalan, Santa Clara, CA US
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20120227022 | Technique For Honoring Multi-Cycle Path Semantics In RTL Simulation - An enhanced RTL simulation including information regarding multi-cycle paths is provided. The multi-cycle path information, which is available in the design constraint file, can be used for timing analysis during RTL simulation. This information can advantageously augment the RTL simulation engine to approximate the cycle delays at the destination registers, thereby providing a more realistic approximation of circuit behavior at the RTL level. Notably, RTL simulation is orders of magnitude faster than gate level simulation. Moreover, design bugs associated with multi-cycle paths are more easily corrected during RTL simulation compared to waiting until the gate level simulation. | 09-06-2012 |
Banu Gopalan, San Diego, CA US
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20120227131 | Transgenic plants with enhanced agronomic traits - This invention provides transgenic plant cells with recombinant DNA for expression of proteins that are useful for imparting enhanced agronomic trait(s) to transgenic crop plants. This invention also provides transgenic plants and progeny seed comprising the transgenic plant cells where the plants are selected for having an enhanced trait selected from the group of traits consisting of enhanced water use efficiency, enhanced cold tolerance, increased yield, enhanced nitrogen use efficiency, enhanced seed protein and enhanced seed oil. Also disclosed are methods for manufacturing transgenic seed and plants with enhanced traits. | 09-06-2012 |
Chakku Gopalan, Santa Clara, CA US
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20080308781 | STRUCTURE AND PROCESS FOR A RESISTIVE MEMORY CELL WITH SEPARATELY PATTERNED ELECTRODES - Methods of making MIM structures and the resultant MIM structures are provided. The method involves forming a top electrode layer over a bottom electrode and an insulator on a substrate and forming a top electrode by removing portions of the top electrode layer. The bottom electrode, insulator, or combination thereof is isolated from the top electrode forming process, thereby mitigating damage to the resultant metal-insulator-metal structure. The resultant MIM structure can be a portion of a resistive memory cell. | 12-18-2008 |
Chakravarthy Gopalan, Santa Clara, CA US
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20090067213 | Method of forming controllably conductive oxide - In fabricating a memory device, a first electrode is provided. An alloy is formed thereon, and the alloy is oxidized to provide an oxide layer. A second electrode is provided on the oxide layer. In a further method of fabricating a memory device, a first electrode is provided. Oxide is provided on the first electrode, and an implantation step in undertaken to implant material in the oxide to form a layer including oxide and implanted material having an oxygen deficiency and/or defects therein. A second electrode is then formed on the layer. | 03-12-2009 |
20120313071 | CONTACT STRUCTURE AND METHOD FOR VARIABLE IMPEDANCE MEMORY ELEMENT - A memory element can include an opening formed within at least one insulating layer formed on an etch stop layer that exposes a first electrode portion and the etch stop layer at a bottom of the opening; a second electrode portion, formed on at least a side surface of the opening and in contact with the first electrode portion, the second electrode portion not filling the opening and being substantially not formed over a top surface of the at least one insulating layer; and at least one memory layer formed on a top surface of the at least one insulating layer and in contact with the second electrode portion, the at least one memory layer being reversibly programmable between at least two impedance states. Methods of forming such memory elements are also disclosed. | 12-13-2012 |
20130062587 | Resistive Switching Devices Having Alloyed Electrodes And Methods of Formation Thereof - In accordance with an embodiment of the present invention, a resistive switching device comprises a bottom electrode, a switching layer disposed over the bottom electrode, and a top electrode disposed over the switching layer. The top electrode comprises an alloy of a memory metal and an alloying element. The top electrode provides a source of the memory metal. The memory metal is configured to change a state of the switching layer. | 03-14-2013 |
20130214234 | Resistive Switching Devices and Methods of Formation Thereof - In accordance with an embodiment of the present invention, a resistive switching device includes an opening disposed within a first dielectric layer, a conductive barrier layer disposed on sidewalls of the opening, a fill material including an inert material filling the opening. A solid electrolyte layer is disposed over the opening. The solid electrolyte contacts the fill material but not the conductive barrier layer. A top electrode is disposed over the solid electrolyte. | 08-22-2013 |
20130285004 | SOLID ELECTROLYTE MEMORY ELEMENTS WITH ELECTRODE INTERFACE FOR IMPROVED PERFORMANCE - A memory element can include a first electrode; a second electrode; and a memory material programmable between different resistance states, the memory material disposed between the first electrode and the second electrode and comprising a solid electrolyte with at least one modifier element formed therein; wherein the first electrode is an anode electrode that includes an anode element that is ion conductible in the solid electrolyte, the anode element being different than the modifier element. | 10-31-2013 |
20140293676 | PROGRAMMABLE IMPEDANCE MEMORY ELEMENTS AND CORRESPONDING METHODS - A memory element programmable between different impedance states can include a first electrode; a switching layer formed in contact with the first electrode and including at least one metal oxide; and a buffer layer in contact with the switching layer. A buffer layer can include a first metal, tellurium, a third element, and a second metal distributed within the buffer layer. A second electrode can be in contact with the buffer layer. | 10-02-2014 |
20150144857 | METHOD OF FORMING CONTROLLABLY CONDUCTIVE OXIDE - In fabricating a memory device, a first electrode is provided. An alloy is formed thereon, and the alloy is oxidized to provide an oxide layer. A second electrode is provided on the oxide layer. In a further method of fabricating a memory device, a first electrode is provided. Oxide is provided on the first electrode, and an implantation step in undertaken to implant material in the oxide to form a layer including oxide and implanted material having an oxygen deficiency and/or defects therein. A second electrode is the formed on the layer. | 05-28-2015 |
Gayatri Gopalan, Sunnyvale, CA US
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20100238598 | Electrostatic Discharge Power Clamp Trigger Circuit Using Low Stress Voltage Devices - Embodiments of an IC protection circuit that protects low voltage supply transistors and circuits within the IC from excessive power supply levels and ESD events are described. A protection circuit situated between the IO pins of the IC and the internal circuitry of the IC includes a voltage drop network and a plurality of shunt circuits to protect the IC against excessive supply voltages and ESD voltages. Each shunt circuit includes an RC trigger stage and an NMOS shunt stage that are made using low-voltage devices. A protection circuit of the embodiments includes a high voltage IO pin interface, a voltage drop network coupled to the IO pin and comprising a plurality of forward-biased diodes connected in series to drop a high voltage on the IO pin to a low voltage level, an NMOS shunt transistor coupled between the voltage drop network and a ground terminal, and a trigger circuit coupled to the NMOS shunt transistor to activate the shunt transistor when a sensed input voltage rise time is shorter than a defined supply voltage rise time. | 09-23-2010 |
20100238599 | Power Supply Equalization Circuit Using Distributed High-Voltage and Low-Voltage Shunt Circuits - Embodiments of an IC protection circuit that protects low voltage supply transistors and circuits within the IC from excessive power supply levels and ESD events are described. A protection circuit situated between the IO pins of the IC and the internal circuitry of the IC includes a voltage drop network and a plurality of shunt circuits to protect the IC against excessive supply voltages and ESD voltages, or other excessive current conditions. Each shunt circuit includes an RC trigger stage and an NMOS shunt stage that are made using low-voltage devices. A protection circuit of the embodiments includes a high voltage IO pin, a voltage drop network to drop a high voltage on the IO pin to a low voltage level on a floating voltage rail, a first shunt circuit coupled between the floating supply rail and ground, an equalizer circuit coupled between the floating supply rail and a low voltage supply rail, and a second shunt circuit coupled to the equalizer circuit through the low voltage supply rail. | 09-23-2010 |
Giri Gopalan, Saratoga, CA US
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20150370723 | System, Apparatus and Method for Prioritizing the Storage of Content Based on a Threat Index - A network sensor that features a data store and a packet processing engine. Communicatively coupled to the data store, the packet processing engine is configured to (i) generate a retention priority for at least a first flow within a first storage region of a plurality of storage regions and (ii) identify, in response to an eviction request, the priority of each of the plurality of storage regions. The priority of the first storage region is partially based on the retention priority associated with the first flow while the priority of a second storage region is based on retention priorities associated with flows stored within the second storage region. The packet processing engine also is configured to identify, through use of the retention priorities of the stored flows within the first storage region, which flows are to be retained and which flows are to be evicted. | 12-24-2015 |
20150372910 | System, Apparatus and Method for Managing Redundancy Elimination in Packet Storage During Observation of Data Movement - A network sensor that features a data store and a packet processing engine. In communication with the data store, the packet processing engine comprises (1) a cache management logic and (2) deduplication logic. The cache management logic is configured to analyze packets to determine whether (a) a packet under analysis include duplicated data and (b) content of the packet is targeted for storage in a same continuous logical storage area as the duplicated data. The deduplication logic, when activated by the cache management logic, is configured to generate a deduplication reference for insertion into the packet prior to storage. | 12-24-2015 |
Giridhara Gopalan, Los Gatos, CA US
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20080250261 | System and method for enabling functionality based on measured power - According to one embodiment of the invention, an apparatus comprises an input port, a measuring circuit and a processor. The measuring circuit is adapted to measure a power parameter associated with power supplied over a communication media to the input port. The processor includes a plurality of logic units. Each logic unit is configured to be activated in series to control power usage of the apparatus. | 10-09-2008 |
Giridhara S. Gopalan, Los Gatos, CA US
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20100131694 | Secure Boot ROM Emulation - Secure boot ROM emulation with locking storage device. A locking storage device is provided by combining a nonvolatile memory device such as flash or EEPROM with one-shot locking logic which write enables at least a portion of the nonvolatile memory device upon power cycling of the overall digital device. This write enable is cleared during the stage 1 bootloader process, thus providing a protected update interval for updating a stage 2 bootloader once per power cycle. | 05-27-2010 |
Janakiraman Gopalan, Cupertino, CA US
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20130124578 | COLUMN-ORIENTED DATABASE SCHEMA FOR DYNAMIC HIERARCHIES - A method and system for a column-oriented database schema for dynamic hierarchies includes a processor ( | 05-16-2013 |
Mahesh Gopalan, Sunnyvale, CA US
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20090307521 | DDR memory controller - A DDR memory controller is described wherein a core domain capture clock is created by programmably delaying the core clock of the memory controller. The delay of this capture clock is calibrated during a power on the initialization sequence in concert with a DDR memory in a system environment, thereby minimizing the effects of system delays and increasing both device and system yield. An additional embodiment also includes programmably delaying the incoming dqs signal. | 12-10-2009 |
Mahesh Gopalan, Milpitas, CA US
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20140281662 | DYNAMICALLY ADAPTIVE BIT-LEVELING FOR DATA INTERFACES - A circuit and method for implementing a adaptive bit-leveling function in an integrated circuit interface is disclosed. During a calibration operation, a pre-loaded data bit pattern is continuously sent from a sending device and is continuously read from an external bus by a receiving device. A programmable delay line both advances and delays each individual data bit relative to a sampling point in time, and delay counts relative to a reference point in time are recorded for different sampled data bit values, enabling a delay to be determined that best samples a data bit at its midpoint. During the advancing and delaying of a data bit, jitter on the data bit signal may cause an ambiguity in the determination of the midpoint, and solutions are disclosed for detecting jitter and for resolving a midpoint for sampling a data bit even in the presence of the jitter. | 09-18-2014 |
20140281666 | METHODS FOR DYNAMICALLY ADAPTIVE BIT-LEVELING BY INCREMENTAL SAMPLING, JITTER DETECTION, AND EXCEPTION HANDLING - A circuit and method for implementing a adaptive bit-leveling function in an integrated circuit interface is disclosed. During a calibration operation, a pre-loaded data bit pattern is continuously sent from a sending device and is continuously read from an external bus by a receiving device. A programmable delay line both advances and delays each individual data bit relative to a sampling point in time, and delay counts relative to a reference point in time are recorded for different sampled data bit values, enabling a delay to be determined that best samples a data bit at its midpoint. During the advancing and delaying of a data bit, jitter on the data bit signal may cause an ambiguity in the determination of the midpoint, and solutions are disclosed for detecting jitter and for resolving a midpoint for sampling a data bit even in the presence of the jitter. | 09-18-2014 |
20140372787 | METHODS FOR DYNAMICALLY ADAPTIVE BIT-LEVELING BY SWEEP SAMPLING WITH AUTOMATIC JITTER AVOIDANCE - A circuit and method for implementing a adaptive bit-leveling function in an integrated circuit interface is disclosed. During a calibration operation, a pre-loaded data bit pattern is continuously sent from a sending device and is continuously read from an external bus by a receiving device. A programmable delay line both advances and delays each individual data bit relative to a sampling point in time, and delay counts relative to a reference point in time are recorded for different sampled data bit values, enabling a delay to be determined that best samples a data bit at its midpoint. During the advancing and delaying of a data bit, jitter on the data bit signal may cause an ambiguity in the determination of the midpoint, and solutions are disclosed for detecting jitter and for resolving a midpoint for sampling a data bit even in the presence of the jitter. | 12-18-2014 |
Parikshit Gopalan, Sunnyvale, CA US
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20130054549 | CLOUD DATA STORAGE USING REDUNDANT ENCODING - Cloud data storage systems, methods, and techniques partition system data symbols into predefined-sized groups and then encode each group to form corresponding parity symbols, encode all data symbols into global redundant symbols, and store each symbol (data, parity, and redundant) in different failure domains in a manner that ensures independence of failures. In several implementations, the resultant cloud-encoded data features both data locality and ability to recover up to a predefined threshold tolerance of simultaneous erasures (unavailable data symbols) without any information loss. In addition, certain implementations also feature the placement of cloud-encoded data in domains (nodes or node groups) to provide similar locality and redundancy features simultaneous with the recovery of an entire domain of data that is unavailable due to software or hardware upgrades or failures. | 02-28-2013 |
20140101366 | WRITING MEMORY BLOCKS USING CODEWORDS - A generator matrix is provided to generate codewords from messages of write operations. Rather than generate a codeword using the entire generator matrix, some number of bits of the codeword are determined to be, or designated as, stuck bits. One or more submatrices of the generator matrix are determined based on the columns of the generator matrix that correspond to the stuck bits. The submatrices are used to generate the codeword from the message, and only the bits of the codeword that are not the stuck bits are written to a memory block. By designating one or more bits as stuck bits, the operating life of the bits is increased. Some of the submatrices of the generator matrix may be pre-computed for different stuck bit combinations. The pre-computed submatrices may be used to generate the codewords, thereby increasing the performance of write operations. | 04-10-2014 |
20140351501 | MESSAGE STORAGE IN MEMORY BLOCKS USING CODEWORDS - A codeword is generated from a message. One or more anchor values are appended to the codeword at predetermined anchor positions. Before the codeword is stored in a memory block, the locations and values of stuck cells in the memory block are determined. Based on the values and positions of the stuck cells, the values of the codeword are remapped so that values of the codeword that are the same as the values of the stuck cells are placed at the positions of the stuck cells. The remapped codeword is stored in the memory block. When the message is later read, the original codeword can be recovered from the remapped codeword based on the locations of the anchor values in the remapped codeword. | 11-27-2014 |
Parikshit S. Gopalan, Mountain View, CA US
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20140310571 | Local Erasure Codes for Data Storage - In some examples, an erasure code can be implemented to provide for fault-tolerant storage of data. Maximally recoverable cloud codes, resilient cloud codes, and robust product codes are examples of different erasure codes that can be implemented to encode and store data. Implementing different erasure codes and different parameters within each erasure code can involve trade-offs between reliability, redundancy, and locality. In some examples, an erasure code can specify placement of the encoded data on machines that are organized into racks. | 10-16-2014 |
20150033064 | SELF-IDENTIFYING MEMORY ERRORS - A memory region can durably self-identify as being faulty when read. Information that would have been assigned to the faulty memory region can be assigned to another of that sized region in memory using a replacement encoding technique. For phase change memory, at least two fault states can be provided for durably self-identifying a faulty memory region; one state at a highest resistance range and the other state at a lowest resistance range. Replacement cells can be used to shift or assign data when a self-identifying memory fault is present. A memory controller and memory module, alone or in combination may manage replacement cell use and facilitate driving a newly discovered faulty cell to a fault state if the faulty cell is not already at the fault state. | 01-29-2015 |
Parikshit Santhan Gopalan, Mountain View, CA US
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20140380126 | ERASURE CODING ACROSS MULTIPLE ZONES AND SUB-ZONES - In various embodiments, methods and systems for erasure coding data across multiple storage zones are provided. This may be accomplished by dividing a data chunk into a plurality of sub-fragments. Each of the plurality of sub-fragments is associated with a zone. Zones comprise buildings, data centers, and geographic regions providing a storage service. A plurality of reconstruction parities is computed. Each of the plurality of reconstruction parities computed using at least one sub-fragment from the plurality of sub-fragments. The plurality of reconstruction parities comprises at least one cross-zone parity. The at least one cross-zone parity is assigned to a parity zone. The cross-zone parity provides cross-zone reconstruction of a portion of the data chunk. | 12-25-2014 |
Parikshit Santhana Gopalan, Mountain View, CA US
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20140380125 | ERASURE CODING ACROSS MULTIPLE ZONES - In various embodiments, methods and systems for erasure coding data across multiple storage zones are provided. This may be accomplished by dividing a data chunk into a plurality of sub-fragments. Each of the plurality of sub-fragments is associated with a zone. Zones comprise buildings, data centers, and geographic regions providing a storage service. A plurality of reconstruction parities is computed. Each of the plurality of reconstruction parities computed using at least one sub-fragment from the plurality of sub-fragments. The plurality of reconstruction parities comprises at least one cross-zone parity. The at least one cross-zone parity is assigned to a parity zone. The cross-zone parity provides cross-zone reconstruction of a portion of the data chunk. | 12-25-2014 |
Periya Gopalan, San Jose, CA US
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20140273762 | Polishing Pad with Secondary Window Seal - A polishing article has a polishing surface and an aperture, the aperture including a first section and a second section. The polishing article includes a projection extending inwardly into the aperture. The polishing article includes a lower portion on a side of the first surface farther from the polishing surface. A window has a first portion positioned in the first section of the aperture and a second portion extending into the second section of the aperture. The window has a second surface substantially parallel to the polishing surface. A first adhesive adheres the first surface of the projection to the second surface of the window to secure the window to the projection and a second adhesive of different material composition than the first adhesive. The second adhesive is positioned laterally between the second portion of the window and the lower portion of the polishing article. | 09-18-2014 |
20150126099 | PRINTED CHEMICAL MECHANICAL POLISHING PAD HAVING ABRASIVES THEREIN - A method of fabricating a polishing layer of a polishing pad includes determining a desired distribution of particles to be embedded within a polymer matrix of the polishing layer. A plurality of layers of the polymer matrix is successively deposited with a 3D printer, each layer of the plurality of layers of polymer matrix being deposited by ejecting a polymer matrix precursor from a nozzle. A plurality of layers of the particles is successively deposited according to the desired distribution with the 3D printer. The polymer matrix precursor is solidified into a polymer matrix having the particles embedded in the desired distribution. | 05-07-2015 |
20150126100 | Polishing Pad with Secondary Window Seal - A polishing article has a polishing surface and an aperture, the aperture including a first section and a second section. The polishing article includes a projection extending inwardly into the aperture. The polishing article includes a lower portion on a side of the first surface farther from the polishing surface. A window has a first portion positioned in the first section of the aperture and a second portion extending into the second section of the aperture. The window has a second surface substantially parallel to the polishing surface. A first adhesive adheres the first surface of the projection to the second surface of the window to secure the window to the projection and a second adhesive of different material composition than the first adhesive. The second adhesive is positioned laterally between the second portion of the window and the lower portion of the polishing article. | 05-07-2015 |
Rahul Gopalan, Sunnyvale, CA US
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20140056145 | DEVICE AND METHOD FOR ADAPTIVE RATE MULTIMEDIA COMMUNICATIONS ON A WIRELESS NETWORK - Methods, apparatus, and computer readable media may adjust an encoding rate based on network conditions between a transmitter and a receiver. Either the transmitter, receiver, or both the transmitter and receiver may determine the encoding rate. In one aspect, a ratio of received network data to transmitted network data is determined. An encoding parameter is then determined based on the determined ratio. In one aspect, the encoding parameter may be used to adjust an encoder. In another aspect, the determined encoding parameter may be transmitted to an encoding or transmitting node. In another aspect, an amount of data buffered in a network is determined. A sustainable throughput of the network is also determined. A transmission rate is then determined based on the sustainable throughput and the amount of data buffered. An encoding parameter is then adjusted based on the transmission rate. | 02-27-2014 |
20140056162 | DEVICE AND METHOD FOR ADAPTIVE RATE MULTIMEDIA COMMUNICATIONS ON A WIRELESS NETWORK - Methods, apparatus, and computer readable media may adjust an encoding rate based on network conditions between a transmitter and a receiver. Either the transmitter, receiver, or both the transmitter and receiver may determine the encoding rate. In one aspect, a ratio of received network data to transmitted network data is determined. An encoding parameter is then determined based on the determined ratio. In one aspect, the encoding parameter may be used to adjust an encoder. In another aspect, the determined encoding parameter may be transmitted to an encoding or transmitting node. In another aspect, an amount of data buffered in a network is determined. A sustainable throughput of the network is also determined. A transmission rate is then determined based on the sustainable throughput and the amount of data buffered. An encoding parameter is then adjusted based on the transmission rate. | 02-27-2014 |
20140059167 | DEVICE AND METHOD FOR ADAPTIVE RATE MULTIMEDIA COMMUNICATIONS ON A WIRELESS NETWORK - Methods, apparatus, and computer readable media may adjust an encoding rate based on network conditions between a transmitter and a receiver. Either the transmitter, receiver, or both the transmitter and receiver may determine the encoding rate. In one aspect, a ratio of received network data to transmitted network data is determined. An encoding parameter is then determined based on the determined ratio. In one aspect, the encoding parameter may be used to adjust an encoder. In another aspect, the determined encoding parameter may be transmitted to an encoding or transmitting node. In another aspect, an amount of data buffered in a network is determined. A sustainable throughput of the network is also determined. A transmission rate is then determined based on the sustainable throughput and the amount of data buffered. An encoding parameter is then adjusted based on the transmission rate. | 02-27-2014 |
20140071819 | DEVICE AND METHOD FOR ADAPTIVE RATE MULTIMEDIA COMMUNICATIONS ON A WIRELESS NETWORK - Methods, apparatus, and computer readable media determine a transmission rate. In some aspects, a method includes determining, via an electronic device, an amount of data buffered in a network, determining a sustainable throughput of the network; and determining a transmission rate based at least in part on the sustainable throughput and the amount of data buffered. | 03-13-2014 |
Rama Gopalan, San Jose, CA US
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20140236889 | SITE-BASED SEARCH AFFINITY - According to various embodiments, techniques are described for managing data within a multi-site clustered data intake and query system. A data intake and query system as described herein generally refers to a system for collecting, retrieving, and analyzing data. In this context, a clustered data intake and query system generally refers to a system environment that is configured to provide data redundancy and other features that improve the availability of data stored by the system. For example, a clustered data intake and query system may be configured to store multiple copies of data stored by the system across multiple components such that recovery from a failure of one or more of the components is possible by using copies of the data stored elsewhere in the cluster. | 08-21-2014 |
Rama Gopalan, San Francisco, CA US
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20150339308 | MANAGING SITE-BASED SEARCH CONFIGURATION DATA - Techniques are described for managing data within a multi-site clustered data intake and query system. A data intake and query system as described herein generally refers to a system for collecting, retrieving, and analyzing data. In this context, a clustered data intake and query system generally refers to a system environment that is configured to provide data redundancy and other features that improve the availability of data stored by the system. For example, a clustered data intake and query system may be configured to store multiple copies of data stored by the system across multiple components such that recovery from a failure of one or more of the components is possible by using copies of the data stored elsewhere in the cluster. | 11-26-2015 |
Ravi Gopalan, San Diego, CA US
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20120120860 | POWER OPTIMIZED DEMODULATOR FRONT END (DEMFRONT) RECEIVER SUBSYSTEM - In a cellular communication system, apparatus and methods relating to a power-optimized demodulator front end (demfront) receiver subsystem of a user equipment (UE) can reduce power utilization by optimizing the operation of the demfront receiver subsystem. For example, in an aspect, the apparatus and methods include enabling a first receiver of a device for receiving a control channel on a downlink from a node, determining that the control channel schedules the device to receive data on the downlink, enabling a second receiver of the device that consumes more power than the first receiver to receive the data on the downlink, and re-enabling the first receiver for receiving the control channel on the downlink subsequent to receiving the data. | 05-17-2012 |
20130170416 | METHOD AND APPARATUS FOR POWER AWARE RECEIVE DIVERSITY CONTROL - While a user equipment (UE) is in a connected mode, the UE may receive only a limited quantity of data. During this phase, a receive diversity configuration may not be enabled, in an effort to conserve power on the UE side. However, in marginal signal conditions and a poor radio environment, downlink performance at the UE side may be enhanced by enabling receive diversity, irrespective of the limited data received by the UE. However, while receive diversity may improve the signal-to-noise ratio (SNR) at the UE end in marginal signal conditions, the UE may also incur a penalty on power consumption. Therefore, certain aspects of the present disclosure provide techniques for dynamically controlling the receive diversity of a wireless device to improve the downlink procedure performance, while minimizing power consumption due to the usage of a second receive chain when in connected mode. | 07-04-2013 |
20130273915 | METHOD AND APPARATUS FOR EXPEDITED WIRELESS DEVICE HANDOVER - The present disclosure presents a method and apparatus for expedited mobile device handover that include performing one or more handover tasks in parallel that have previously been performed exclusively in serial. For example, the disclosure presents a method for wireless device handover, which may include acquiring a target cell, ascertaining a system frame number (SFN) of the target cell, calculating a connection frame number (CFN) for a dedicated channel (DCH) transmission, and reconfiguring a dedicated physical channel (DPCH) based on the calculated CFN. In addition, such an example method may include, while performing at least one of the ascertaining of the SFN, the calculating of the CFN, and the reconfiguring of the DPCH, contemporaneously performing at least one of establishing a downlink dedicated physical channel (DL-DPCH), establishing a synchronization with the target cell, and establishing an uplink dedicated physical channel (UL-DPCH) subsequent to the downlink synchronization. | 10-17-2013 |
20130324179 | METHODS AND APPARATUS FOR SIRE-BASED ULTPC REJECTION - Disclosed are methods and apparatus for rejecting unreliable downlink (DL) transmit power control (TPC) commands based on signal-to-interference-ratio estimates (SIRE). The method includes receiving by a user equipment (UE) a DL transmit power control (TPC) command from a base station; calculating a signal-to-interference ratio estimate (SIRE) for the DL channel; determining a scaling factor for a DLTPC rejection threshold based on the DL channel SIRE; adjusting the DLTPC rejection threshold based on the determined scaling factor; and rejecting or accepting the DLTPC command based on the adjusted DLTPC rejection threshold. | 12-05-2013 |
20130324180 | METHODS AND APPARATUS FOR DLTPC REJECTION IN DOWNLINK WINDUP MODE - Disclosed are methods and apparatus for rejecting unreliable downlink (DL) transmit power control (TPC) commands in windup mode. In one aspect, the method includes receiving by a user equipment (UE) a plurality of DLTPC commands from a base station, analyzing on one or more transmitted uplink (UL) TPC commands, detecting a windup mode based on the one or more DLTPC and ULTPC commands, and rejecting one or more DLTPC down commands in the windup mode. | 12-05-2013 |
20140185591 | POWER CONTROL WITH DYNAMIC TIMING UPDATE - Methods and apparatuses for wireless communication include determining whether to move a receive window by more than a change in an uplink transmit timing of a user equipment (UE). The methods and apparatuses further include moving the receive window by an amount larger than the change in the uplink transmit timing when a determination is made to move the receive window by more than the change in the uplink transmit timing. Moreover, the methods and apparatuses include identifying at least one cell with receive time within the receive window at the UE. | 07-03-2014 |
20140307563 | APPARATUS AND METHODS OF PROCESSING A PROTOCOL DATA UNIT - Methods and apparatus for processing data received at a user equipment comprises determining a protocol data unit (PDU)-specific Layer 1 decoding metric of a Layer 1 decoded PDU. The methods and apparatus further comprises determining whether to perform a Layer 2 decoding of the Layer 1 decoded PDU based on the PDU-specific Layer 1 decoding metric. | 10-16-2014 |
Ravikiran Gopalan, San Diego, CA US
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20100172442 | ACCESS CODE DETECTION AND DC OFFSET-INTERFERENCE CORRECTION - A method for detecting an access code in a receiver that does not require an explicit DC-offset interference correction block, comprising: | 07-08-2010 |
20140073241 | METHODS AND APPARATUS FOR IMPROVING ACQUISITION FOR NFC LOAD MODULATION - Aspects disclosed herein relate to improving acquisition for NFC load modulation. In one example, a communications device is equipped to monitor at least a complex component of load modulation of a carrier signal, detect, using a NFC technology type specific peak detection scheme, a peak associated with at least the complex component, and determine a presence of a packet beginning pattern based on the detected peak. In an aspect, the packet beginning pattern may be associated with a reception of a packet from a target NFC device. | 03-13-2014 |
20140080414 | SYSTEMS AND METHODS FOR COLLISION AVOIDANCE IN NEAR-FIELD COMMUNICATIONS - Systems, methods, and devices for wireless communication are included herein. An aspect of the subject matter described in the disclosure provides a device configured to detect a transmission. The device includes a receiver configured to receive an inductive communication signal having a center frequency. The device further includes an analog-to-digital converter configured to sample the signal at a rate higher than twice the center frequency. The device further includes one or more processors configured to digitally downconvert the signal. The processors are further configured to compare an energy of the downconverted signal to a detection threshold. The device further includes a transmitter configured to selectively transmit a communication based on the comparison. | 03-20-2014 |
20140086292 | SYSTEMS AND METHODS FOR DETECTING DATA COLLISIONS FOR A NEAR FIELD COMMUNICATION SYSTEM - In a wireless near field communication (NFC) system, a target, such as a smart card, can communicate with an initiator, such as a card reader, by load modulating a radio frequency (RF) signal generated by the initiator. When two or more targets load modulate the RF signal generated, “collisions” can occur with the load modulation. Apparatus and methods detect the presence or absence of collisions in a lower layer or physical layer and report the presence of detected collisions to an upper layer for further handling. | 03-27-2014 |
20140133324 | ANT SYNCWORD SPECIFIC ACQUISITION THRESHOLDING - Systems, methods, and devices for determining an acquisition threshold boundary value and applying that boundary value to identify which incoming signals are directed to a device, based on matching the device syncword with the syncword for the incoming signal. For some implementations using ANT protocol, syncwords composed of the last four bits of the preamble and first 14 bits of the network address identify each device. Incoming syncwords are correlated with the device's syncword, and the correlation compared to threshold boundary value which is based on the characteristics of the individual syncword, including syncword bit stream inter-symbol interference. | 05-15-2014 |
20140254724 | DEMODULATING A DATA PACKET BASED ON A DETECTED SYNC WORD - In a particular embodiment, a method includes receiving a first portion of a sync field of a packet at a receiver. The sync field includes the first portion and a second portion. The packet includes the sync field and a payload field. The method includes detecting a sync word associated with the packet. The sync word is detected based on the first portion of the sync field and prior to receiving the second portion of the sync field. The method initiates a demodulation stage of the receiver prior to receiving an initial bit of the payload field. Initiating the demodulation stage prior to receipt of the initial bit of the payload field enables a demodulator to perform initial demodulation activity prior to demodulation of the payload field. Demodulation continues if, after the second portion is received, the entire received sync field matches the detected sync word. | 09-11-2014 |
20150124906 | SYSTEMS AND METHODS FOR IMPROVING COMMUNICATION SENSITIVITY - A method for improving communication sensitivity by a wireless communication device is described. The method includes obtaining a string of bits. The method also includes mapping each bit in the string of bits to a pre-allocated bit pattern to create a series of concatenated pre-allocated bit patterns. The method further includes generating a modulated signal based on the series. The method additionally includes transmitting the modulated signal. | 05-07-2015 |
20150312707 | METHODS AND APPARATUS FOR IMPROVING ACQUISITION FOR NFC LOAD MODULATION - Aspects disclosed herein relate to improving acquisition for NFC load modulation. In one example, a communications device is equipped to monitor at least a complex component of load modulation of a carrier signal, detect, using a NFC technology type specific peak detection scheme, a peak associated with at least the complex component, and determine a presence of a packet beginning pattern based on the detected peak. In an aspect, the packet beginning pattern may be associated with a reception of a packet from a target NFC device. | 10-29-2015 |
20150358188 | JOINT DEMODULATING AND DEMAPPING OF DIGITAL SIGNAL - A method of joint demodulating and demapping of a digital signal includes receiving a first sequence of the digital signal. The digital signal has a pattern in which a norm of an ideal transmitted sequence of symbols for zero is equal to a norm of an ideal transmitted sequence of symbols for one. The method also includes defining a portion of the first sequence as a third sequence, determining, for each element of a set of the third sequence, one of a real part of a value or an imaginary part of the value of the element, calculating a value for a combination of the determined one of the real part of the value or the imaginary part of the value for the each element of the set, and setting a bit equal to one in response to the value for the combination being less than zero. | 12-10-2015 |
Ravikiran Gopalan, San Deigo, CA US
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20140062588 | SYSTEM AND METHOD TO DEMODULATE A LOAD MODULATED SIGNAL - A method includes demodulating a load modulated signal at an initiator device based at least partially on a phase adjusted comparison value corresponding to the load modulated signal. | 03-06-2014 |
Santosh Gopalan, San Diego, CA US
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20110059748 | SYSTEMS AND METHODS FOR LOCALIZED WIRELESS NOTIFICATION - Implementations relate to systems and methods for localized notification that provide localized information to one or more mobile devices in a wireless communication system that are located in one or more geographical regions. The wireless communication system includes a localized notification server that responds to geographically-targeted broadcast requests and localized service or information requests. The localized notification server localizes components of the wireless communication system into sets of localized components that provide wireless communication service to mobile devices in the specific geographical regions. | 03-10-2011 |
20130079034 | SYSTEMS AND METHODS FOR LOCALIZED WIRELESS NOTIFICATION - Implementations relate to systems and methods for localized notification that provide localized information to one or more mobile devices in a wireless communication system that are located in one or more geographical regions. The wireless communication system includes a localized notification server that responds to geographically-targeted broadcast requests and localized service or information requests. The localized notification server localizes components of the wireless communication system into sets of localized components that provide wireless communication service to mobile devices in the specific geographical regions. | 03-28-2013 |
20140364152 | SYSTEMS AND METHODS FOR LOCALIZED WIRELESS NOTIFICATION - Implementations relate to systems and methods for localized notification that provide localized information to one or more mobile devices in a wireless communication system that are located in one or more geographical regions. The wireless communication system includes a localized notification server that responds to geographically-targeted broadcast requests and localized service or information requests. The localized notification server localizes components of the wireless communication system into sets of localized components that provide wireless communication service to mobile devices in the specific geographical regions. | 12-11-2014 |
Sriram Gopalan, Santa Clara, CA US
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20140040196 | System and Method for Event-Based Synchronization of Remote and Local File Systems - A method for synchronizing a file system (FS) and a remote file system (RFS) includes monitoring the FS for FS events, generating FS event records, receiving RFS event records of RFS events, generating file system operations (FSOs) based on the FS and RFS event records, and communicating the FSOs to the FS and RFS to synchronize them. A method for generating the FSOs includes accessing a plurality of FS and/or RFS event records, processing the accessed records to generate processed event records, generating the FSOs based on the processed event records, and outputting the FSOs to cause synchronization of the FS and RFS. Systems are also described. The invention facilitates event-based, steady-state synchronization of local and remote file systems. | 02-06-2014 |
20140040197 | System and Method for Event-Based Synchronization of Remote and Local File Systems - A method for synchronizing a file system (FS) and a remote file system (RFS) includes monitoring the FS for FS events, generating FS event records, receiving RFS event records of RFS events, generating file system operations (FSOs) based on the FS and RFS event records, and communicating the FSOs to the FS and RFS to synchronize them. A method for generating the FSOs includes accessing a plurality of FS and/or RFS event records, processing the accessed records to generate processed event records, generating the FSOs based on the processed event records, and outputting the FSOs to cause synchronization of the FS and RFS. Systems are also described. The invention facilitates event-based, steady-state synchronization of local and remote file systems. | 02-06-2014 |
Sriram Gopalan, Foster City, CA US
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20110078213 | TECHNIQUES FOR MANAGING FUNCTIONALITY CHANGES OF AN ON-DEMAND DATABASE SYSTEM - In accordance with embodiments, there are provided techniques for managing functionality changes of an on-demand database system. The techniques facilitate implementing changes to the database system while minimize work flow reductions to users of the database system. To that end, one embodiment of the present invention delays implementation of the changes to provide users of the system an opportunity to adjust behavioral interaction with the database. In accordance with another embodiment of the present invention, users may implement the functional changes to determine any adverse impact on work flow, before the functional changes become permanent. In another embodiment, the user may be afforded an opportunity to selectively enable and disable the functionality changes before the duration expires. | 03-31-2011 |
Sujatha Srinivasa Gopalan, Foster City, CA US
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20120159463 | METHOD AND SYSTEM FOR CREATING, APPLYING, AND REMOVING A SOFTWARE FIX - Embodiments of the present disclosure involve a method for creating, applying, and removing a software fix for an application without terminating the application. To create the fix, the system converts an unresolved internal reference in a source code section to an external imported reference, generates a header file which includes a re-definition of the external imported reference, and generates a binary representation for the fix by compiling the source code section using the generated header file and linking the complied object. To apply the fix, the system loads the binary representation into a virtual address space, places a long jump operator in a compiler-generated padding prior to the start of an affected function, and replaces a no-operation prologue at the start of the function with a short jump operator in an atomic write operation. To remove the fix, the system replaces the short jump operator with the no-operation prologue, removes the long jump operator, and unloads the software fix. | 06-21-2012 |
Sunita Gopalan, Richmond, CA US
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20150064790 | ENGINEERED ZINC FINGER PROTEINS TARGETING 5-ENOLPYRUVYL SHIKIMATE-3-PHOSPHATE SYNTHASE GENES - The present disclosure relates to engineered zinc finger proteins that target 5-enolpyruvyl shikimate-3-phosphate synthase (EPSPS) genes in plants and methods of using such zinc finger proteins in modulating gene expression, gene inactivation, and targeted gene modification. In particular, the disclosure pertains to zinc finger nucleases for targeted cleavage and alteration of EPSPS genes. | 03-05-2015 |
Sunita Gopalan, Alameda, CA US
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20090205083 | Engineered zinc finger proteins targeting 5-enolpyruvyl shikimate-3-phosphate synthase genes - The present disclosure relates to engineered zinc finger proteins that target 5-enolpyruvyl shikimate-3-phosphate synthase (EPSPS) genes in plants and methods of using such zinc finger proteins in modulating gene expression, gene inactivation, and targeted gene modification. In particular, the disclosure pertains to zinc finger nucleases for targeted cleavage and alteration of EPSPS genes. | 08-13-2009 |
20130145503 | ENGINEERED ZINC FINGER PROTEINS TARGETING 5-ENOLPYRUVYL SHIKIMATE-3-PHOSPHATE SYNTHASE GENES - The present disclosure relates to engineered zinc finger proteins that target 5-enolpyruvyl shikimate-3-phosphate synthase (EPSPS) genes in plants and methods of using such zinc finger proteins in modulating gene expression, gene inactivation, and targeted gene modification. In particular, the disclosure pertains to zinc finger nucleases for targeted cleavage and alteration of EPSPS genes. | 06-06-2013 |
Suresh C. Gopalan, Milpitas, CA US
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20140271175 | Alternating Paddle Mechanism for Pool Cleaner - Embodiments of the invention provide a paddle wheel mechanism for a pool cleaner. The paddle wheel mechanism includes a housing with an internal flow area, a paddle wheel shaft supported by the housing, and a paddle wheel supported by the paddle wheel shaft. The paddle wheel includes a base extending along a base width and a plurality of paddle wheel blades extending from the base within the internal flow area. The plurality of paddle wheel blades include a first-type blade with a first blade portion having a first blade width extending along the paddle wheel base from a first side of the paddle wheel base, and a second-type blade with a second blade portion having a second blade width extending along the paddle wheel base from a second side of the paddle wheel base. The first blade width and the second blade width are each less than the base width, and the first-type and second-type blades are arranged on the base in an alternating manner. | 09-18-2014 |
20150159392 | Pool Cleaner With Multi-Stage Venturi Vacuum Assembly - Some embodiments provide a pool cleaner having a housing including a bottom cover with a cover opening. A drive assembly is configured to drive one or more wheels. The pool cleaner further includes a supply mast, and a distributor manifold that receives water from the supply mast. A venturi vacuum assembly is in fluid communication with the distributor manifold, the venturi vacuum assembly designed to vacuum debris from a pool surface. | 06-11-2015 |
20150345165 | Scrubber Assembly for a Pool Cleaner - Embodiments of the invention provide a scrubber assembly for a pool cleaner comprising a center shaft and a rotary cylinder positioned around the center shaft and including an internal spur gear profile. The scrubber assembly further includes a first pinion gear engagable with the internal spur gear profile of the rotary cylinder and aligned off-center from the center shaft and a first end bracket coupled to a first end of the center shaft and rotatable about the first pinion gear. | 12-03-2015 |
Suresh C. Gopalan, Simi Valley, CA US
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20090025812 | Variable output pressure backup valve - A backup valve for use with a pool cleaner coupled to a source of water under pressure. The valve includes a housing having an inlet and at least a first outlet and a second outlet. The valve further includes a timing apparatus directing water from said inlet to the first outlet or the second outlet. In addition, an adjustable flow controller over the second outlet is provided to increase the flow speed of fluid exiting the outlet. | 01-29-2009 |