Gambetta
David Gambetta, Reno, NV US
Patent application number | Description | Published |
---|---|---|
20100224816 | GATE VALVE WITH LUBRICATED SECONDARY SEAL - A gate valve includes a pair of opposing housing members, a gate, primary sealing sleeves and a secondary sealing member. The primary sealing sleeves are disposed in each of the housing members. The gate is configured to slidably pass through a transverse gate chamber defined when the housing members are joined together. The secondary sealing member is secured between the housing members and includes at least one passage or aperture configured to allow lubricating fluid to be applied through at least one of the housing members through the secondary sealing member and onto the gate. | 09-09-2010 |
20100314570 | ROTARY GATE VALVE WITH SECONDARY SEAL - A rotary gate valve includes a gate which rotates above a process flow axis within a pipeline. The gate valve includes a first and second opposing housing members each having coaxial pathways and defining a gate channel when the housing members are joined together. A gate is positioned within the gate channel when the valve is in a closed position to prevent media from flowing through the pathways and rotationally displaced from the channel when the valve is in an open position to allow media to flow through the pathways. A first annular primary sealing sleeve is disposed within the first housing member and a second annular primary sealing sleeve is disposed within the second housing member. Each of the first and second annular primary sealing sleeves is adapted to sealingly engage each other under compression when the valve is in the open position, and with the gate when the valve is in the closed position. A secondary sealing member is disposed around an upper portion of the gate and secured between the housing members above the first and second annular primary sealing sleeves to prevent process media from entering the housing members. | 12-16-2010 |
David L. Gambetta, Reno, NV US
Patent application number | Description | Published |
---|---|---|
20090121173 | VALVE ASSEMBLY HAVING A REINFORCED VALVE SEAT - A knife gate valve includes a reinforced valve seat which prevents displacement of the valve seat when the valve is opened and closed. The valve includes a valve body defined by a first and second body halves. The valve halves are assembled to define a flow path, a knife gate channel and a seat channel. A knife gate is disposed between the body halves and is adapted to traverse the gate channel. The knife gate is configured to be in an open position to allow process flow through the valve and a closed position to prevent process flow through the valve. A seat assembly is positioned within the channel guide and is defined by a horizontal segment, a pair of vertical segments and a lower segment. The seat assembly is compressed between the first and second valve body halves. At least one reinforcing plate is disposed within a portion of the horizontal segment, such that the horizontal segment maintains its rigidity when the knife gate traverses the seat assembly. | 05-14-2009 |
20090159827 | ROTARY GATE VALVE - A rotary knife gate valve includes a gate which rotates above a process flow axis within a pipeline. The valve includes a valve body defining a flow path having in inlet and an outlet and a knife gate channel. A shaft that has a longitudinal axis is positioned within an upper portion of the valve body. The gate has a first end connected to the shaft and positioned within the knife gate channel when the valve is in a closed position and rotationally displaced from the channel when the shaft rotates perpendicular to the shaft axis to open the valve. | 06-25-2009 |
20100224814 | GATE VALVE WITH LUBRICATED SECONDARY SEAL - A gate valve includes a pair of opposing housing members, a gate, primary sealing sleeves and a secondary sealing member. The primary sealing sleeves are disposed in each of the housing members. The gate is configured to slidably pass through a transverse gate chamber defined when the housing members are joined together. The secondary sealing member is secured between the housing members and includes at least one passage or aperture configured to allow lubricating fluid to be applied through at least one of the housing members through the secondary sealing member and onto the gate. | 09-09-2010 |
Gregory A. Gambetta, Davis, CA US
Patent application number | Description | Published |
---|---|---|
20080213901 | Methods for producing heterologous polypeptides in trichothecene-deficient filamentous fungal mutant cells - The present invention relates to methods for producing a polypeptide, comprising: (a) cultivating a mutant of a parent filamentous fungal cell under conditions conducive for the production of the polypeptide, wherein (i) the mutant cell comprises a first nucleic acid sequence encoding the polypeptide and a second nucleic acid sequence comprising a modification of at least one of the genes involved in the production of a trichothecene and (ii) the mutant produces less of the trichothecene than the parent filamentous fungal cell when cultured under the same conditions; and (b) isolating the polypeptide from the cultivation medium. The present invention also relates to mutants of filamentous fungal cells and methods for obtaining the mutant cells. The present invention also relates to isolated trichodiene synthases and isolated nucleic acid sequences encoding the trichodiene synthases. The invention also relates to nucleic acid constructs, vectors, and host cells comprising the nucleic acid sequences as well as methods for producing the trichodiene synthases. The present invention further relates to mutants cells comprising a marker-free modification of a gene, and methods for obtaining and using such mutant cells. | 09-04-2008 |
Jay M. Gambetta, Yorktown Heights, NY US
Patent application number | Description | Published |
---|---|---|
20120319085 | ARRAY OF QUANTUM SYSTEMS IN A CAVITY FOR QUANTUM COMPUTING - A device includes a volume bounded by electromagnetically conducting walls, an aperture in a bounding wall of the electromagnetically conducting walls, a plurality of quantum systems disposed within the volume and an electromagnetic field source coupled to the volume via the aperture. | 12-20-2012 |
20120319684 | MODULAR ARRAY OF FIXED-COUPLING QUANTUM SYSTEMS FOR QUANTUM INFORMATION PROCESSING - A quantum information processing system includes a first composite quantum system, a second composite quantum system, a plurality of electromagnetic field sources coupled to the system and an adjustable electromagnetic coupling between the first composite quantum system and the second composite quantum system. | 12-20-2012 |
20120326720 | MODULAR ARRAY OF FIXED-COUPLING QUANTUM SYSTEMS FOR QUANTUM INFORMATION PROCESSING - A quantum information processing system includes a first composite quantum system, a second composite quantum system, a plurality of electromagnetic field sources coupled to the system and an adjustable electromagnetic coupling between the first composite quantum system and the second composite quantum system. | 12-27-2012 |
20140167811 | QUANTUM CIRCUIT WITHIN WAVEGUIDE-BEYOND-CUTOFF - A quantum information processing system includes a waveguide having an aperture, a non-linear quantum circuit disposed in the waveguide and an electromagnetic control signal source coupled to the aperture. | 06-19-2014 |
20140167836 | QUANTUM CIRCUIT WITHIN WAVEGUIDE-BEYOND-CUTOFF - A quantum information processing system includes a waveguide having an aperture, a non-linear quantum circuit disposed in the waveguide and an electromagnetic control signal source coupled to the aperture. | 06-19-2014 |
20140235450 | MULTI-TUNABLE SUPERCONDUCTING CIRCUITS - A method of characterizing a tunable superconducting circuit, includes selecting an operating direct current (DC) flux for a first charge island from a plurality of coupled charge islands residing in the tunable superconducting circuit coupled to a first resonator and a second resonator, tuning operating DC flux values for at least two charge islands from the plurality of coupled charge islands, measuring coupling energies of the first resonator and the second resonator and measuring frequencies from each of the plurality of coupled charge islands. | 08-21-2014 |
20140264283 | FREQUENCY ARRANGEMENT FOR SURFACE CODE ON A SUPERCONDUCTING LATTICE - A device lattice arrangement including a plurality of devices, a plurality of physical connections for the plurality of devices, wherein each of the plurality of devices are coupled to at least two of the plurality of physical connections, a plurality of identity labels associated with individual devices of the plurality of devices and an arrangement of identity labels such that pairs of devices of the plurality of devices connected by some number of the plurality of connections have different identity labels. | 09-18-2014 |
20140264284 | FREQUENCY SEPARATION BETWEEN QUBIT AND CHIP MODE TO REDUCE PURCELL LOSS - A system, method, and chip to control Purcell loss are described. The chip includes qubits formed on a first surface of a substrate. The method includes determining frequencies of the qubits, and controlling a separation between the frequencies of the qubits and chip mode frequencies of the chip. | 09-18-2014 |
20140264285 | MULTIPLE-QUBIT WAVE-ACTIVATED CONTROLLED GATE - A device includes a housing, at least two qubits disposed in the housing and a resonator disposed in the housing and coupled to the at least two qubits, wherein the at least two qubits are maintained at a fixed frequency and are statically coupled to one another via the resonator, wherein energy levels |03> and |12> are closely aligned, wherein a tuned microwave signal applied to the qubit activates a two-qubit phase interaction. | 09-18-2014 |
20140264787 | DIFFERENTIAL EXCITATION OF PORTS TO CONTROL CHIP-MODE MEDIATED CROSSTALK - A differential port and a method of arranging the differential port are described. The method includes arranging a first electrode to receive a drive signal, and arranging a second electrode to receive a guard signal, the guard signal having a different phase than the drive signal and the first electrode and the second electrode having a gap therebetween. The method also includes disposing a signal line from the first electrode to drive a radio frequency (RF) device. | 09-18-2014 |
20140266406 | SYMMETRIC PLACEMENT OF COMPONENTS ON A CHIP TO REDUCE CROSSTALK INDUCED BY CHIP MODES - A method and system to control crosstalk among qubits on a chip are described. The method includes placing two or more components symmetrically on the chip, the chip including the qubits, and driving two or more ports symmetrically to control the crosstalk based on controlling coupling of chip mode frequencies and qubit frequencies. | 09-18-2014 |
20140327120 | DIFFERENTIAL EXCITATION OF PORTS TO CONTROL CHIP-MODE MEDIATED CROSSTALK - A differential port and a method of arranging the differential port are described. The method includes arranging a first electrode to receive a drive signal, and arranging a second electrode to receive a guard signal, the guard signal having a different phase than the drive signal and the first electrode and the second electrode having a gap therebetween. The method also includes disposing a signal line from the first electrode to drive a radio frequency (RF) device. | 11-06-2014 |
20140368234 | MULTIPLE-QUBIT WAVE-ACTIVATED CONTROLLED GATE - A device includes a housing, at least two qubits disposed in the housing and a resonator disposed in the housing and coupled to the at least two qubits, wherein the at least two qubits are maintained at a fixed frequency and are statically coupled to one another via the resonator, wherein energy levels |03> and |12> are closely aligned, wherein a tuned microwave signal applied to the qubit activates a two-qubit phase interaction. | 12-18-2014 |
20150028970 | MULTI-TUNABLE SUPERCONDUCTING CIRCUITS - A tunable superconducting circuit includes a first charge island, a second charge island, a third charge island, a fourth charge island, a first junction loop electrically coupled to the first and third charge islands, a second junction loop coupled to the second and third charge islands and a third junction loop coupled to the third and fourth charge islands, wherein the first, second and third junction loops are tuned in frequency to operate together as a qubit. | 01-29-2015 |
20150325774 | FREQUENCY SEPARATION BETWEEN QUBIT AND CHIP MODE TO REDUCE PURCELL LOSS - A system, method, and chip to control Purcell loss are described. The chip includes qubits formed on a first surface of a substrate. The method includes determining frequencies of the qubits, and controlling a separation between the frequencies of the qubits and chip mode frequencies of the chip. | 11-12-2015 |
20150363707 | FREQUENCY SEPARATION BETWEEN QUBIT AND CHIP MODE TO REDUCE PURCELL LOSS - A system, method, and chip to control Purcell loss are described. The chip includes qubits formed on a first surface of a substrate. The method includes determining frequencies of the qubits, and controlling a separation between the frequencies of the qubits and chip mode frequencies of the chip. | 12-17-2015 |
20160112031 | TUNABLE SUPERCONDUCTING NOTCH FILTER - A technique relates to a superconductor tunable notch filter. A Josephson junction filter array is connected to a coupling pad and connected to ground. The Josephson junction filter array includes a filter inductance. The Josephson junction filter array connected to the coupling pad forms a filter capacitance. A Josephson junction bias array is connected to the coupling pad and connected to a current source. The Josephson junction bias array includes a bias inductance. A transmission line is connected to the coupling pad in which connection of the transmission line and the coupling pad forms a coupling capacitance, such that the filter inductance and the filter capacitance connect to the transmission line through the coupling capacitance. The Josephson junction filter array includes a notch filter frequency that is tunable according to a magnitude of a current bias from the current source. | 04-21-2016 |
Pietro Gambetta, Munich DE
Patent application number | Description | Published |
---|---|---|
20150115908 | Phase Offset Compensation for Multiphase DC-DC Converter - The present document relates to multiphase DC-DC power converters. In particular, the present document relates to the compensation of the phase offset incurred in multiphase DC-DC power converters which are controlled based on coil current zero crossing. A control circuit for a multiphase power converter is described. The multiphase power converter comprises a first and a second constituent switched-mode power converter, wherein the first and second constituent power converters provide first and second phase currents, respectively. The first and second phase currents contribute to a joint load current of the multiphase power converter. The first and second constituent power converters comprise first and second half bridges with first and second high side switches and first and second low side switches, respectively. | 04-30-2015 |
20150115985 | Temperature and Supply Voltage Independent DC-DC Current Sensing - The present document relates to a current sensing circuit. In particular, the present document relates to a current sensing circuit which provides reliable indications of the current through a transistor. A current sensing circuit configured to provide an indication of a load current through a pass device is described. The current sensing circuit comprises a sensing replica of the pass device and a sensing resistor arranged in series with the sensing replica. The sensing resistor is arranged such that a voltage drop at the sensing resistor provides an indication of the load current through the pass device. | 04-30-2015 |
20150160669 | Fast Load Transient Response System for Voltage Regulators - A circuit and a method for improving the performance of voltage regulators subject to load transients is presented. An auxiliary circuit generates an auxiliary current at an output of a voltage regulator. The auxiliary circuit comprises transient detection means to detect a load transient at the output of the voltage regulator. The auxiliary circuit comprises an auxiliary impedance to be coupled at one end to the output of the voltage regulator, and an auxiliary switch to modify a voltage level at the other end of the auxiliary impedance by closing or opening the auxiliary switch. The auxiliary circuit comprises a control unit to control the auxiliary switch, subject to the detection of a load transient at the output of the voltage regulator, to modify the voltage level at the other end of the auxiliary impedance. | 06-11-2015 |
Pietro Gabriele Gambetta, Livorno IT
Patent application number | Description | Published |
---|---|---|
20160098057 | Voltage Regulator - A voltage regulator, which contains a circuit to determine its output power. It has an output node providing an output voltage for a load; current sensing means for sensing an output current flowing at the output node; voltage providing means for providing a digital representation of the output voltage or of an input voltage to the voltage regulator; output power determination means comprising a digitally controllable variable resistance circuit receiving the digital voltage representation from the voltage providing means and generating a resistance, wherein the variable resistance circuit is connected to the current sensing means to obtain a signal that depends upon the output current and generates a voltage depending on the generated resistance and the obtained signal; and the output power determining means are adapted to determine the output power of the voltage regulator based on the voltage generated by the variable resistance circuit. | 04-07-2016 |
Pietro Gabriele Gambetta, Munich DE
Patent application number | Description | Published |
---|---|---|
20160087530 | Ringing Suppression Method and Apparatus for Power Converters - A method of controlling a power converter for converting a DC input voltage to a DC output voltage is presented The power converter comprises an inductor, one or more switching elements for energizing and de-energizing the inductor, a drive circuit for controlling switching operation of the one or more switching elements in accordance with a control signal, and a feedback circuit for generating the control signal on the basis of a first feedback quantity indicative of an actual output voltage of the power converter and in accordance with one or more circuit parameters of the feedback circuit, the method comprising: detecting an open loop condition of feedback control by the feedback circuit; and modifying at least one of the circuit parameters of the feedback circuit in such a manner that a time until the feedback control by the feedback circuit returns to the closed loop condition is reduced. | 03-24-2016 |
Rossano Gambetta, Santo-Andre-Sp BR
Patent application number | Description | Published |
---|---|---|
20110184216 | PREPARATION OF HETEROGENEOUS CATALYSTS USED IN SELECTIVE HYDROGENATION OF GLYCERIN TO PROPENE, AND A PROCESS FOR THE SELECTIVE HYDROGENATION OF GLYCERIN TO PROPENE - The present invention relates to a process of formulating and preparing supported multi-metal catalysts based on metal oxides and inorganic salts of metals. The impregnation technique is employed by two methods: the slurry method and the modified-pH variation method, which are used in two steps for obtaining the catalyst. The present invention also relates to a process called Glycerol to Propene (GTP) process, corresponding to the transformation of glycerol or glycerin to propene. The reaction involved in the process of the present invention is the selective hydrogenation of glycerin, which takes place by contact of the charge of glycerin carried by hydrogen in a continuous stream system on the catalytic bed containing multi-metal catalysts, specifically prepared for this purpose. | 07-28-2011 |
Vernon A. Gambetta, Sarasota, FL US
Patent application number | Description | Published |
---|---|---|
20120078127 | Physiological status monitoring system - A load score system includes a metabolic sensor such as a heart rate sensor for a subject is configured to output metabolic data for the subject. A biomechanical load sensing subsystem for the subject is configured to output biomechanical load data. A speed sensor subsystem for the subject is configured to output speed data. One or more databases store zones and a weighting factor for each zone for metabolic data, biomechanical load data, and speed data. A performance module is responsive to the metabolic data, the biomechanical load data, and the speed data and the one or more databases and is configured to calculate a metabolic load score for the subject. A biomechanical load score for the subject and a speed load score for the subject are also calculated. An output module displays the subject's calculated metabolic, biomechanical, and speed load scores. | 03-29-2012 |