Patent application number | Description | Published |
20090183032 | Data processing apparatus and method for testing stability of memory cells in a memory device - A data processing apparatus and method are provided for testing stability of memory cells in a memory device. A data processing apparatus comprises a memory device having an array of memory cells for storing data values. Test circuitry is employed in a test mode of operation to execute one or more test patterns in order to detect any memory cells which may malfunction in a normal mode of operation due to cell instability following a write operation, as for example may be caused by body region history effect in embodiments where each memory cell comprises at least one transistor having a body region insulated from a substrate. Each test pattern causes a sequence of access requests to be issued to the memory device whose timing is controlled by a test mode clock signal. Dummy read control circuitry is employed in the test mode of operation, and is responsive at least to each write access request to generate an internal clock signal which has an increased frequency with respect to the test mode clock signal. Further, the dummy read control circuitry is responsive to each write access request to perform using the internal clock signal a write operation to at least one memory cell based on a memory address specified by the write access request, followed by a dummy read operation to the same at least one memory cell, the dummy read operation serving to stress the at least one memory cell with respect to cell stability. This approach provides a very reliable, effective and realistic (in terms of test time) mechanism for detecting memory cells which may malfunction in normal use due to cell instability following a write operation. | 07-16-2009 |
20100103747 | Memory device and method of operating such a memory device - A memory device and method of operating such a device are provided. The memory device has a plurality of sub-arrays arranged to form at least one sub-array column having a first end and a second end, with each sub-array comprising a plurality of memory cells arranged in a plurality of memory cell rows and at least one memory cell column. Sub-array access circuitry is associated with each sub-array, for detecting read data from a selected memory cell column of the associated sub-array during a read operation, and global access circuitry then interfaces with the first end of the sub-array column. Each sub-array access circuitry comprises propagation circuitry for producing an output read data value, the propagation circuitry having a first input for receiving the read data detected from the associated sub-array during a read operation and a second input for receiving an output read data value produced by a linked sub-array access circuitry associated with a sub-array nearer the second end of the sub-array column. The propagation circuitry receives a control signal for identifying which of its first or second inputs should be used to produce the output read data value. As a result, an output read data value produced by any sub-array access circuitry is propagated to the global access circuitry via any linked sub-array access circuitry in the sub-array column between that sub-array access circuitry and the global access circuitry. This provides a particularly simple technique for propagating the read data value to the global access circuitry, which has both predictable timing, and consumes low power. | 04-29-2010 |
20100246278 | Accessing data within a memory formed of memory banks - A memory is disclosed that comprises: an input for receiving an input signal and an output for outputting data; a plurality of data storage cells for storing individual units of data; said plurality of data storage cells being arranged in an array; a plurality of said arrays; each of said arrays comprising detecting circuitry for detecting and outputting stored data in response to a control signal received at said detecting circuitry; delay circuitry for providing a delay to said control signal sent to said detecting circuitry of at least some of said plurality of arrays, said delay provided to said control signal being longer for at least one array located closer to an input and output of said memory than it is to at least one array located further from an input and output of said memory. | 09-30-2010 |
20110051487 | Read only memory cell for storing a multiple bit value - A read only memory cell for storing a multiple bit value is disclosed. The read only memory cell comprises: at least three output lines, each of the at least three output lines representing a different multiple bit value; a switching device connected between a single one of the three output lines and a voltage source. The switching device provides an electrical connection between the voltage source and the single one of the three output lines in response to a switching signal, a voltage of the connected output line switching value in response to connection to the predetermined voltage and the multiple bit value represented by the output line is thereby selected. There is also an output device provided for outputting the selected multiple bit value. | 03-03-2011 |
Patent application number | Description | Published |
20150041943 | METHOD FOR FABRICATING A THICK MULTILAYER OPTICAL FILTER WITHIN AN INTEGRATED CIRCUIT, AND INTEGRATED CIRCUIT COMPRISING A THICK MULTILAYER OPTICAL FILTER - A multilayer optical filter is provided for an integrated circuit including a substrate and a metallization layer interconnection part. The optical filter is formed from a first filter part located within the interconnection part and positioned over a photosensitive region of the substrate. The optical filter further includes a second filter part positioned above the first filter part and the interconnection part. The first and second filter parts each include a metal layer. The first and second filter parts are separated from each other as a function of a wavelength in vacuum of an optical signal to be filtered and received by the photosensitive region. | 02-12-2015 |
20150053923 | BACK SIDE ILLUMINATION PHOTODIODE OF HIGH QUANTUM EFFICIENCY - A back side illumination photodiode includes a light-receiving back side surface of a semiconductor material substrate. An area of the light-receiving back side surface includes a recess. The recess is filled with a material having an optical index that is lower than an optical index of the semiconductor material substrate. Both the substrate and the filling material are transparent to an operating wavelength of the photodiode. The recess may be formed to have a ring shape. | 02-26-2015 |
20150053924 | SPAD PHOTODIODE OF HIGH QUANTUM EFFICIENCY - A SPAD-type photodiode has a semiconductor substrate with a light-receiving surface. A lattice formed of interlaced strips made of a first material covers the light receiving surface. The lattice includes lattice openings with lateral walls covered by a spacer made of a second material. Then first and second materials have different optical indices, and further each optical index is less than or equal to the substrate optical index. A pitch of the lattice is of the order of a magnitude of an operating wavelength of the photodiode. The first and second materials are transparent at that operating wavelength. The lattice is made of a conductive material electrically coupled to an electrical connection node (for example, a bias voltage node). | 02-26-2015 |
20150054042 | PHOTODIODE OF HIGH QUANTUM EFFICIENCY - A photodiode includes at least one central pad arranged on a light-receiving surface of a photodiode semiconductor substrate. The pad is made of a first material and includes lateral sidewalls surrounded by a spacer made of a second material having a different optical index than the first material. The lateral dimensions of the pad are smaller than an operating wavelength of the photodiode. Both the first and second materials are transparent to that operating wavelength. The pads and spacers are formed at a same time gate electrodes and sidewall spacers of MOS transistors are formed. | 02-26-2015 |
20150076573 | METHOD FOR PRODUCING AN OPTICAL FILTER IN AN INTEGRATED CIRCUIT, AND CORRESPONDING INTEGRATED CIRCUIT - An integrated circuit includes a substrate and an interconnect part above the substrate, and further includes a photosensitive region in the substrate. A filter is provided aligned with the photosensitive region. The filter is formed by at least one layer of filter material. In one implementation for front side illumination, the layer of filter material is positioned above the photosensitive region between the interconnect part and the substrate. In another implementation for back side illumination, the layer of filter material is positioned below the photosensitive region opposite the interconnect part. The layer of filter material is configured such that a product of the thickness of the layer of filter material and the imaginary part of the refractive index of the layer of filter material is above 1 nm. | 03-19-2015 |
Patent application number | Description | Published |
20080197285 | Ultrasensitive Optical Detector Having a Large Temporal Resolution and Using a Waveguide, and Methods For Producing Said Detector - Ultrasensitive optical detector with high resolution in time, using a waveguide, and processes for manufacturing this detector | 08-21-2008 |
20080272302 | Ultra-Sensitive Optical Detector With High Time Resolution - An ultra-sensitive optical detector with large time resolution, using a surface plasmon. The optical detector is configured to detect at least one photon, and including a dielectric substrate, and on the substrate, at least one bolometric detection component, that generates an electrical signal from the energy of received photon(s). Additionally, at least one coupling component is formed on the substrate, distinct from the detection component and including a metal component, and generates a surface plasmon by interaction with the photon(s) and guiding the plasmon right up to the detection component, which then absorbs the energy of the surface plasmon. | 11-06-2008 |
20090020701 | HIGH TIME-RESOLUTION ULTRASENSITIVE OPTICAL DETECTOR, USING GRATING COUPLING - This detector is intended to detect at least one photon and comprises a dielectric substrate ( | 01-22-2009 |
20090127460 | HIGH TIME-RESOLUTION ULTRASENSITIVE OPTICAL SENSOR USING A PLANAR WAVEGUIDE LEAKAGE MODE, AND METHODS FOR MAKING SAME - A high time-resolution ultrasensitive optical detector, using a planar waveguide leakage mode, and methods for making the detector. The detector includes a stacking with a dielectric substrate, a detection element, first and second dielectric layers, and a dielectric superstrate configured to send photon(s) into the light guide formed by the first layer. The thicknesses of the layers is chosen to enable a resonant coupling between the photon(s) and a leakage mode of the guide, the stacking having an absorption resonance linked to the leakage mode for a given polarization of the photon(s). | 05-21-2009 |
20110290982 | OPTICAL FILTER SUITABLE FOR DEALING WITH A RADIATION OF VARIABLE INCIDENCE AND DETECTOR INCLUDING SAID FILTER - An optical filter for filtering an electromagnetic radiation of variable angle of incidence, includes a stack of at least one dielectric or semi-conductor layer arranged between two partially reflective layers, said stack defining a set of Fabry-Pérot cavities set to a predetermined wavelength. The average refractive index of the dielectric or semi-conductor layer is variable in a plane orthogonal to the direction of the stack so as to compensate the effects of the variation in the angle of incidence of the electromagnetic radiation on the transmission spectrum of the cavities. | 12-01-2011 |
20120085944 | FILTERING MATRIX STRUCTURE, ASSOCIATED IMAGE SENSOR AND 3D MAPPING DEVICE - Filtering matrix structure comprising at least three color filters and a plurality of near Infrared filters, each one of the color filters and the near Infrared filters having an optimum transmission frequency, wherein the filtering matrix structure is made of n metal layers (m | 04-12-2012 |
20120164399 | METHOD FOR PRODUCING MICRON-RESOLUTION COLOURED IMAGES EMBEDDED IN A VERY ROBUST, VERY DURABLE MEDIUM - A method for producing a colored or fluorescent substrate with a view to formation of a colored or fluorescent image including the formation. The method defines on a substrate of a colored or fluorescent matrix, pixels of at least two different colors, wherein each pixel forms a filter for a given color. At least one filter is an interferential filter or a filter obtained with colored or fluorescent particles. | 06-28-2012 |
20130161775 | PHOTODETECTOR AND CORRESPONDING DETECTION MATRIX - The invention relates to a photodetector intended for the detection of incident light radiation in the visible and close infrared region, said photodetector comprising: a light-radiation-absorption structure ( | 06-27-2013 |
20140034835 | OPTICAL FILTERING STRUCTURE IN THE VISIBLE AND/OR INFRARED DOMAIN - An optical filtering structure comprising a stack of layers forming a first filter letting pass a first spectral band, and a second filter adjacent to the first filter and which lets pass a second spectral band comprising:
| 02-06-2014 |