Patent application number | Description | Published |
20120112152 | ELECTRONICALLY CONTROLLED SQUISHABLE COMPOSITE SWITCH - A method and apparatus for making analog and digital electronics which includes a composite including a squishable material doped with conductive particles. A microelectromechanical systems (MEMS) device has a channel made from the composite, where the channel forms a primary conduction path for the device. Upon applied voltage, capacitive actuators squeeze the composite, causing it to become conductive. The squishable device includes a control electrode, and a composite electrically and mechanically connected to two terminal electrodes. By applying a voltage to the control electrode relative to a first terminal electrode, an electric field is developed between the control electrode and the first terminal electrode. This electric field results in an attractive force between the control electrode and the first terminal electrode, which compresses the composite and enables electric control of the electron conduction from the first terminal electrode through the channel to the second terminal electrode. | 05-10-2012 |
20150228805 | ELECTRONICALLY CONTROLLED SQUISHABLE COMPOSITE SWITCH - A method and apparatus for making analog and digital electronics which includes a composite including a squishable material doped with conductive particles. A microelectromechanical systems (MEMS) device has a channel made from the composite, where the channel forms a primary conduction path for the device. Upon applied voltage, capacitive actuators squeeze the composite, causing it to become conductive. The squishable device includes a control electrode, and a composite electrically and mechanically connected to two terminal electrodes. By applying a voltage to the control electrode relative to a first terminal electrode, an electric field is developed between the control electrode and the first terminal electrode. This electric field results in an attractive force between the control electrode and the first terminal electrode, which compresses the composite and enables electric control of the electron conduction from the first terminal electrode through the channel to the second terminal electrode. | 08-13-2015 |
20150357142 | ELECTROMECHANICAL DEVICE - Electromechanical devices described herein may employ tunneling phenomena to function as low-voltage switches. Opposing electrodes may be separated by an elastically deformable layer which, in some cases, may be made up of a non-electrically conductive material. In some embodiments, the elastically deformable layer is substantially free of electrically conductive material. When a sufficient actuation voltage and/or force is applied, the electrodes are brought toward one another and, accordingly, the elastically deformable layer is compressed. Though, the elastically deformable layer prevents the electrodes from making direct contact with one another. Rather, when the electrodes are close enough to one another, a tunneling current arises therebetween. The elastically deformable layer may exhibit spring-like behavior such that, upon release of the actuation voltage and/or force, the separation distance between electrodes is restored. Thus, the electromechanical device may be actuated between open and closed switch positions. | 12-10-2015 |
Patent application number | Description | Published |
20140153625 | Systems and Methods for Advanced Iterative Decoding and Channel Estimation of Concatenated Coding Systems - Systems and methods for decoding block and concatenated codes are provided. These include advanced iterative decoding techniques based on belief propagation algorithms, with particular advantages when applied to codes having higher density parity check matrices. Improvements are also provided for performing channel state information estimation including the use of optimum filter lengths based on channel selectivity and adaptive decision-directed channel estimation. These improvements enhance the performance of various communication systems and consumer electronics. Particular improvements are also provided for decoding HD Radio signals, including enhanced decoding of reference subcarriers based on soft-diversity combining, joint enhanced channel state information estimation, as well as iterative soft-input soft-output and list decoding of convolutional codes and Reed-Solomon codes. These and other improvements enhance the decoding of different logical channels in HD Radio systems. | 06-05-2014 |
20160043743 | SYSTEMS AND METHODS FOR ADVANCED ITERATIVE DECODING AND CHANNEL ESTIMATION OF CONCATENATED CODING SYSTEMS - Systems and methods for decoding block and concatenated codes are provided. These include advanced iterative decoding techniques based on belief propagation algorithms, with particular advantages when applied to codes having higher density parity check matrices. Improvements are also provided for performing channel state information estimation including the use of optimum filter lengths based on channel selectivity and adaptive decision-directed channel estimation. These improvements enhance the performance of various communication systems and consumer electronics. Particular improvements are also provided for decoding HD Radio signals, including enhanced decoding of reference subcarriers based on soft-diversity combining, joint enhanced channel state information estimation, as well as iterative soft-input soft-output and list decoding of convolutional codes and Reed-Solomon codes. These and other improvements enhance the decoding of different logical channels in HD Radio systems. | 02-11-2016 |
20160043744 | SYSTEMS AND METHODS FOR ADVANCED ITERATIVE DECODING AND CHANNEL ESTIMATION OF CONCATENATED CODING SYSTEMS - Systems and methods for decoding block and concatenated codes are provided. These include advanced iterative decoding techniques based on belief propagation algorithms, with particular advantages when applied to codes having higher density parity check matrices. Improvements are also provided for performing channel state information estimation including the use of optimum filter lengths based on channel selectivity and adaptive decision-directed channel estimation. These improvements enhance the performance of various communication systems and consumer electronics. Particular improvements are also provided for decoding HD Radio signals, including enhanced decoding of reference subcarriers based on soft-diversity combining, joint enhanced channel state information estimation, as well as iterative soft-input soft-output and list decoding of convolutional codes and Reed-Solomon codes. These and other improvements enhance the decoding of different logical channels in HD Radio systems. | 02-11-2016 |
20160043745 | SYSTEMS AND METHODS FOR ADVANCED ITERATIVE DECODING AND CHANNEL ESTIMATION OF CONCATENATED CODING SYSTEMS - Systems and methods for decoding block and concatenated codes are provided. These include advanced iterative decoding techniques based on belief propagation algorithms, with particular advantages when applied to codes having higher density parity check matrices. Improvements are also provided for performing channel state information estimation including the use of optimum filter lengths based on channel selectivity and adaptive decision-directed channel estimation. These improvements enhance the performance of various communication systems and consumer electronics. Particular improvements are also provided for decoding HD Radio signals, including enhanced decoding of reference subcarriers based on soft-diversity combining, joint enhanced channel state information estimation, as well as iterative soft-input soft-output and list decoding of convolutional codes and Reed-Solomon codes. These and other improvements enhance the decoding of different logical channels in HD Radio systems. | 02-11-2016 |
20160072657 | SYSTEMS AND METHODS FOR ADVANCED ITERATIVE DECODING AND CHANNEL ESTIMATION OF CONCATENATED CODING SYSTEMS - Systems and methods for decoding block and concatenated codes are provided. These include advanced iterative decoding techniques based on belief propagation algorithms, with particular advantages when applied to codes having higher density parity check matrices such as iterative soft-input soft-output and list decoding of convolutional codes, Reed-Solomon codes and BCH codes. Improvements are also provided for performing channel state information estimation including the use of optimum filter lengths based on channel selectivity and adaptive decision-directed channel estimation. These improvements enhance the performance of various communication systems and consumer electronics. Particular improvements are also provided for decoding HD radio signals, satellite radio signals, digital audio broadcasting (DAB) signals, digital audio broadcasting plus (DAB+) signals, digital video broadcasting-handheld (DVB-H) signals, digital video broadcasting-terrestrial (DVB-T) signals, world space system signals, terrestrial-digital multimedia broadcasting (T-DMB) signals, and China mobile multimedia broadcasting (CMMB) signals. These and other improvements enhance the decoding of different digital signals. | 03-10-2016 |
Patent application number | Description | Published |
20090063771 | STRUCTURE FOR REDUCING COHERENCE ENFORCEMENT BY SELECTIVE DIRECTORY UPDATE ON REPLACEMENT OF UNMODIFIED CACHE BLOCKS IN A DIRECTORY-BASED COHERENT MULTIPROCESSOR - A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design to reduce the number of memory directory updates during block replacement in a system having a directory-based cache is provided. The design structure may be implemented to utilize a read/write bit to determine the accessibility of a cache line and limit memory directory updates during block replacement to regions that are determined to be readable and writable by multiple processors. | 03-05-2009 |
20090063782 | Method for Reducing Coherence Enforcement by Selective Directory Update on Replacement of Unmodified Cache Blocks in a Directory-Based Coherent Multiprocessor - Embodiments of the present invention generally provide techniques and apparatus to reduce the number of memory directory updates during block replacement in a system having a directory-based cache. The system may be implemented to utilize a read/write bit to determine the accessibility of a cache line and limit memory directory updates during block replacement to regions that are determined to be readable and writable by multiple processors. | 03-05-2009 |
20140160954 | HOST ETHERNET ADAPTER FRAME FORWARDING - A method for receiving a data packet is described. The method may include receiving a frame in a host Ethernet adapter from an Ethernet network. The frame may be parsed to determine a data packet size. A work queue element (WQE) may be selected from two or more available WQEs having different data packet size capacity. Data packet storage may be provided for each WQE, including at least some cache storage associated with a processor. The data packet may be stored in the data packet storage associated with the selected WQE based on the data packet size, including storing in the cache for data packets under selected conditions. | 06-12-2014 |
20140164553 | HOST ETHERNET ADAPTER FRAME FORWARDING - A method for receiving a data packet is described. The method may include receiving a frame in a host Ethernet adapter from an Ethernet network. The frame may be parsed to determine a data packet size. A work queue element (WQE) may be selected from two or more available WQEs having different data packet size capacity. Data packet storage may be provided for each WQE, including at least some cache storage associated with a processor. The data packet may be stored in the data packet storage associated with the selected WQE based on the data packet size, including storing in the cache for data packets under selected conditions. | 06-12-2014 |
20150301894 | ADAPTIVE REBUILD SCHEDULING SCHEME - Method and apparatus for redundant array of independent disks (RAID) recovery are disclosed. In one embodiment, a RAID controller schedules requests to rebuild failed drives based on the wear state of secondary drives and input/output (I/O) activity. The controller may be configured to assign higher scheduling priority to rebuild requests only when necessary, so as to reduce the time needed for the rebuild and to avoid affecting performance of the RAID system. In particular, the controller may give higher priority to rebuild requests if secondary drive failure is likely. In addition, the controller may determine when write-intensive periods occur, and assign lower priority to rebuild requests during such periods. | 10-22-2015 |
20150301895 | ADAPTIVE REBUILD SCHEDULING SCHEME - Method and apparatus for redundant array of independent disks (RAID) recovery are disclosed. In one embodiment, a RAID controller schedules requests to rebuild failed drives based on the wear state of secondary drives and input/output (I/O) activity. The controller may be configured to assign higher scheduling priority to rebuild requests only when necessary, so as to reduce the time needed for the rebuild and to avoid affecting performance of the RAID system. In particular, the controller may give higher priority to rebuild requests if secondary drive failure is likely. In addition, the controller may determine when write-intensive periods occur, and assign lower priority to rebuild requests during such periods. | 10-22-2015 |