Patent application number | Description | Published |
20080258140 | Thin film transistor including selectively crystallized channel layer and method of manufacturing the thin film transistor - Provided are a thin film transistor (TFT) including a selectively crystallized channel layer, and a method of manufacturing the TFT. The TFT includes a gate, the channel layer, a source, and a drain. The channel layer is formed of an oxide semiconductor, and at least a portion of the channel layer contacting the source and the drain is crystallized. In the method of manufacturing the TFT, the channel layer is formed of an oxide semiconductor, and a metal component is injected into the channel layer so as to crystallize at least a portion of the channel layer contacting the source and the drain. The metal component can be injected into the channel layer by depositing and heat-treating a metal layer or by ion-implantation. | 10-23-2008 |
20080265310 | NANO REGION EMBEDDED DIELECTRIC LAYERS, MEMORY DEVICES INCLUDING THE LAYERS, AND METHODS OF MAKING THE SAME - In one aspect, a memory cell includes a plurality of dielectric layers located within a charge storage gate structure. At least one of the dielectric layers includes an dielectric material including oxygen, and nano regions including oxygen embedded in the dielectric material, where an oxygen concentration of the dielectric material is the greater than an oxygen concentration of the nano regions. In another aspect, at least one of the dielectric layers includes a dielectric material and nano regions embedded in the dielectric material, where an atomic composition of the dielectric material is the same as the atomic composition of the nano regions, and a density of the dielectric material is the greater than a density of the nano regions. | 10-30-2008 |
20080296739 | Method of forming a thin film structure and stack structure comprising the thin film - Provided is a method of forming a thin film structure and a stack structure comprising the thin film. The method may include forming a crystalline Al | 12-04-2008 |
20080315193 | Oxide-based thin film transistor, method of fabricating the same, zinc oxide etchant, and a method of forming the same - Provided is a zinc (Zn) oxide-based thin film transistor that may include a gate, a gate insulating layer on the gate, a channel including zinc oxide and may be on a portion of the gate insulating layer, and a source and drain contacting respective sides of the channel. The zinc (Zn) oxide-based thin film transistor may further include a recession in the channel between the source and the drain, and a zinc oxide-based etchant may be used to form the recession. | 12-25-2008 |
20080315200 | Oxide semiconductors and thin film transistors comprising the same - Oxide semiconductors and thin film transistors (TFTs) including the same are provided. An oxide semiconductor includes Zn atoms and at least one of Hf and Cr atoms added thereto. A thin film transistor (TFT) includes a channel including an oxide semiconductor including Zn atoms and at least one of Hf and Cr atoms added thereto. | 12-25-2008 |
20090008638 | Oxide semiconductor, thin film transistor including the same and method of manufacturing a thin film transistor - Example embodiments relate to an oxide semiconductor including zinc oxide (ZnO), a thin film transistor including a channel formed of the oxide semiconductor and a method of manufacturing the thin film transistor. The oxide semiconductor may include a Ga | 01-08-2009 |
20090061613 | Method of forming aluminum oxide layer and method of manufacturing charge trap memory device using the same - Provided is a method of forming an aluminum oxide layer and a method of manufacturing a charge trap memory device using the same. The method of forming an aluminum oxide layer may include forming an amorphous aluminum oxide layer on an underlying layer, forming a crystalline auxiliary layer on the amorphous aluminum oxide layer, and crystallizing the amorphous aluminum oxide layer. Forming the crystalline auxiliary layer may include forming an amorphous auxiliary layer on the amorphous aluminum oxide layer; and crystallizing the amorphous auxiliary layer. | 03-05-2009 |
20100200907 | Semiconductor Integrated Circuit Device and Method of Fabricating the Same - A semiconductor integrated circuit device is provided. The semiconductor integrated circuit device includes a plurality of isolation regions which are formed within a semiconductor substrate and define active regions. A tunnel layer and a trap seed layer are formed in each of the active regions and are sequentially stacked between the isolation regions. A trap layer is formed on the trap seed layer and protrudes further than a top surface of each of the isolation regions. A blocking layer is formed on the trap layer. A gate electrode is formed on the blocking layer. | 08-12-2010 |
20110001183 | Memory device and method of fabricating the same - A memory device and a method of fabricating the same are provided. The memory device includes a tunneling dielectric layer on a substrate, a charge storage layer on the tunneling dielectric layer, a blocking dielectric layer on the charge storage layer, the blocking dielectric layer including a first dielectric layer having silicon oxide, a second dielectric layer on the first dielectric layer and having aluminum silicate, and a third dielectric layer formed on the second dielectric layer and having aluminum oxide, and an upper electrode on the blocking dielectric layer. | 01-06-2011 |
20110006358 | Al-doped charge trap layer, non-volatile memory device and methods of fabricating the same - Provided is an aluminum (Al) doped charge trap layer, a non-volatile memory device and methods of fabricating the same. The charge trap layer may include a plurality of silicon nano dots that trap charges and a silicon oxide layer that covers the silicon nano dots, wherein the charge trap layer is doped with aluminum (Al). The non-volatile memory device may include a substrate including a source and a drain on separate regions of the substrate, a tunneling film on the substrate contacting the source and the drain, the charge trap layer according to example embodiments, a blocking film on the charge trap layer, and a gate electrode on the blocking film. | 01-13-2011 |
20110027713 | ELECTROPHOTOGRAPHIC TONER - The disclosure provides an electrophotographic toner including a binder resin; and a light absorber, wherein the light absorber includes a metal nanorod and a surfactant covering a surface of the metal nanorod. | 02-03-2011 |
20110133176 | Transistor and electronic apparatus including same - Transistors and electronic apparatuses including the same are provided, the transistors include a channel layer on a substrate. The channel layer includes a zinc (Zn)-containing oxide. The transistors include a source and a drain, respectively, contacting opposing ends of the channel layer, a gate corresponding to the channel layer, and a gate insulating layer insulating the channel layer from the gate. The channel layer has a first surface adjacent to the substrate, a second surface facing the first surface, and a channel layer-protection portion on the second surface. The channel layer-protection portion includes a fluoride material. | 06-09-2011 |
20120178231 | METHODS FOR FABRICATING A METAL SILICIDE LAYER AND SEMICONDUCTOR DEVICES USING THE SAME - Methods for fabricating a metal silicide layer and for fabricating a semiconductor device having such a metal silicide layer are provided wherein, in an embodiment, the method includes the steps of forming a metal layer on a substrate, performing a first thermal process on the substrate to allow the substrate and the metal layer to react with react other to form a first pre-metal silicide layer, removing an unreacted portion of the metal layer, and performing a second thermal process on the substrate to change the first pre-metal silicide layer into a second pre-metal silicide layer and then to melt the second pre-metal silicide layer to change the second pre-metal silicide layer into a metal silicide layer. | 07-12-2012 |
20120295399 | OXIDE-BASED THIN FILM TRANSISTOR, METHOD OF FABRICATING THE SAME, ZINC OXIDE ETCHANT, AND A METHOD OF FORMING THE SAME - Provided is a zinc (Zn) oxide-based thin film transistor that may include a gate, a gate insulating layer on the gate, a channel including zinc oxide and may be on a portion of the gate insulating layer, and a source and drain contacting respective sides of the channel. The zinc (Zn) oxide-based thin film transistor may further include a recession in the channel between the source and the drain, and a zinc oxide-based etchant may be used to form the recession. | 11-22-2012 |
20130170784 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME - A semiconductor device includes a single crystalline substrate, an electrical element and an optical element. The electrical element is disposed on the single crystalline substrate. The electrical element includes a gate electrode extending in a crystal orientation <110> and source and drain regions adjacent to the gate electrode. The source region and the drain region are arranged in a direction substantially perpendicular to a direction in which the gate electrode extends. The optical element is disposed on the single crystalline substrate. The optical element includes an optical waveguide extending in a crystal orientation <010>. | 07-04-2013 |
20140256117 | METHODS OF FORMING EPITAXIAL LAYERS - A method of forming an epitaxial layer includes forming a plurality of first insulation patterns in a substrate, the plurality of first insulation patterns spaced apart from each other, forming first epitaxial patterns on the plurality of first insulation patterns, forming second insulation patterns between the plurality of first insulation patterns to contact the plurality of first insulation patterns, and forming second epitaxial patterns on the second insulation patterns and between the first epitaxial patterns to contact the first epitaxial patterns, the first epitaxial patterns and the second epitaxial patterns forming a single epitaxial layer. | 09-11-2014 |
20140353677 | LOW-DEFECT SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are a low-defect semiconductor device and a method of manufacturing the same. The method includes forming a buffer layer on a silicon substrate, forming an interface control layer on the buffer layer under a first growth condition, and forming a nitride stack on the interface control layer under a second growth condition different from the first growth condition. | 12-04-2014 |