Patent application number | Description | Published |
20080217292 | Registered structure formation via the application of directed thermal energy to diblock copolymer films - Methods for fabricating sublithographic, nanoscale linear microchannel arrays over surfaces without defined features utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the methods use a multilayer induced ordering approach to align lamellar films to an underlying base film within trenches, and localized heating to anneal the lamellar-phase block copolymer film overlying the trenches and outwardly over the remaining surface. | 09-11-2008 |
20080248653 | Etchant gas and a method for removing material from a late transition metal structure - An etchant gas and a method for removing at least a portion of a late transition metal structure are disclosed. The etchant gas includes PF | 10-09-2008 |
20080315270 | MULTILAYER ANTIREFLECTION COATINGS, STRUCTURES AND DEVICES INCLUDING THE SAME AND METHODS OF MAKING THE SAME - Multi-layer antireflection coatings, devices including multi-layer antireflection coatings and methods of forming the same are disclosed. A block copolymer is applied to a substrate and self-assembled into parallel lamellae above a substrate. The block copolymer may optionally be allowed to self-assemble into a multitude of domains oriented either substantially parallel or substantially perpendicular to an widerlying substrate | 12-25-2008 |
20080318440 | POROUS ORGANOSILICATE LAYERS, AND VAPOR DEPOSITION SYSTEMS AND METHODS FOR PREPARING SAME - The present invention provides porous organosilicate layers, and vapor deposition systems and methods for preparing such layers on substrates. The porous organosilicate layers are useful, for example, as masks. | 12-25-2008 |
20090011585 | Methods of Etching Nanodots, Methods of Removing Nanodots From Substrates, Methods of Fabricating Integrated Circuit Devices, Methods of Etching a Layer Comprising a Late Transition Metal, and Methods of Removing a Layer Comprising a Late Transition Metal From a Substrate - Embodiments of the invention include methods of etching nanodots, to methods of removing nanodots from substrates, and to methods of fabricating integrated circuit devices. In one embodiment, a method of etching nanodots that include a late transition metal includes exposing such nanodots to a gas comprising a phosphorus and halogen-containing compound and an oxidizing agent. After the exposing, the nanodots which are remaining and were exposed are etched (either partially or completely) with an aqueous solution comprising HF. | 01-08-2009 |
20090035465 | CHEMICAL VAPORIZER FOR MATERIAL DEPOSITION SYSTEMS AND ASSOCIATED METHODS - System and method for operating a material deposition system are disclosed. In one embodiment, the method can include periodically injecting a precursor into a vaporizer through an injector at the vaporizer, vaporizing the precursor in the vaporizer and supplying the vaporized precursor to a reaction chamber in fluid communication with the vaporizer, and shutting down the vaporizer and the reaction chamber after a period of time. The method can also include conducting maintenance of the injector at the vaporizer by using a vapor solvent rinse. | 02-05-2009 |
20090062470 | Zwitterionic block copolymers and methods - Zwitterionic block copolymers having oppositely charged or chargeable terminal groups, and methods of making and using the same, are disclosed. The zwitterionic block copolymers can undergo microphase separation. | 03-05-2009 |
20090173991 | METHODS FOR FORMING RHODIUM-BASED CHARGE TRAPS AND APPARATUS INCLUDING RHODIUM-BASED CHARGE TRAPS - Isolated conductive nanoparticles on a dielectric layer and methods of fabricating such isolated conductive nanoparticles provide charge traps in electronic structures for use in a wide range of electronic devices and systems. In an embodiment, conductive nanoparticles are deposited on a dielectric layer by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles to configure the conductive nanoparticles as charge traps. | 07-09-2009 |
20090252946 | METHOD FOR PURIFICATION OF SEMICONDUCTING SINGLE WALL NANOTUBES - A process of forming a semiconductive carbon nanotube structure includes imposing energy on a mixture that contains metallic carbon nanotubes and semiconductive carbon nanotubes under conditions to cause the metallic carbon nanotubes to be digested or to decompose so that they may be separated away from the semiconductive carbon nanotubes. | 10-08-2009 |
20090278232 | RUTHENIUM SILICIDE DIFFUSION BARRIER LAYERS AND METHODS OF FORMING SAME - A method for use in the fabrication of integrated circuits includes providing a substrate assembly having a surface. A diffusion barrier layer is formed over at least a portion of the surface. The diffusion barrier layer is formed of RuSi | 11-12-2009 |
20090302371 | CONDUCTIVE NANOPARTICLES - Isolated conductive nanoparticles on a dielectric layer and methods of fabricating such isolated conductive nanoparticles provide charge storage units in electronic structures for use in a wide range of electronic devices and systems. The isolated conductive nanoparticles may be used as a floating gate in a flash memory. In an embodiment, conductive nanoparticles are deposited on a dielectric layer by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles to configure the conductive nanoparticles as charge storage elements. | 12-10-2009 |
20100012922 | METHODS OF FORMING STRUCTURES INCLUDING NANOTUBES AND STRUCTURES INCLUDING SAME - A semiconductor structure including nanotubes forming an electrical connection between electrodes is disclosed. The semiconductor structure may include an open volume defined by a lower surface of an electrically insulative material and sidewalls of at least a portion of each of a dielectric material and opposing electrodes. The nanotubes may extend between the opposing electrodes, forming a physical and electrical connection therebetween. The nanotubes may be encapsulated within the open volume in the semiconductor structure. A semiconductor structure including nanotubes forming an electrical connection between source and drain regions is also disclosed. The semiconductor structure may include at least one semiconducting carbon nanotube electrically connected to a source and a drain, a dielectric material disposed over the at least one semiconducting carbon nanotube and a gate dielectric overlying a portion of the dielectric material. Methods of forming the semiconductor structures are also disclosed. | 01-21-2010 |
20100075037 | Deposition Systems, ALD Systems, CVD Systems, Deposition Methods, ALD Methods and CVD Methods - Some embodiments include deposition systems configured for reclaiming unreacted precursor with one or more traps provided downstream of a reaction chamber. Some of the deposition systems may utilize two or more traps that are connected in parallel relative to one another and configured so that the traps may be alternately utilized for trapping precursor and releasing trapped precursor back into the reaction chamber. Some of the deposition systems may be configured for ALD, and some may be configured for CVD. | 03-25-2010 |
20100124609 | Methods Of Forming Metal-Containing Structures, And Methods Of Forming Germanium-Containing Structures - Some embodiments include methods of forming metal-containing structures. A first metal-containing material may be formed over a substrate. After the first metal-containing material is formed, and while the substrate is within a reaction chamber, hydrogen-containing reactant may be used to form a hydrogen-containing layer over the first metal-containing material. The hydrogen-containing reactant may be, for example, formic acid and/or formaldehyde. Any unreacted hydrogen-containing reactant may be purged from within the reaction chamber, and then metal-containing precursor may be flowed into the reaction chamber. The hydrogen-containing layer may be used during conversion of the metal-containing precursor into a second metal-containing material that forms directly against the first metal-containing material. Some embodiments include methods of forming germanium-containing structures, such as, for example, methods of forming phase change materials containing germanium, antimony and tellurium. | 05-20-2010 |
20100124821 | METHODS FOR FORMING A CONDUCTIVE MATERIAL, METHODS FOR SELECTIVELY FORMING A CONDUCTIVE MATERIAL, METHODS FOR FORMING PLATINUM, AND METHODS FOR FORMING CONDUCTIVE STRUCTURES - Methods of selectively forming a conductive material and methods of forming metal conductive structures are disclosed. An organic material may be patterned to expose regions of an underlying material. The underlying material may be exposed to a precursor gas, such as a platinum precursor gas, that reacts with the underlying material without reacting with the remaining portions of the organic material located over the underlying material. The precursor gas may be used in an atomic layer deposition process, during which the precursor gas may selectively react with the underlying material to form a conductive structure, but not react with the organic material. The conductive structures may be used, for example, as a mask for patterning during various stages of semiconductor device fabrication. | 05-20-2010 |
20100204402 | Zwitterionic Block Copolymers And Methods - Zwitterionic block copolymers having oppositely charged or chargeable terminal groups, and methods of making and using the same, are disclosed. The zwitterionic block copolymers can undergo microphase separation. | 08-12-2010 |
20100255342 | Metal Plating Using Seed Film - A seed film and methods incorporating the seed film in semiconductor applications is provided. The seed film includes one or more noble metal layers, where each layer of the one or more noble metal layers is no greater than a monolayer. The seed film also includes either one or more conductive metal oxide layers or one or more silicon oxide layers, where either layer is no greater than a monolayer. The seed film can be used in plating, including electroplating, conductive layers, over at least a portion of the seed film. Conductive layers formed with the seed film can be used in fabricating an integrated circuit, including fabricating capacitor structures in the integrated circuit. | 10-07-2010 |
20100267195 | Methods Of Forming Phase Change Materials And Methods Of Forming Phase Change Memory Circuitry - A method of forming a phase change material which having germanium and tellurium therein includes depositing a germanium-containing material over a substrate. Such material includes elemental-form germanium. A gaseous tellurium-comprising precursor is flowed to the germanium-comprising material and tellurium is removed from the gaseous precursor to react with the elemental-form germanium in the germanium-comprising material to form a germanium and tellurium-comprising compound of a phase change material over the substrate. Other implementations are disclosed. | 10-21-2010 |
20100267220 | Methods Of Depositing Antimony-Comprising Phase Change Material Onto A Substrate And Methods Of Forming Phase Change Memory Circuitry - A method of depositing an antimony-comprising phase change material onto a substrate includes providing a reducing agent and vaporized Sb(OR) | 10-21-2010 |
20110039406 | Methods of Etching Nanodots, Methods of Removing Nanodots From Substrates, Methods of Fabricating Integrated Circuit Devices, Methods of Etching a Layer Comprising a Late Transition Metal, and Methods of Removing a Layer Comprising a Late Transition Metal From a Substrate - Embodiments of the invention include methods of etching nanodots, to methods of removing nanodots from substrates, and to methods of fabricating integrated circuit devices. In one embodiment, a method of etching nanodots that include a late transition metal includes exposing such nanodots to a gas comprising a phosphorus and halogen-containing compound and an oxidizing agent. After the exposing, the nanodots which are remaining and were exposed are etched (either partially or completely) with an aqueous solution comprising HF. | 02-17-2011 |
20110124201 | CHEMICAL VAPORIZER FOR MATERIAL DEPOSITION SYSTEMS AND ASSOCIATED METHODS - System and method for operating a material deposition system are disclosed. In one embodiment, the method can include periodically injecting a precursor into a vaporizer through an injector at the vaporizer, vaporizing the precursor in the vaporizer and supplying the vaporized precursor to a reaction chamber in fluid communication with the vaporizer, and shutting down the vaporizer and the reaction chamber after a period of time. The method can also include conducting maintenance of the injector at the vaporizer by using a vapor solvent rinse. | 05-26-2011 |
20110144275 | Zwitterionic Block Copolymers and Methods - Zwitterionic block copolymers having oppositely charged or chargeable terminal groups, and methods of making and using the same, are disclosed. The zwitterionic block copolymers can undergo microphase separation. | 06-16-2011 |
20110206921 | Porous Organosilicate Layers, and Vapor Deposition Systems and Methods for Preparing Same - The present invention provides porous organosilicate layers, and vapor deposition systems and methods for preparing such layers on substrates. The porous organosilicate layers are useful, for example, as masks. | 08-25-2011 |
20110275211 | Methods of Etching Nanodots, Methods of Removing Nanodots From Substrates, Methods of Fabricating Integrated Circuit Devices, Methods of Etching a Layer Comprising a Late Transition Metal, and Methods of Removing a Layer Comprising a Late Transition Metal From a Substrate - Embodiments of the invention include methods of etching nanodots, to methods of removing nanodots from substrates, and to methods of fabricating integrated circuit devices. In one embodiment, a method of etching nanodots that include a late transition metal includes exposing such nanodots to a gas comprising a phosphorus and halogen-containing compound and an oxidizing agent. After the exposing, the nanodots which are remaining and were exposed are etched (either partially or completely) with an aqueous solution comprising HF. | 11-10-2011 |
20110278661 | APPARATUS INCLUDING RHODIUM-BASED CHARGE TRAPS - Isolated conductive nanoparticles on a dielectric layer and methods of fabricating such isolated conductive nanoparticles provide charge traps in electronic structures for use in a wide range of electronic devices and systems. In an embodiment, conductive nanoparticles are deposited on a dielectric layer by a plasma-assisted deposition process such that each conductive nanoparticle is isolated from the other conductive nanoparticles to configure the conductive nanoparticles as charge traps. | 11-17-2011 |
20110281414 | SEMICONDUCTOR PROCESSING - Devices, methods, and systems for semiconductor processing are described herein. A number of method embodiments of semiconductor processing can include forming a silicon layer on a structure, forming an opening through the silicon layer and into the structure, and selectively forming a resistance variable material in the opening such that the resistance variable material does not form on the silicon layer. | 11-17-2011 |
20110291064 | RESISTANCE VARIABLE MEMORY CELL STRUCTURES AND METHODS - Resistance variable memory cell structures and methods are described herein. One or more resistance variable memory cell structures include a first electrode common to a first and a second resistance variable memory cell, a first vertically oriented resistance variable material having an arcuate top surface in contact with a second electrode and a non-arcuate bottom surface in contact with the first electrode; and a second vertically oriented resistance variable material having an arcuate top surface in contact with a third electrode and a non-arcuate bottom surface in contact with the first electrode. | 12-01-2011 |
20110291065 | PHASE CHANGE MEMORY CELL STRUCTURES AND METHODS - Phase change memory cell structures and methods are described herein. A number of methods of forming a phase change memory cell structure include forming a dielectric stack structure on a first electrode, wherein forming the dielectric stack structure includes creating a second region between a first region and a third region of the dielectric stack structure, the second region having a thermal conductivity different than a thermal conductivity of the first region and different than a thermal conductivity of the third region of the dielectric stack. One or more embodiments include forming a via through the first, second, and third regions of the dielectric stack structure, depositing a phase change material in the via, and forming a second electrode on the phase change material. | 12-01-2011 |
20110293833 | Zwitterionic Block Copolymers and Methods - Zwitterionic block copolymers having oppositely charged or chargeable terminal groups, and methods of making and using the same, are disclosed. The zwitterionic block copolymers can undergo microphase separation. | 12-01-2011 |
20110309319 | HORIZONTALLY ORIENTED AND VERTICALLY STACKED MEMORY CELLS - Horizontally oriented and vertically stacked memory cells are described herein. One or more method embodiments include forming a vertical stack having a first insulator material, a first memory cell material on the first insulator material, a second insulator material on the first memory cell material, a second memory cell material on the second insulator material, and a third insulator material on the second memory cell material, forming an electrode adjacent a first side of the first memory cell material and a first side of the second memory cell material, and forming an electrode adjacent a second side of the first memory cell material and a second side of the second memory cell material. | 12-22-2011 |
20120018693 | CONFINED RESISTANCE VARIABLE MEMORY CELL STRUCTURES AND METHODS - Confined resistance variable memory cell structures and methods are described herein. One or more methods of forming a confined resistance variable memory cell structure includes forming a via in a memory cell structure and forming a resistance variable material in the via by performing a process that includes providing a germanium amidinate precursor and a first reactant to a process chamber having the memory cell structure therein and providing an antimony ethoxide precursor and a second reactant to the process chamber subsequent to removing excess germanium. | 01-26-2012 |
20120028410 | METHODS OF FORMING GERMANIUM-ANTIMONY-TELLURIUM MATERIALS AND A METHOD OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE INCLUDING THE SAME - A method of forming a material. The method comprises conducting an ALD layer cycle of a first metal, the ALD layer cycle comprising a reactive first metal precursor and a co-reactive first metal precursor. An ALD layer cycle of a second metal is conducted, the ALD layer cycle comprising a reactive second metal precursor and a co-reactive second metal precursor. An ALD layer cycle of a third metal is conducted, the ALD layer cycle comprising a reactive third metal precursor and a co-reactive third metal precursor. The ALD layer cycles of the first metal, the second metal, and the third metal are repeated to form a material, such as a GeSbTe material, having a desired stoichiometry. Additional methods of forming a material, such as a GeSbTe material, are disclosed, as is a method of forming a semiconductor device structure including a GeSbTe material. | 02-02-2012 |
20120056326 | TITANIUM NITRIDE FILMS - The use of a monolayer or partial monolayer sequencing process to form conductive titanium nitride produces a reliable structure for use in a variety of electronic devices. In an embodiment, a structure can be formed by using ammonia and carbon monoxide reactant materials with respect to a titanium-containing precursor exposed to a substrate. Such a TiN layer has a number of uses including, but not limited to, use as a diffusion barrier underneath another conductor or use as an electro-migration preventing layer on top of a conductor. Such deposited TiN material may have characteristics associated with a low resistivity, a smooth topology, high deposition rates, excellent step coverage, and electrical continuity. | 03-08-2012 |
20120086104 | ATOMIC LAYER DEPOSITION OF CRYSTALLINE PrCaMnO (PCMO) AND RELATED STRUCTURES AND METHODS - Methods of forming a PrCaMnO (PCMO) material by atomic layer deposition. The methods include separately exposing a surface of a substrate to a manganese-containing precursor, an oxygen-containing precursor, a praseodymium-containing precursor and a calcium-containing precursor. The resulting PCMO material is crystalline. A semiconductor device structure including the PCMO material, and related methods, are also disclosed. | 04-12-2012 |
20120094087 | Registered Structure Formation via the Application of Directed Thermal Energy to Diblock Copolymer Films - Methods for fabricating sublithographic, nanoscale linear microchannel arrays over surfaces without defined features utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the methods use a multilayer induced ordering approach to align lamellar films to an underlying base film within trenches, and localized heating to anneal the lamellar-phase block copolymer film overlying the trenches and outwardly over the remaining surface. | 04-19-2012 |
20120097911 | PHASE CHANGE MEMORY CELL STRUCTURES AND METHODS - Phase change memory cell structures and methods are described herein. A number of methods of forming a phase change memory cell structure include forming a dielectric stack structure on a first electrode, wherein forming the dielectric stack structure includes creating a second region between a first region and a third region of the dielectric stack structure, the second region having a thermal conductivity different than a thermal conductivity of the first region and different than a thermal conductivity of the third region of the dielectric stack. One or more embodiments include forming a via through the first, second, and third regions of the dielectric stack structure, depositing a phase change material in the via, and forming a second electrode on the phase change material. | 04-26-2012 |
20120138850 | ETCHANT GAS - An etchant gas and a method for removing at least a portion of a late transition metal structure. The etchant gas includes PF | 06-07-2012 |
20120149146 | CONFINED RESISTANCE VARIABLE MEMORY CELL STRUCTURES AND METHODS - Confined resistance variable memory cell structures and methods are described herein. One or more methods of forming a confined resistance variable memory cell structure includes forming a via in a memory cell structure and forming a resistance variable material in the via by performing a process that includes providing a germanium amidinate precursor and a first reactant to a process chamber having the memory cell structure therein and providing an antimony ethoxide precursor and a second reactant to the process chamber subsequent to removing excess germanium. | 06-14-2012 |
20120171812 | METHODS OF FORMING GERMANIUM-ANTIMONY-TELLURIUM MATERIALS AND METHODS OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE INCLUDING THE SAME - A method of forming a material comprises conducting an ALD layer cycle of a first metal, the ALD layer cycle comprising a reactive first metal precursor and a co-reactive first metal precursor. An ALD layer cycle of a second metal is conducted, the ALD layer cycle comprising a reactive second metal precursor and a co-reactive second metal precursor. An ALD layer cycle of a third metal is conducted, the ALD layer cycle comprising a reactive third metal precursor and a co-reactive third metal precursor. The ALD layer cycles of the first metal, the second metal, and the third metal are repeated to form a material, such as a GeSbTe material, having a desired stoichiometry. Additional methods of forming a material, such as a GeSbTe material, are disclosed, as is a method of forming a semiconductor device structure including a GeSbTe material. | 07-05-2012 |
20120178209 | Methods Of Forming Metal-Containing Structures, And Methods Of Forming Germanium-Containing Structures - Some embodiments include methods of forming metal-containing structures. A first metal-containing material may be formed over a substrate. After the first metal-containing material is formed, and while the substrate is within a reaction chamber, hydrogen-containing reactant may be used to form a hydrogen-containing layer over the first metal-containing material. The hydrogen-containing reactant may be, for example, formic acid and/or formaldehyde. Any unreacted hydrogen-containing reactant may be purged from within the reaction chamber, and then metal-containing precursor may be flowed into the reaction chamber. The hydrogen-containing layer may be used during conversion of the metal-containing precursor into a second metal-containing material that forms directly against the first metal-containing material. Some embodiments include methods of forming germanium-containing structures, such as, for example, methods of forming phase change materials containing germanium, antimony and tellurium. | 07-12-2012 |
20120231579 | Methods Of Depositing Antimony-Comprising Phase Change Material Onto A Substrate And Methods Of Forming Phase Change Memory Circuitry - A method of depositing an antimony-comprising phase change material onto a substrate includes providing a reducing agent and vaporized Sb(OR) | 09-13-2012 |
20120261647 | METHODS OF FORMING STRUCTURES HAVING NANOTUBES EXTENDING BETWEEN OPPOSING ELECTRODES AND STRUCTURES INCLUDING SAME - A semiconductor structure including nanotubes forming an electrical connection between electrodes is disclosed. The semiconductor structure may include an open volume defined by a lower surface of an electrically insulative material and sidewalls of at least a portion of each of a dielectric material and opposing electrodes. The nanotubes may extend between the opposing electrodes, forming a physical and electrical connection therebetween. The nanotubes may be encapsulated within the open volume in the semiconductor structure. A semiconductor structure including nanotubes forming an electrical connection between source and drain regions is also disclosed. The semiconductor structure may include at least one semiconducting carbon nanotube electrically connected to a source and a drain, a dielectric material disposed over the at least one semiconducting carbon nanotube and a gate dielectric overlying a portion of the dielectric material. Methods of forming the semiconductor structures are also disclosed. | 10-18-2012 |
20120289059 | CHEMICAL VAPORIZER FOR MATERIAL DEPOSITION SYSTEMS AND ASSOCIATED METHODS - System and method for operating a material deposition system are disclosed. In one embodiment, the method can include periodically injecting a precursor into a vaporizer through an injector at the vaporizer, vaporizing the precursor in the vaporizer and supplying the vaporized precursor to a reaction chamber in fluid communication with the vaporizer, and shutting down the vaporizer and the reaction chamber after a period of time. The method can also include conducting maintenance of the injector at the vaporizer by using a vapor solvent rinse. | 11-15-2012 |
20120321876 | ARTICLES HAVING SEMICONDUCTIVE CARBON NANOTUBES - A process of forming a semiconductive carbon nanotube structure includes imposing energy on a mixture that contains metallic carbon nanotubes and semiconductive carbon nanotubes under conditions to cause the metallic carbon nanotubes to be digested or to decompose so that they may be separated away from the semiconductive carbon nanotubes. | 12-20-2012 |
20130001495 | MULTILEVEL MIXED VALENCE OXIDE (MVO) MEMORY - Various embodiments include a memory device and methods of forming the same. The memory device can include an electrode coupled to one or more memory elements, to store information. The electrode may comprise a number of metals, where a first one of the metals has a Gibbs free energy for oxide formation lower than the Gibbs free energy of oxidation of a second one of the metals. | 01-03-2013 |
20130011561 | MULTILAYER ANTIREFLECTION COATINGS, STRUCTURES AND DEVICES INCLUDING THE SAME AND METHODS OF MAKING THE SAME - Multi-layer antireflection coatings, devices including multi-layer antireflection coatings and methods of forming the same are disclosed. A block copolymer is applied to a substrate and self-assembled into parallel lamellae above a substrate. The block copolymer may optionally be allowed to self-assemble into a multitude of domains oriented either substantially parallel or substantially perpendicular to an underlying substrate. | 01-10-2013 |
20130128649 | MEMORY CELLS, SEMICONDUCTOR DEVICES INCLUDING SUCH CELLS, AND METHODS OF FABRICATION - Memory cells are disclosed, which cells include a cell material and an ion-source material over the cell material. A discontinuous interfacial material is included between the cell material and the ion-source material. Also disclosed are fabrication methods and semiconductor devices including the disclosed memory cells. | 05-23-2013 |
20130130053 | Metal Plating Using Seed Film - A seed film and methods incorporating the seed film in semiconductor applications is provided. The seed film includes one or more noble metal layers, where each layer of the one or more noble metal layers is no greater than a monolayer. The seed film also includes either one or more conductive metal oxide layers or one or more silicon oxide layers, where either layer is no greater than a monolayer. The seed film can be used in plating, including electroplating, conductive layers, over at least a portion of the seed film. Conductive layers formed with the seed film can be used in fabricating an integrated circuit, including fabricating capacitor structures in the integrated circuit. | 05-23-2013 |
20130189492 | REGISTERED STRUCTURE FORMATION VIA THE APPLICATION OF DIRECTED THERMAL ENERGY TO DIBLOCK COPOLYMER FILMS - Methods for fabricating sub-lithographic, nanoscale linear microchannel arrays over surfaces without defined features utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the methods use a multi-layer induced ordering approach to align lamellar films to an underlying base film within trenches, and localized heating to anneal the lamellar-phase block copolymer film overlying the trenches and outwardly over the remaining surface. | 07-25-2013 |
20130221312 | SEMICONDUCTOR STRUCTURES COMPRISING CRYSTALLINE PrCaMnO (PCMO) FORMED BY ATOMIC LAYER DEPOSITION - Semiconductor structures include PrCaMnO (PCMO) material formed by atomic layer deposition. The PCMO material is formed by exposing a surface of a substrate to a manganese-containing precursor, an oxygen-containing precursor, a praseodymium-containing precursor and a calcium-containing precursor. The resulting PCMO material is crystalline. | 08-29-2013 |
20130252396 | CONFINED RESISTANCE VARIABLE MEMORY CELL STRUCTURES AND METHODS - Confined resistance variable memory cell structures and methods are described herein. One or more methods of forming a confined resistance variable memory cell structure includes forming a via in a memory cell structure and forming a resistance variable material in the via by performing a process that includes providing a germanium amidinate precursor and a first reactant to a process chamber having the memory cell structure therein and providing an antimony ethoxide precursor and a second reactant to the process chamber subsequent to removing excess germanium. | 09-26-2013 |
20130292626 | RESISTIVE MEMORY HAVING CONFINED FILAMENT FORMATION - Resistive memory having confined filament formation is described herein. One or more method embodiments include forming an opening in a stack having a silicon material and an oxide material on the silicon material, and forming an oxide material in the opening adjacent the silicon material, wherein the oxide material formed in the opening confines filament formation in the resistive memory cell to an area enclosed by the oxide material formed in the opening. | 11-07-2013 |
20130295717 | Methods Of Depositing Antimony-Comprising Phase Change Material Onto A Substrate And Methods Of Forming Phase Change Memory Circuitry - A method of depositing an antimony-comprising phase change material onto a substrate includes providing a reducing agent and vaporized Sb(OR) | 11-07-2013 |
20130306927 | ATOMIC LAYER DEPOSITION OF A METAL CHALCOGENIDE MATERIAL AND RELATED MEMORY CELLS AND METHODS OF FORMING MEMORY CELLS - A method of forming a metal chalcogenide material. The method comprises introducing a metal precursor and a chalcogenide precursor into a chamber, and reacting the metal precursor and the chalcogenide precursor to form a metal chalcogenide material on a substrate. The metal precursor is a carboxylate of an alkali metal, an alkaline earth metal, a transition metal, a post-transition metal, or a metalloid. The chalcogenide precursor is a hydride, alkyl, or aryl precursor of sulfur, selenium, or tellurium or a silylhydride, silylalkyl, or silylaryl precursor of sulfur, selenium, or tellurium. Methods of forming a memory cell including the metal chalcogenide material are also disclosed, as are memory cells including the metal chalcogenide material. | 11-21-2013 |
20140021437 | RESISTANCE VARIABLE MEMORY CELL STRUCTURES AND METHODS - Resistance variable memory cell structures and methods are described herein. One or more resistance variable memory cell structures include a first electrode common to a first and a second resistance variable memory cell, a first vertically oriented resistance variable material having an arcuate top surface in contact with a second electrode and a non-arcuate bottom surface in contact with the first electrode; and a second vertically oriented resistance variable material having an arcuate top surface in contact with a third electrode and a non-arcuate bottom surface in contact with the first electrode. | 01-23-2014 |
20140026925 | CHEMICAL VAPORIZER FOR MATERIAL DEPOSITION SYSTEMS AND ASSOCIATED METHODS - System and method for operating a material deposition system are disclosed. In one embodiment, the method can include periodically injecting a precursor into a vaporizer through an injector at the vaporizer, vaporizing the precursor in the vaporizer and supplying the vaporized precursor to a reaction chamber in fluid communication with the vaporizer, and shutting down the vaporizer and the reaction chamber after a period of time. The method can also include conducting maintenance of the injector at the vaporizer by using a vapor solvent rinse. | 01-30-2014 |
20140027775 | METHODS OF FORMING A METAL CHALCOGENIDE MATERIAL, RELATED METHODS OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE, AND A RELATED SEMICONDUCTOR DEVICE STRUCTURE - Accordingly, a method of forming a metal chalcogenide material may comprise introducing at least one metal precursor and at least one chalcogen precursor into a chamber comprising a substrate, the at least one metal precursor comprising an amine or imine compound of an alkali metal, an alkaline earth metal, a transition metal, a post-transition metal, or a metalloid, and the at least one chalcogen precursor comprising a hydride, alkyl, or aryl compound of sulfur, selenium, or tellurium. The at least one metal precursor and the at least one chalcogen precursor may be reacted to form a metal chalcogenide material over the substrate. A method of forming a metal telluride material, a method of forming a semiconductor device structure, and a semiconductor device structure are also described. | 01-30-2014 |
20140073084 | Methods of Forming Phase Change Materials and Methods of Forming Phase Change Memory Circuitry - A method of forming a phase change material which having germanium and tellurium therein includes depositing a germanium-containing material over a substrate. Such material includes elemental-form germanium. A gaseous tellurium-comprising precursor is flowed to the germanium-comprising material and tellurium is removed from the gaseous precursor to react with the elemental-form germanium in the germanium-comprising material to form a germanium and tellurium-comprising compound of a phase change material over the substrate. Other implementations are disclosed. | 03-13-2014 |
20140080279 | MULTILEVEL MIXED VALENCE OXIDE (MVO) MEMORY - Various embodiments include a memory device and methods of forming the same. The memory device can include an electrode coupled to one or more memory elements, to store information. The electrode may comprise a number of metals, where a first one of the metals has a Gibbs free energy for oxide formation lower than the Gibbs free energy of oxidation of a second one of the metals. | 03-20-2014 |
20140084248 | METHODS OF FORMING STRUCTURES HAVING NANOTUBES EXTENDING BETWEEN OPPOSING ELECTRODES AND STRUCTURES INCLUDING SAME - A semiconductor structure including nanotubes forming an electrical connection between electrodes is disclosed. The semiconductor structure may include an open volume defined by a lower surface of an electrically insulative material and sidewalls of at least a portion of each of a dielectric material and opposing electrodes. The nanotubes may extend between the opposing electrodes, forming a physical and electrical connection therebetween. The nanotubes may be encapsulated within the open volume in the semiconductor structure. A semiconductor structure including nanotubes forming an electrical connection between source and drain regions is also disclosed. The semiconductor structure may include at least one semiconducting carbon nanotube electrically connected to a source and a drain, a dielectric material disposed over the at least one semiconducting carbon nanotube and a gate dielectric overlying a portion of the dielectric material. Methods of forming the semiconductor structures are also disclosed. | 03-27-2014 |
20140242748 | METHODS OF FORMING GERMANIUM-ANTIMONY-TELLURIUM MATERIALS AND CHALCOGENIDE MATERIALS - Methods of forming a material include exposing a substrate to a first germanium-containing compound and a second, different germanium-containing compound; exposing the substrate to a first antimony-containing compound and a second, different antimony-containing compound; and exposing the substrate to a first tellurium-containing compound and a second, different tellurium-containing compound. Methods of forming chalcogenide materials include exposing a substrate to a first precursor comprising a reactive precursor of a first metal and a co-reactive precursor of the first metal, the reactive precursor and the co-reactive precursor each having at least one ligand coordinated to an atom of the first metal, wherein the at least one ligand of the co-reactive precursor is different from the at least one ligand of the reactive precursor. The substrate is also exposed to a reactive antimony precursor and a co-reactive antimony precursor and to a reactive tellurium precursor and a co-reactive tellurium precursor. | 08-28-2014 |
20140248771 | METHODS FOR FORMING A CONDUCTIVE MATERIAL AND METHODS FOR FORMING A CONDUCTIVE STRUCTURE - A method of forming a conductive material comprises forming at least one opening extending through an organic material and an insulative material underlying the organic material to expose at least a portion of a substrate and a conductive contact in the substrate. The method further comprises lining exposed surfaces of the insulative material, the conductive contact, and the at least a portion of the substrate in the at least one opening with a conductive material without forming the conductive material on the organic material. | 09-04-2014 |
20140308776 | Methods of Forming Phase Change Materials and Methods of Forming Phase Change Memory Circuitry - A method of forming a phase change material which having germanium and tellurium therein includes depositing a germanium-containing material over a substrate. Such material includes elemental-form germanium. A gaseous tellurium-comprising precursor is flowed to the germanium-comprising material and tellurium is removed from the gaseous precursor to react with the elemental-form germanium in the germanium-comprising material to form a germanium and tellurium-comprising compound of a phase change material over the substrate. Other implementations are disclosed. | 10-16-2014 |
20150021541 | RESISTIVE MEMORY HAVING CONFINED FILAMENT FORMATION - Resistive memory having confined filament formation is described herein. One or more method embodiments include forming an opening in a stack having a silicon material and an oxide material on the silicon material, and forming an oxide material in the opening adjacent the silicon material, wherein the oxide material formed in the opening confines filament formation in the resistive memory cell to an area enclosed by the oxide material formed in the opening. | 01-22-2015 |
20150075427 | Porous Organosilicate Layers, and Vapor Deposition Systems and Methods for Preparing Same - A vapor deposition system includes a deposition chamber having a substrate positioned therein. The system includes at least one vessel containing at least one silsequioxane precursor. The system includes at least one vessel containing at least one wetting agent or surfactant. The system includes at least one vessel containing a carboxylic acid or nitrogen base. The system includes a source for at least one reaction gas. | 03-19-2015 |