Patent application number | Description | Published |
20110059126 | METHODS OF REDUCING VIRUCIDAL ACTIVITY IN PCV-2 COMPOSITIONS AND PCV-2 COMPOSITIONS WITH AN IMPROVED IMMUNOGENICITY - The present invention provides methods of reducing the vircidal activity of a composition comprising a PCV-2 antigen as well as antigenic preparations and immunogenic compositions comprising a PCV-2 antigen, wherein the virucidal activity has been reduced. In addition, the present invention also relates to a method of increasing the immunogenicity of an immunogenic composition comprising a PCV-2 antigen as well as immunogenic composition with an increased immunogenicity. | 03-10-2011 |
20140248603 | QUANTIFICATION OF VACCINE COMPOSITIONS - The invention provides methods and mass-labeled peptides for use in said methods for quantifying the presence of a one or more viral proteins in a sample of a preparation containing agents which bind to said viral protein, using mass-spectroscopic analyses of the sample and standards containing known amounts of labeled and unlabeled signature peptides, in particular wherein said viral proteins are antigens in a vaccine for porcine circovirus. | 09-04-2014 |
20150056248 | PORCINE CIRCOVIRUS TYPE 2 (PCV2) SUBUNIT VACCINE - Vaccination methods to control PCV2 infection with different PCV2 subtypes are disclosed. Specifically, a PCV2 subtype b (PCV2b) ORF2 proteins or immunogenic compositions comprising a PCV2b ORF2 protein are used in a method for the treatment or prevention of an infection with PCV2 of a different subtype, the reduction, prevention or treatment of clinical signs caused by an infection with PCV2 of a different subtype, or the prevention or treatment of a disease caused by an infection with PCV2 of a different subtype. | 02-26-2015 |
Patent application number | Description | Published |
20110051538 | METHODS AND MEMORY DEVICES FOR REPAIRING MEMORY CELLS - Methods and memory devices for repairing memory cells are discloses, such as a memory device that includes a main array having a plurality of sections of memory cells. One such main array includes a plurality of sets of input/output lines, each of which may be coupled to a respective plurality of memory cells in each section. One such memory device also includes a redundant section of memory cells, corresponding in number to the number of memory cells in each of the sections of the main array. An addressing circuit may contain a record of, for example, sections that have been determined to be defective. The addressing circuit may receive an address and compare the received address with the record of defective sections. In the event of a match, the addressing circuit may redirect an access to memory cells corresponding to the received address to memory cells in the redundant section. | 03-03-2011 |
20120176851 | METHODS AND MEMORY DEVICES FOR REPAIRING MEMORY CELLS - Methods and memory devices for repairing memory cells are discloses, such as a memory device that includes a main array having a plurality of sections of memory cells. One such main array includes a plurality of sets of input/output lines, each of which may be coupled to a respective plurality of memory cells in each section. One such memory device also includes a redundant section of memory cells, corresponding in number to the number of memory cells in each of the sections of the main array. An addressing circuit may contain a record of, for example, sections that have been determined to be defective. The addressing circuit may receive an address and compare the received address with the record of defective sections. In the event of a match, the addressing circuit may redirect an access to memory cells corresponding to the received address to memory cells in the redundant section. | 07-12-2012 |
20140369143 | APPARATUSES AND METHODS FOR MAPPING MEMORY ADDRESSES TO REDUNDANT MEMORY - Apparatuses and methods related to redundant memory and mapping memory addresses to redundant memory are disclosed. An example apparatus includes a plurality of memory sections and a plurality of redundant memory sections. A programmable element block includes a plurality of programmable element sets. A programmable element set is configured to be programmed with location information for a redundant memory section of the plurality of redundant memory sections and further programmed with a respective memory address to be mapped to a redundant memory element of the redundant memory section located by the location information. A programmable element block logic is configured to associate a memory address programmed in a programmable element set with a redundant memory element of the redundant memory section located by the respective location information programmed in the programmable element set. | 12-18-2014 |
Patent application number | Description | Published |
20110194367 | SYSTEMS, MEMORIES, AND METHODS FOR REFRESHING MEMORY ARRAYS - Memories, systems, and methods for refreshing are provided, such as a memory with an array of memory cells divided into sections. Memories include replacement elements having a digit line, and detecting circuitry coupled to the digit line of at least one section of the memory cell array and coupled to the digit line of the replacement element. Memories include control logic configured to selectively refresh the replacement element at an occurrence when a non-neighboring section of the memory cell array relative to the replacement element is refreshed. Other memories, systems, and methods are provided. | 08-11-2011 |
20120263001 | SYSTEMS, MEMORIES, AND METHODS FOR REFRESHING MEMORY ARRAYS - Memories, systems, and methods for refreshing are provided, such as a memory with an array of memory cells divided into sections. Memories include replacement elements having a digit line, and detecting circuitry coupled to a digit line of at least one section of the memory cell array and coupled to the digit line of the replacement element. Memories include control logic configured to selectively refresh the replacement element at an occurrence when a non-neighboring section of the memory cell array relative to the replacement element is refreshed. Other memories, systems, and methods are provided. | 10-18-2012 |