Patent application number | Description | Published |
20080198454 | Color Filter For Image Sensor - An image sensor device includes a semiconductor substrate having a front surface and a back surface, pixels formed on the front surface of the semiconductor substrate, and grid arrays aligned with one of the pixels. One of the grid arrays is configured to allow a wavelength of light to pass through to the corresponding one of the pixels. The grid arrays are disposed overlying the front or back surface of the semiconductor substrate. | 08-21-2008 |
20080217659 | Device and Method To Reduce Cross-Talk and Blooming For Image Sensors - An image sensor device includes a semiconductor substrate having a first type of conductivity, a first layer overlying the semiconductor substrate and having the first type of conductivity, a second layer overlying the first layer and having a second type of conductivity different than the first type of conductivity, and a plurality of pixels formed in the second layer. | 09-11-2008 |
20080246063 | PHOTODIODE WITH MULTI-EPI FILMS FOR IMAGE SENSOR - The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a semiconductor substrate; a first epitaxy semiconductor layer disposed on the semiconductor substrate and having a first type of dopant and a first doping concentration; a second epitaxy semiconductor layer disposed over the first epitaxy semiconductor layer and having the first type of dopant and a second doping concentration less than the first doping concentration; and an image sensor on the second epitaxy semiconductor layer. | 10-09-2008 |
20080290441 | PHOTODETECTOR FOR BACKSIDE-ILLUMINATED SENSOR - A backside-illuminated sensor including a semiconductor substrate. The semiconductor substrate has a front surface and a back surface. A plurality of pixels are formed on the front surface of the semiconductor substrate. At least one pixel includes a photogate structure. The photogate structure has a gate that includes a reflective layer. | 11-27-2008 |
20080303932 | ISOLATION STRUCTURE FOR IMAGE SENSOR DEVICE - Provided is an image sensor device including a substrate with a pixel region and a peripheral region. A first isolation structure is formed on the substrate in the pixel region. The first isolation structure includes a trench having a first depth. A second isolation structure is formed on the substrate in the peripheral region. The second isolation structure includes a trench having a second depth. The first depth is greater than the second depth. | 12-11-2008 |
20090020838 | APPARATUS AND METHOD FOR REDUCING OPTICAL CROSS-TALK IN IMAGE SENSORS - An image sensor device includes a semiconductor substrate having a front surface and a back surface; an array of pixels formed on the front surface of the semiconductor substrate, each pixel being adapted for sensing light radiation; an array of color filters formed over the plurality of pixels, each color filter being adapted for allowing a wavelength of light radiation to reach at least one of the plurality of pixels; and an array of micro-lens formed over the array of color filters, each micro-lens being adapted for directing light radiation to at least one of the color filters in the array. The array of color filters includes structure adapted for blocking light radiation that is traveling towards a region between adjacent micro-lens. | 01-22-2009 |
20090078973 | Image Sensor Element For Backside-Illuminated Sensor - Provides is a backside-illuminated sensor including a semiconductor substrate having a front surface and a back surface. A plurality of image sensor elements are formed on the front surface of the semiconductor substrate. At least one of the image sensor elements includes a transfer transistor and a photodetector. The gate of the transfer transistor includes an optically reflective layer. The gate of the transfer transistor, including the optically reflective layer, overlies the photodetector. In one embodiment, the gate overlies the photodetector by at least 5%. | 03-26-2009 |
20090146325 | ALIGNMENT FOR BACKSIDE ILLUMINATION SENSOR - An apparatus and manufacturing method thereof, wherein an integrated circuit is located in a first region of a substrate having first and second opposing major surfaces, and wherein an alignment mark is located in a second region of the substrate and extends through the substrate between the first and second surfaces. The alignment mark may protrude from the first and/or second surfaces, and/or may comprise a plurality of substantially similar alignment marks. The second region may interpose the first region and a perimeter of the substrate. The second region may comprise a scribe region. | 06-11-2009 |
20090189233 | CMOS IMAGE SENSOR AND METHOD FOR MANUFACTURING SAME - An optical image sensor is fabricated by forming a pixel array and a peripheral region surrounding the pixel array on a semiconductor substrate, the peripheral region containing peripheral circuitry. An inter-level-dielectric layer is formed over the substrate and a plurality of interconnect wiring layers are formed over the inter-level-dielectric layer. Each interconnect wiring layer includes interconnecting metal features and a layer of inter-level-dielectric material covering the interconnecting metal features. The plurality of interconnect wiring layers are provided in a manner that there are N levels of wiring layers in the peripheral region and 1 to (N−1) levels of wiring layers over the pixel array. An etch-stop layer is formed over the top-most level interconnecting metal features in the peripheral region. | 07-30-2009 |
20090294886 | METHOD OF MAKING WAFER STRUCTURE FOR BACKSIDE ILLUMINATED COLOR IMAGE SENSOR - An integrated circuit device is provided. The integrated circuit device can include a substrate; a first radiation-sensing element disposed over a first portion of the substrate; and a second radiation-sensing element disposed over a second portion of the substrate. The first portion comprises a first radiation absorption characteristic, and the second portion comprises a second radiation absorption characteristic different from the first radiation absorption characteristic. | 12-03-2009 |
20090315131 | SENSOR STRUCTURE FOR OPTICAL PERFORMANCE ENHANCEMENT - The present disclosure provides an image sensor semiconductor device. The image sensor semiconductor device includes an image sensor disposed in a semiconductor substrate, an inter-level dielectric (ILD) layer disposed on the semiconductor substrate, inter-metal-dielectric (IMD) layers and multi-layer interconnects (MLI) formed on the ILD layer, and a color filter formed in at least one of the IMD layers and overlying the image sensor. | 12-24-2009 |
20090321888 | ALIGNMENT FOR BACKSIDE ILLUMINATION SENSOR - Provided is an apparatus that includes an integrated circuit located in a first region of a substrate having first and second opposing major surfaces and an alignment mark located in a second region of the substrate and extending through the substrate between the first and second surfaces. | 12-31-2009 |
20100090304 | BONDING PROCESS FOR CMOS IMAGE SENSOR - The present disclosure provides a method of making an integrated circuit (IC). The method includes forming an electric device on a front side of a substrate; forming a top metal pad on the front side of the substrate, the top metal pad being coupled to the electric device; forming a passivation layer on the front side of the substrate, the top metal pad being embedded in the passivation layer; forming an opening in the passivation layer, exposing the top metal pad; forming a deep trench in the substrate; filling a conductive material in the deep trench and the opening, resulting in a though-wafer via (TWV) feature in the deep trench and a pad-TWV feature in the opening, where the top metal pad being connected to the TWV feature through the pad-TWV feature; and applying a polishing process to remove excessive conductive material, forming a substantially planar surface. | 04-15-2010 |
20100102411 | PHOTODETECTOR FOR BACKSIDE-ILLUMINATED SENSOR - A backside-illuminated sensor including a semiconductor substrate. The semiconductor substrate has a front surface and a back surface. A plurality of pixels are formed on the front surface of the semiconductor substrate. At least one pixel includes a photogate structure. The photogate structure has a metal gate that includes a reflective layer. | 04-29-2010 |
20100181283 | DUAL METAL FOR A BACKSIDE PACKAGE OF BACKSIDE ILLUMINATED IMAGE SENSOR - A method for fabricating a semiconductor device with improved bonding ability is disclosed. The method comprises providing a substrate having a front surface and a back surface; forming one or more sensor elements on the front surface of the substrate; forming one or more metallization layers over the front surface of the substrate, wherein forming a first metallization layer comprises forming a first conductive layer over the front surface of the substrate; removing the first conductive layer from a first region of the substrate; forming a second conductive layer over the front surface of the substrate; and removing portions of the second conductive layer from the first region and a second region of the substrate, wherein the first metallization layer in the first region comprises the second conductive layer and the first metallization layer in the second region comprises the first conductive layer and the second conductive layer. | 07-22-2010 |
20100184242 | METHOD OF IMPLANTATION - Provided is a method of implanting dopant ions to an integrated circuit. The method includes forming a first pixel and a second pixel in a substrate, forming an etch stop layer over the substrate, forming a hard mask layer over the etch stop layer, patterning the hard mask layer to include an opening between the first pixel and the second pixel, and implanting a plurality of dopants through the opening to form an isolation feature. | 07-22-2010 |
20100213560 | PAD DESIGN FOR BACKSIDE ILLUMINATED IMAGE SENSOR - A semiconductor image sensor device includes first and second semiconductor substrates. A pixel array and a control circuit are formed in a first surface of the first substrate. An interconnect layer is formed over the first surface of the first substrate and electrically connects the control circuit to the pixel array. A top conducting layer is formed over the interconnect layer to have electrical connectivity with at least one of the control circuit or the pixel array via the interconnect layer. A surface of a second substrate is bonded to the top conducting layer. A conductive through-silicon-via (TSV) passes through the second substrate, and has electrical connectivity with the top conducting layer. A terminal is formed on an opposite surface of the second substrate, and electrically connected to the TSV. | 08-26-2010 |
20100220226 | FRONT SIDE IMPLANTED GUARD RING STRUCTURE FOR BACKSIDE ILLUMINATED IMAGE SENSOR - An image sensor includes a semiconductor substrate, a guard ring structure in the substrate, and at least one pixel surrounded by the guard ring structure. The guard ring structure is implanted in the substrate by high-energy implantation. | 09-02-2010 |
20100233871 | METHOD FOR GENERATING TWO DIMENSIONS FOR DIFFERENT IMPLANT ENERGIES - A method for fabricating an integrated circuit device is disclosed. The method includes providing a substrate; forming a first hard mask layer over the substrate; patterning the first hard mask layer to form one or more first openings having a first critical dimension; performing a first implantation process on the substrate; forming a second hard mask layer over the first hard mask layer to form one or more second openings having a second critical dimension; and performing a second implantation process. | 09-16-2010 |
20100243868 | METHOD AND APPARATUS OF IMPROVING EFFICIENCY OF AN IMAGE SENSOR - Provided is an image sensor device. The image sensor device includes a device substrate having a front side and a back side. The device substrate has a radiation-sensing region that can sense radiation that has a corresponding wavelength. The image sensor also includes a first layer formed over the front side of the device substrate. The first layer has a first refractive index and a first thickness that is a function of the first refractive index. The image sensor also has a second layer formed over the first layer. The second layer is different from the first layer and has a second refractive index and a second thickness that is a function of the second refractive index. | 09-30-2010 |
20100244173 | IMAGE SENSOR AND METHOD OF FABRICATING SAME - Provided is a method of fabricating an image sensor device. The method includes providing a device substrate having a front side and a back side. The method includes forming first and second radiation-sensing regions in the device substrate, the first and second radiation-sensing regions being separated by an isolation structure. The method also includes forming a transparent layer over the back side of the device substrate. The method further includes forming an opening in the transparent layer, the opening being aligned with the isolation structure. The method also includes filling the opening with an opaque material. | 09-30-2010 |
20100252870 | DUAL SHALLOW TRENCH ISOLATION AND RELATED APPLICATIONS - Embodiments of the invention relate to dual shallow trench isolations (STI). In various embodiments related to CMOS Image Sensor (CIS) technologies, the dual STI refers to one STI structure in the pixel region and another STI structure in the periphery or logic region. The depth of each STI structure depends on the need and/or isolation tolerance of devices in each region. In an embodiment, the pixel region uses NMOS devices and the STI in this region is shallower than that of in the periphery region that includes both NMOS and PMOS device having different P- and N-wells and that desire more protective isolation (i.e., deeper STI). Depending on implementations, different numbers of masks (e.g., two, three) are used to generate the dual STI, and are disclosed in various method embodiments. | 10-07-2010 |
20100270636 | ISOLATION STRUCTURE FOR BACKSIDE ILLUMINATED IMAGE SENSOR - A backside illuminated image sensor includes an isolation structure passing through a substrate, a sensor element formed overlying the front surface of the substrate, and a color filter formed overlying the back surface of the substrate. | 10-28-2010 |
20100273289 | METHOD OF FABRICATING A BACKSIDE ILLUMINATED IMAGE SENSOR - A method of forming a backside illuminated image sensor using an SOI substrate including a handle substrate, an insulator formed on the handle substrate, and a semiconductor layer formed on the insulator. A sensor element is formed on the semiconductor layer, a dielectric layer is formed overlying the semiconductor layer and the sensor element; and an interconnection structure is formed in the dielectric layer to electrically connect the sensor element. A carrier substrate is forming the dielectric layer. After flipping, the handle substrate is removed to expose the insulator layer. | 10-28-2010 |
20100279459 | METHOD FOR REDUCING CONTACT RESISTANCE OF CMOS IMAGE SENSOR - A method for performing a CMOS Image Sensor (CIS) silicide process is provided to reduce pixel contact resistance. In one embodiment, the method comprises forming a Resist Protect Oxide (RPO) layer on the CIS, forming a Contact Etch Stop Layer (CESL), forming an Inter-Layer Dielectric (ILD) layer, performing contact lithography/etching, performing Physical Vapor Deposition (PVD) at a pixel contact hole area, annealing for silicide formation at pixel contact hole area, performing contact filling, and defining the first metal layer. The Resist Protect Oxide (RPO) layer can be formed without using a photo mask of Cell Resist Protect Oxide (CIRPO) photolithography for pixel array and/or without silicide process at pixel array. The method can include implanting N+ or P+ for pixel contact plugs at the pixel contact hole area. The contact filling can comprise depositing contact glue plugs and performing Chemical Mechanical Polishing (CMP). | 11-04-2010 |
20100289102 | METHOD OF MAKING DEEP JUNCTION FOR ELECTRICAL CROSSTALK REDUCTION OF AN IMAGE SENSOR - The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a substrate having a front surface and a back surface; a plurality of sensor elements formed on the front surface of the substrate, each of the plurality of sensor elements configured to receive light directed towards the back surface; and an aluminum doped feature formed in the substrate and disposed horizontally between two adjacent elements of the plurality of sensor elements and vertically between the back surface and the plurality of sensor elements. | 11-18-2010 |
20110049589 | BACKSIDE ILLUMINATED IMAGE SENSOR HAVING CAPACITOR ON PIXEL REGION - A backside illuminated image sensor includes a semiconductor substrate having a front side and backside, a sensor element formed overlying the frontside of the semiconductor substrate, and a capacitor formed overlying the sensor element. | 03-03-2011 |
20110081766 | METHOD FOR DOPING A SELECTED PORTION OF A DEVICE - A method includes forming a protective layer with an opening over a substrate, thereafter implanting a dopant into a substrate region through the opening, the protective layer protecting a different substrate region, and reducing thickness of the protective layer. A different aspect includes etching a substrate to form a recess therein, thereafter implanting a dopant into a substrate region within the recess and through an opening in a protective layer provided over the substrate, and reducing thickness of the protective layer. Another aspect includes forming a protective layer over a substrate, forming photoresist having an opening over the protective layer, etching the protective layer through the opening to expose the substrate, etching the substrate to form a recess in the substrate, implanting a dopant into a substrate portion, the protective layer protecting a different substrate portion thereunder, and etching the protective layer to reduce its thickness. | 04-07-2011 |
20110183460 | Light Shield for CMOS Imager - System and method for providing a light shield for a CMOS imager is provided. The light shield comprises a structure formed above a point between a photo-sensitive element and adjacent circuitry. The structure is formed of a light-blocking material, such as a metal, metal alloy, metal compound, or the like, formed in dielectric layers over the photo-sensitive elements. | 07-28-2011 |
20110254115 | INSERTED REFLECTIVE SHIELD TO IMPROVE QUANTUM EFFICIENCY OF IMAGE SENSORS - The structures of reflective shields and methods of making such structures described enable reflection of light that has not be absorbed by photodiodes in image sensor devices and increase quantum efficiency of the photodiodes. Such structures can be applied (or used) for any image sensors to improve image quality. Such structures are particular useful for image sensors with smaller pixel sizes and for long-wavelength light (or rays), whose absorption length (or depth) could be insufficient, especially for backside illumination (BSI) devices. The reflective shields could double, or more than double, the absorption depth for light passing through the image sensors and getting reflected back to the photodiodes. Concave-shaped reflective shields have the additional advantage of directing reflected light toward the image sensors. | 10-20-2011 |
20110260280 | Back Side Defect Reduction For Back Side Illuminated Image Sensor - Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side. The image sensor also includes a radiation-detection device that is formed in the substrate. The radiation-detection device is operable to detect a radiation wave that enters the substrate through the back side. The image sensor further includes a recrystallized silicon layer. The recrystalized silicon layer is formed on the back side of the substrate. The recrystalized silicon layer has different photoluminescence intensity than the substrate. | 10-27-2011 |
20110294250 | IMAGE SENSOR ELEMENT FOR BACKSIDE-ILLUMINATED SENSOR - Provided is a method of forming and/or using a backside-illuminated sensor including a semiconductor substrate having a front surface and a back surface. A transfer transistor and a photodetector are formed on the front surface. The gate of the transfer transistor includes an optically reflective layer. The gate of the transfer transistor, including the optically reflective layer, overlies the photodetector. Radiation incident the back surface and tratversing the photodetector may be reflected by the optically reflective layer. The reflected radiation may be sensed by the photodetector. | 12-01-2011 |
20110298072 | RIDGE STRUCTURE FOR BACK SIDE ILLUMINATED IMAGE SENSOR - Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side. The image sensor includes first and second radiation-detection devices that are disposed in the substrate. The first and second radiation-detection devices are operable to detect radiation waves that enter the substrate through the back side. The image sensor also includes an anti-reflective coating (ARC) layer. The ARC layer is disposed over the back side of the substrate. The ARC layer has first and second ridges that are disposed over the first and second radiation-detection devices, respectively. The first and second ridges each have a first refractive index value. The first and second ridges are separated by a substance having a second refractive index value that is less than the first refractive index value. | 12-08-2011 |
20120007156 | METHOD AND STRUCTURE TO REDUCE DARK CURRENT IN IMAGE SENSORS - A method to fabricate an image sensor includes providing a semiconductor substrate having a pixel region and a periphery region, forming a light sensing element on the pixel region, and forming at least one transistor in the pixel region and at least one transistor in the periphery region. The step of forming the at least one transistor in the pixel region and periphery region includes forming a gate electrode in the pixel region and periphery region, depositing a dielectric layer over the pixel region and periphery region, partially etching the dielectric layer to form sidewall spacers on the gate electrode and leaving a portion of the dielectric layer overlying the pixel region, and forming source/drain (S/D) regions by ion implantation. | 01-12-2012 |
20120025199 | Image Sensor with Deep Trench Isolation Structure - Provided is a back side illuminated image sensor device. The image sensor device includes a substrate having a front side and a back side opposite the front side. The image sensor also includes a radiation-detection device that is formed in the substrate. The radiation-detection device is operable to detect a radiation wave that enters the substrate through the back side. The image sensor further includes a deep trench isolation feature that is disposed adjacent to the radiation-detection device. The image sensor device further includes a doped layer that at least partially surrounds the deep trench isolation feature in a conformal manner. | 02-02-2012 |
20120038015 | ANTIREFLECTIVE LAYER FOR BACKSIDE ILLUMINATED IMAGE SENSOR AND METHOD OF MANUFACTURING SAME - The present disclosure provides an image sensor device that exhibits improved quantum efficiency. For example, a backside illuminated (BSI) image sensor device is provided that includes a substrate having a front surface and a back surface; a light sensing region disposed at the front surface of the substrate; and an antireflective layer disposed over the back surface of the substrate. The antireflective layer has an index of refraction greater than or equal to about 2.2 and an extinction coefficient less than or equal to about 0.05 when measured at a wavelength less than 700 nm. | 02-16-2012 |
20120038017 | Method for Making Multi-Step Photodiode Junction Structure for Backside Illuminated Sensor - A method of making a backside illuminated sensor is provided. A substrate is provided and a high energy ion implantation is performed over the substrate to implant a first doped region. A layer is formed over the substrate and a self-align high energy ion implantation is performed over the substrate to implant a second doped region over the first doped region. The combined thickness of the first and second doped region is greater than 50 percent of thickness of the substrate and the distance between back surface of the substrate and the first and second doped regions is less than 50 percent of thickness of the substrate. In this way, an enlarged light sensing region is formed through which electrons generated from back surface of the surface may easily reach the pixel. | 02-16-2012 |
20120038020 | SEAL RING STRUCTURE WITH METAL PAD - A method includes providing a substrate having a seal ring region and a circuit region, forming a seal ring structure over the seal ring region, forming a first frontside passivation layer above the seal ring structure, etching a frontside aperture in the first frontside passivation layer adjacent to an exterior portion of the seal ring structure, forming a frontside metal pad in the frontside aperture to couple the frontside metal pad to the exterior portion of the seal ring structure, forming a first backside passivation layer below the seal ring structure, etching a backside aperture in the first backside passivation layer adjacent to the exterior portion of the seal ring structure, and forming a backside metal pad in the backside aperture to couple the backside metal pad to the exterior portion of the seal ring structure. Semiconductor devices fabricated by such a method are also provided. | 02-16-2012 |
20120038028 | MULTIPLE SEAL RING STRUCTURE - The present disclosure provides a method of fabricating a semiconductor device, the method including providing a substrate having a seal ring region and a circuit region, forming a first seal ring structure over the seal ring region, forming a second seal ring structure over the seal ring region and adjacent to the first seal ring structure, and forming a first passivation layer disposed over the first and second seal ring structures. A semiconductor device fabricated by such a method is also provided. | 02-16-2012 |
20120187282 | IMAGE SENSOR WITH ANTI-REFLECTION LAYER AND METHOD OF MANUFACTURING THE SAME - An image sensor the image sensor comprising an absorption layer disposed on a silicon substrate, the absorption layer having at least one of SiGe or Ge, and an antireflection layer disposed directly thereon. | 07-26-2012 |
20120205730 | TRANSPARENT CONDUCTIVE FILM FOR IMPROVING CHARGE TRANSFER IN BACKSIDE ILLUMINATED IMAGE SENSOR - The present disclosure provides an image sensor device and a method of forming the image sensor device. In an example, an image sensor device includes a substrate having a front surface and a back surface; a sensor element disposed at the front surface of the substrate, the sensor element being operable to sense radiation projected toward the back surface of the substrate; and a transparent conductive layer disposed over the back surface of the substrate, the transparent conductive layer at least partially overlying the sensor element. The transparent conductive layer is configured for being electrically coupled to a bottom portion of the sensor element. | 08-16-2012 |
20120205769 | BACK SIDE ILLUMINATED IMAGE SENSOR WITH REDUCED SIDEWALL-INDUCED LEAKAGE - Provided is an image sensor device. The image sensor device includes having a front side, a back side, and a sidewall connecting the front and back sides. The image sensor device includes a plurality of radiation-sensing regions disposed in the substrate. Each of the radiation-sensing regions is operable to sense radiation projected toward the radiation-sensing region through the back side. The image sensor device includes an interconnect structure that is coupled to the front side of the substrate. The interconnect structure includes a plurality of interconnect layers and extends beyond the sidewall of the substrate. The image sensor device includes a bonding pad that is spaced apart from the sidewall of the substrate. The bonding pad is electrically coupled to one of the interconnect layers of the interconnect structure. | 08-16-2012 |
20120273914 | Image Sensor and Method of Fabricating Same - Provided is a method of fabricating an image sensor device. The method includes providing a device substrate having a front side and a back side. The method includes forming first and second radiation-sensing regions in the device substrate, the first and second radiation-sensing regions being separated by an isolation structure. The method also includes forming a transparent layer over the back side of the device substrate. The method further includes forming an opening in the transparent layer, the opening being aligned with the isolation structure. The method also includes filling the opening with an opaque material. | 11-01-2012 |
20120280346 | SENSOR STRUCTURE FOR OPTICAL PERFORMANCE ENHANCEMENT - The present disclosure provides various embodiments of an image sensor device. An exemplary image sensor device includes an image sensing region disposed in a substrate; a multilayer interconnection structure disposed over the substrate; and a color filter formed in the multilayer interconnection structure and aligned with the image sensing region. The color filter has a length and a width, where the length is greater than the width. | 11-08-2012 |
20120280348 | BACK SIDE ILLUMINATED IMAGE SENSOR WITH IMPROVED STRESS IMMUNITY - Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side opposite the first side. The substrate has a pixel region and a periphery region. The image sensor device includes a plurality of radiation-sensing regions disposed in the pixel region of the substrate. Each of the radiation-sensing regions is operable to sense radiation projected toward the radiation-sensing region through the back side. The image sensor device includes a reference pixel disposed in the periphery region. The image sensor device includes an interconnect structure that is coupled to the front side of the substrate. The interconnect structure includes a plurality of interconnect layers. The image sensor device includes a film formed over the back side of the substrate. The film causes the substrate to experience a tensile stress. The image sensor device includes a radiation-blocking device disposed over the film. | 11-08-2012 |
20120280351 | ALIGNMENT FOR BACKSIDE ILLUMINATION SENSOR - Provided is an apparatus that includes an integrated circuit located in a first region of a substrate having first and second opposing major surfaces and an alignment mark located in a second region of the substrate and extending through the substrate between the first and second surfaces. | 11-08-2012 |
20120288982 | METHOD FOR REDUCING CONTACT RESISTANCE OF CMOS IMAGE SENSOR - This description relates to a method for reducing CMOS Image Sensor (CIS) contact resistance, the CIS having a pixel array and a periphery. The method includes performing Physical Vapor Deposition (PVD) at a pixel contact hole area, annealing for silicide formation at the pixel contact hole area and performing contact filling. This description also relates to a method for reducing CMOS Image Sensor (CIS) contact resistance, the CIS having a pixel array and a periphery. The method includes implanting N+ or P+ for pixel contact plugs at a pixel contact hole area, performing Physical Vapor Deposition (PVD) at pixel contact hole area, annealing for silicide formation at the pixel contact hole area, performing contact filling and depositing a first metal film layer, wherein the first metal film layer links contact holes for a source, a drain, or a poly gate of a CMOS device. | 11-15-2012 |
20120292728 | Semiconductor Device Having a Bonding Pad and Shield Structure and Method of Manufacturing the Same - A semiconductor device includes a device substrate having a front side and a back side corresponding to a front side and a back side of the semiconductor device, a metal feature formed on the front side of the device substrate, a bonding pad disposed on the back side of the semiconductor device and in electrical communication with the metal feature, and a shield structure disposed on the back side of the device substrate in which the shield structure and the bonding pad have different thicknesses relative to each other. | 11-22-2012 |
20120292730 | Semiconductor Device Having a Bonding Pad and Method of Manufacturing The Same - A semiconductor device including a device substrate having a front side and a back side. The semiconductor device further includes an interconnect structure disposed on the front side of the device substrate, the interconnect structure having a n-number of metal layers. The semiconductor device also includes a bonding pad disposed on the back side of the device substrate, the bonding pad extending through the interconnect structure and directly contacting the nth metal layer of the n-number of metal layers. | 11-22-2012 |
20130001725 | METHOD OF FABRICATING BACKSIDE-ILLUMINATED IMAGE SENSOR - Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor. | 01-03-2013 |
20130009270 | BACKSIDE ILLUMINATION SENSOR HAVING A BONDING PAD STRUCTURE AND METHOD OF MAKING THE SAME - The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure comprises a device substrate having a front side and a back side; an interconnect structure disposed on the front side of the device substrate; and a bonding pad connected to the interconnect structure. The bonding pad comprises a recessed region in a dielectric material layer; a dielectric mesa of the dielectric material layer interposed between the recessed region; and a metal layer disposed in the recessed region and on the dielectric mesa. | 01-10-2013 |
20130020662 | NOVEL CMOS IMAGE SENSOR STRUCTURE - Provided is a method of fabricating an image sensor device. The method includes providing a first substrate having a radiation-sensing region disposed therein. The method includes providing a second substrate having a hydrogen implant layer, the hydrogen implant layer dividing the second substrate into a first portion and a second portion. The method includes bonding the first portion of the second substrate to the first substrate. The method includes after the bonding, removing the second portion of the second substrate. The method includes after the removing, forming one or more microelectronic devices in the first portion of the second substrate. The method includes forming an interconnect structure over the first portion of the second substrate, the interconnect structure containing interconnect features that are electrically coupled to the microelectronic devices. | 01-24-2013 |
20130026467 | DUAL METAL FOR A BACKSIDE PACKAGE OF BACKSIDE ILLUMINATED IMAGE SENSOR - A method for fabricating a semiconductor device with improved bonding ability is disclosed. The method comprises providing a substrate having a front surface and a back surface; forming one or more sensor elements on the front surface of the substrate; forming one or more metallization layers over the front surface of the substrate, wherein forming a first metallization layer comprises forming a first conductive layer over the front surface of the substrate; removing the first conductive layer from a first region of the substrate; forming a second conductive layer over the front surface of the substrate; and removing portions of the second conductive layer from the first region and a second region of the substrate, wherein the first metallization layer in the first region comprises the second conductive layer and the first metallization layer in the second region comprises the first conductive layer and the second conductive layer. | 01-31-2013 |
20130032912 | High-k Dielectric Liners in Shallow Trench Isolations - A circuit structure includes a semiconductor substrate having a top surface. A dielectric material extends from the top surface into the semiconductor substrate. A high-k dielectric layer is formed of a high-k dielectric material, wherein the high-k dielectric layer comprises a first portion on a sidewall of the dielectric material, and a second portion underlying the dielectric material. | 02-07-2013 |
20130032920 | Pad Structures Formed in Double Openings in Dielectric Layers - An image sensor device includes a semiconductor substrate having a front side and a backside. A first dielectric layer is on the front side of the semiconductor substrate. A metal pad is in the first dielectric layer. A second dielectric layer is over the first dielectric layer and on the front side of the semiconductor substrate. An opening penetrates through the semiconductor substrate from the backside of the semiconductor substrate, wherein the opening includes a first portion extending to expose a portion of the metal pad and a second portion extending to expose a portion of the second dielectric layer. A metal layer is formed in the first portion and the second portion of the opening. | 02-07-2013 |
20130037890 | MULTIPLE GATE DIELECTRIC STRUCTURES AND METHODS OF FORMING THE SAME - The present disclosure provides for multiple gate dielectric semiconductor structures and methods of forming such structures. In one embodiment, a method of forming a semiconductor structure includes providing a substrate including a pixel array region, an input/output (I/O) region, and a core region. The method further includes forming a first gate dielectric layer over the pixel array region, forming a second gate dielectric layer over the I/O region, and forming a third gate dielectric layer over the core region, wherein the first gate dielectric layer, the second gate dielectric layer, and the third gate dielectric layer are each formed to be comprised of a different material and to have a different thickness. | 02-14-2013 |
20130037958 | CMOS Image Sensor and Method for Forming the Same - An integrated circuit structure includes an interconnect structure that includes a plurality of metal layers, wherein the interconnect structure is under a semiconductor substrate. A metal pad is formed in one of the plurality of metal layers. A dielectric pad extends from a bottom surface of the semiconductor substrate up into the semiconductor substrate. An opening extends from a top surface of the semiconductor substrate down to penetrate through the semiconductor substrate and the dielectric pad. An edge of the semiconductor substrate in the opening is vertically aligned to an edge of the dielectric pad in the opening. The opening stops on a top surface of the metal pad. A dielectric spacer is disposed in the opening, wherein the dielectric spacer is formed on the edge of the semiconductor substrate and the edge of the dielectric pad. | 02-14-2013 |
20130082346 | SEAL RING STRUCTURE WITH A METAL PAD - A method includes providing a substrate having a seal ring region and a circuit region, forming a seal ring structure over the seal ring region, forming a first frontside passivation layer above the seal ring structure, etching a frontside aperture in the first frontside passivation layer adjacent to an exterior portion of the seal ring structure, forming a frontside metal pad in the frontside aperture to couple the frontside metal pad to the exterior portion of the seal ring structure, forming a first backside passivation layer below the seal ring structure, etching a backside aperture in the first backside passivation layer adjacent to the exterior portion of the seal ring structure, and forming a backside metal pad in the backside aperture to couple the backside metal pad to the exterior portion of the seal ring structure. Semiconductor devices fabricated by such a method are also provided. | 04-04-2013 |
20130093036 | METHOD OF FABRICATING BACKSIDE-ILLUMINATED IMAGE SENSOR - Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor. | 04-18-2013 |
20130109153 | MULTIPLE SEAL RING STRUCTURE | 05-02-2013 |
20130147993 | Apparatus and Method for Reducing Optical Cross-Talk in Image Sensors - An image sensor device includes a semiconductor substrate having a front surface and a back surface; an array of pixels formed on the front surface of the semiconductor substrate, each pixel being adapted for sensing light radiation; an array of color filters formed over the plurality of pixels, each color filter being adapted for allowing a wavelength of light radiation to reach at least one of the plurality of pixels; and an array of micro-lens formed over the array of color filters, each micro-lens being adapted for directing light radiation to at least one of the color filters in the array. The array of color filters includes structure adapted for blocking light radiation that is traveling towards a region between adjacent micro-lens. | 06-13-2013 |
20130277719 | Gate Electrodes with Notches and Methods for Forming the Same - A device includes a semiconductor substrate, and a Device Isolation (DI) region extending from a top surface of the semiconductor substrate into the semiconductor substrate. A gate dielectric is disposed over an active region of the semiconductor substrate, wherein the gate dielectric extends over the DI region. A gate electrode is disposed over the gate dielectric, wherein a notch of the gate electrode overlaps a portion of the DI region. | 10-24-2013 |
20130277785 | Methods and Apparatus for Glass Removal in CMOS Image Sensors - Methods for glass removal while forming CMOS image sensors. A method for forming a device is provided that includes forming a plurality of pixel arrays on a device wafer; bonding a carrier wafer to a first side of the device wafer; bonding a substrate over a second side of the device wafer; thinning the carrier wafer; forming electrical connections to the first side of the device wafer; subsequently de-bonding the substrate from the second side of the device wafer; and subsequently singulating individuals ones of the plurality of pixel arrays from the device wafer. An apparatus is disclosed. | 10-24-2013 |
20130277789 | Methods and Apparatus for Via Last Through-Vias - Methods for forming via last through-vias. A method includes providing an active device wafer having a front side including conductive interconnect material disposed in dielectric layers and having an opposing back side; providing a carrier wafer having through vias filled with an oxide extending from a first surface of the carrier wafer to a second surface of the carrier wafer; bonding the front side of the active device wafer to the second surface of the carrier wafer; etching the oxide in the through vias in the carrier wafer to form through oxide vias; and depositing conductor material into the through oxide vias to form conductors that extend to the active carrier wafer and make electrical contact to the conductive interconnect material. An apparatus includes a carrier wafer with through oxide vias extending through the carrier wafer to an active device wafer bonded to the carrier wafer. | 10-24-2013 |
20130284885 | Method and Apparatus for Image Sensor Packaging - Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a sensor device with an application specific integrated circuit (ASIC) are disclosed. According to an embodiment, a sensor device may be bonded together face-to-face with an ASIC without using a carrier wafer, where corresponding bond pads of the sensor are aligned with bond pads of the ASIC and bonded together, in a one-to-one fashion. A column of pixels of the sensor may share a bond bad connected by a shared inter-metal line. The bond pads may be of different sizes and configured in different rows to be disjoint from each other. Additional dummy pads may be added to increase the bonding between the sensor and the ASIC. | 10-31-2013 |
20130285179 | Image Sensor Device and Method - A system and method for reducing cross-talk between photosensitive diodes is provided. In an embodiment a first color filter is formed over a first photosensitive diode and a second color filter is formed over a second photosensitive diode, and a gap is formed between the first color filter and the second color filter. The gap will serve to reflect light that otherwise would have crossed from the first color filter to the second color filter, thereby reducing cross-talk between the first photosensitive diode and the second photosensitive diode. A reflective grid may also be formed between the first photosensitive diode and the second photosensitive diode in order to assist in the reflection and further reduce the amount of cross-talk. | 10-31-2013 |
20130285180 | Apparatus for Vertically Integrated Backside Illuminated Image Sensors - A backside illuminated image sensor comprises a photodiode and a first transistor located in a first chip, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a second transistor formed in a second chip and a plurality of logic circuits formed in a third chip, wherein the second chip is stacked on the first chip and the third chip is stacked on the second chip. The logic circuit, the second transistor and the first transistor are coupled to each other through a plurality of boding pads and through vias. | 10-31-2013 |
20130285181 | Apparatus and Method for Reducing Cross Talk in Image Sensors - A method for reducing cross talk in image sensors comprises providing a backside illuminated image sensor wafer, forming an isolation region in the backside illuminated image sensor wafer, wherein the isolation region encloses a photo active region, forming an opening in the isolation region from a backside of the backside illuminated image sensor wafer and covering an upper terminal of the opening with a dielectric material to form an air gap embedded in the isolation region of the backside illuminated image sensor wafer. | 10-31-2013 |
20130292750 | IMAGE DEVICE AND METHODS OF FORMING THE SAME - A method of forming of an image sensor device includes an isolation well formed in a pixel region of a substrate. The isolation well has a first conductivity type. A gate stack is formed over the isolation well on the substrate. A mask layer is formed over the isolation well and covering at least a majority portion of the gate stack. A plurality of dopants is implanted in the pixel region, using the gate stack and the mask layer as masks, to form doped isolation features. The plurality of dopants has the first conductivity type. A source region and a drain region are formed on opposite sides of the gate stack in the substrate. The source region and the drain region have a second conductivity type opposite to the A conductivity. | 11-07-2013 |
20130299886 | Backside Structure and Methods for BSI Image Sensors - BSI image sensors and methods. In an embodiment, a substrate is provided having a sensor array and a periphery region and having a front side and a back side surface; a bottom anti-reflective coating (BARC) is formed over the back side to a first thickness, over the sensor array region and the periphery region; forming a first dielectric layer over the BARC; a metal shield is formed; selectively removing the metal shield from over the sensor array region; selectively removing the first dielectric layer from over the sensor array region, wherein a portion of the first thickness of the BARC is also removed and a remainder of the first thickness of the BARC remains during the process of selectively removing the first dielectric layer; forming a second dielectric layer over the remainder of the BARC and over the metal shield; and forming a passivation layer over the second dielectric layer. | 11-14-2013 |
20130299931 | Backside Structure for BSI Image Sensor - An embodiment method for forming an image sensor includes forming an anti-reflective coating over a surface of a semiconductor supporting a photodiode, forming an etching stop layer over the anti-reflective coating, forming a buffer oxide over the etching stop layer, and selectively removing a portion of the buffer oxide through etching, the etching stop layer protecting the anti-reflective coating during the etching. An embodiment image sensor includes a semiconductor disposed in an array region and in a periphery region, the semiconductor supporting a photodiode in the array region, an anti-reflective coating disposed over a surface of the semiconductor, an etching stop layer disposed over the anti-reflective coating, a thickness of the etching stop layer over the photodiode in the array region less than a thickness of the etching stop layer in the periphery region, and a buffer oxide disposed over the etching stop layer in the periphery region. | 11-14-2013 |
20130307103 | Vertically Integrated Image Sensor Chips and Methods for Forming the Same - A device includes a Backside Illumination (BSI) image sensor chip, which includes an image sensor disposed on a front side of a first semiconductor substrate, and a first interconnect structure including a plurality of metal layers on the front side of the first semiconductor substrate. A device chip is bonded to the image sensor chip. The device chip includes an active device on a front side of a second semiconductor substrate, and a second interconnect structure including a plurality of metal layers on the front side of the second semiconductor substrate. A first via penetrates through the BSI image sensor chip to connect to a first metal pad in the second interconnect structure. A second via penetrates through a dielectric layer in the first interconnect structure to connect to a second metal pad in the first interconnect structure, wherein the first via and the second via are electrically connected. | 11-21-2013 |
20130307104 | Image Sensor Structure to Reduce Cross-Talk and Improve Quantum Efficiency - A semiconductor device includes a substrate including a pixel region incorporating a photodiode, a grid disposed over the substrate and having walls defining a cavity vertically aligned with the pixel region, and a color filter material disposed in the cavity between the walls of the grid. | 11-21-2013 |
20130307107 | BSI Image Sensor Chips with Separated Color Filters and Methods for Forming the Same - A device includes a semiconductor substrate having a front side and a backside. A plurality of image sensors is disposed at the front side of the semiconductor substrate. A plurality of clear color-filters is disposed on the backside of the semiconductor substrate. A plurality of metal rings encircles the plurality of clear color-filters. | 11-21-2013 |
20130320194 | Image Sensors with a High Fill-Factor - A device includes a first chip including an image sensor therein, and a second chip bonded to the first chip. The second chip includes a logic device selected from the group consisting essentially of a reset transistor, a selector, a row selector, and combinations thereof therein. The logic device and the image sensor are electrically coupled to each other, and are parts of a same pixel unit. | 12-05-2013 |
20130320420 | CMOS Image Sensors and Methods for Forming the Same - A device includes a diode, which includes a first, a second, and a third doped region in a semiconductor substrate. The first doped region is of a first conductivity type, and has a first impurity concentration. The second doped region is of the first conductivity type, and has a second impurity concentration lower than the first impurity concentration. The second doped region encircles the first doped region. The third doped region is of a second conductivity type opposite the first conductivity type, wherein the third doped region overlaps a portion of the first doped region and a portion of the second doped region. | 12-05-2013 |
20130327921 | IMAGE DEVICE AND METHODS OF FORMING THE SAME - A method of forming of an image sensor device includes a substrate having a pixel region and a periphery region. A plurality of first trenches is etched in the periphery region. Each of the first trenches has a depth D | 12-12-2013 |
20130334638 | Apparatus and Method for Backside Illuminated Image Sensors - A backside illuminated image sensor comprises a photodiode and a first transistor located in a first substrate, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a plurality of logic circuits formed in a second substrate, wherein the second substrate is stacked on the first substrate and the logic circuit are coupled to the first transistor through a plurality of bonding pads. | 12-19-2013 |
20130334645 | FRONT SIDE IMPLANTED GUARD RING STRUCTURE FOR BACKSIDE - A method of forming a backside illuminated image sensor includes forming a guard ring structure of a predetermined depth in a front-side surface of a semiconductor substrate, the guard ring structure outlining a two-dimensional array of pixels, each pixel of the array of pixels separated from an adjacent pixel by the guard ring structure. The method further includes forming at least one image sensing element on the front-side surface of the semiconductor substrate, the at least one image sensing element being formed in a pixel of the array of pixels and surrounded by the guard ring structure. The method further includes reducing a thickness of the semiconductor substrate until the guard ring structure is co-planar with a back-side surface of the semiconductor substrate. | 12-19-2013 |
20130341692 | Novel [N] Profile in Si-Ox Interface for CMOS Image Sensor Performance Improvement - A semiconductor device including first and second isolation regions supported by a substrate, a first array well supported by the first isolation region, the first array well having a first field implant layer embedded therein, the first field implant layer surrounding a first shallow trench isolation region, a second array well supported by the second isolation region, the second array well supporting a doped region and a drain and having a second field implant layer embedded therein, the second field implant layer surrounding a second shallow trench isolation region, a stack of photodiodes disposed in the substrate between the first and second isolation regions, and a gate oxide formed over an uppermost photodiode of the stack of the photodiodes, the gate oxide and a silicon of the uppermost photodiode forming an interface, a nitrogen concentration at the interface offset from a peak nitrogen concentration. | 12-26-2013 |
20130344640 | Method of Making Wafer Structure for Backside Illuminated Color Image Sensor - An integrated circuit device is provided. The integrated circuit device can include a substrate; a first radiation-sensing element disposed over a first portion of the substrate; and a second radiation-sensing element disposed over a second portion of the substrate. The first portion comprises a first radiation absorption characteristic, and the second portion comprises a second radiation absorption characteristic different from the first radiation absorption characteristic. | 12-26-2013 |
20140015084 | Method and Apparatus for Image Sensor Packaging - Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a BSI sensor device with an application specific integrated circuit (ASIC) are disclosed. A bond pad array may be formed in a bond pad area of a BSI sensor where the bond pad array comprises a plurality of bond pads electrically interconnected, wherein each bond pad of the bond pad array is of a small size which can reduce the dishing effect of a big bond pad. The plurality of bond pads of a bond pad array may be interconnected at the same layer of the pad or at a different metal layer. The BSI sensor may be bonded to an ASIC in a face-to-face fashion where the bond pad arrays are aligned and bonded together. | 01-16-2014 |
20140030842 | BACKSIDE ILLUMINATED IMAGE SENSOR HAVING CAPACITOR ON PIXEL REGION - An approach is provided for forming a backside illuminated image sensor that includes a semiconductor substrate having a front side and backside, a sensor element formed overlying the frontside of the semiconductor substrate, and a capacitor formed overlying the sensor element. | 01-30-2014 |
20140035013 | Novel CMOS Image Sensor Structure - Provided is a method of fabricating an image sensor device. The method includes providing a first substrate having a radiation-sensing region disposed therein. The method includes providing a second substrate having a hydrogen implant layer, the hydrogen implant layer dividing the second substrate into a first portion and a second portion. The method includes bonding the first portion of the second substrate to the first substrate. The method includes after the bonding, removing the second portion of the second substrate. The method includes after the removing, forming one or more microelectronic devices in the first portion of the second substrate. The method includes forming an interconnect structure over the first portion of the second substrate, the interconnect structure containing interconnect features that are electrically coupled to the microelectronic devices. | 02-06-2014 |
20140035082 | Elevated Photodiodes with Crosstalk Isolation - A device includes a plurality of isolation spacers, and a plurality of bottom electrodes, wherein adjacent ones of the plurality of bottom electrodes are insulated from each other by respective ones of the plurality of isolation spacers. A plurality of photoelectrical conversion regions overlaps the plurality of bottom electrodes, wherein adjacent ones of the plurality of photoelectrical conversion regions are insulated from each other by respective ones of the plurality of isolation spacers. A top electrode overlies the plurality of photoelectrical conversion regions and the plurality of isolation spacers. | 02-06-2014 |
20140035083 | Elevated Photodiode with a Stacked Scheme - A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode. | 02-06-2014 |
20140042298 | CMOS Image Sensor Chips with Stacked Scheme and Methods for Forming the Same - A device includes an image sensor chip having an image sensor therein. A read-out chip is underlying and bonded to the image sensor chip, wherein the read-out chip includes a logic device selected from the group consisting essentially of a reset transistor, a source follower, a row selector, and combinations thereof therein. The logic device and the image sensor are electrically coupled to each other, and are parts of a same pixel unit. A peripheral circuit chip is underlying and bonded to the read-out chip, wherein the peripheral circuit chip includes a logic circuit. | 02-13-2014 |
20140042299 | CMOS Image Sensor Chips with Stacked Scheme and Methods for Forming the Same - A device includes an image sensor chip including an image sensor therein. A read-out chip is underlying and bonded to the image sensor chip. The read-out chip includes a logic device selected from the group consisting essentially of a reset transistor, a source follower, a row selector, and combinations thereof therein. The logic device and the image sensor are electrically coupled to each other, and are parts of a same pixel unit. A peripheral circuit chip is underlying and bonded to the read-out chip. The peripheral circuit chip includes a logic circuit, a through via penetrating through a semiconductor substrate of the peripheral circuit chip, and an electrical connector at a bottom surface of the peripheral circuit chip. The electrical connector is electrically coupled to the logic circuit in the peripheral circuit chip through the through via. | 02-13-2014 |
20140042445 | System and Method for Fabricating a 3D Image Sensor Structure - A system and method for fabricating a 3D image sensor structure is disclosed. The method comprises providing an image sensor with a backside illuminated photosensitive region on a substrate, applying a first dielectric layer to the first side of the substrate opposite the substrate side where image data is gathered, and applying a semiconductor layer that is optionally polysilicon, to the first dielectric layer. A least one control transistor may be created on the first dielectric layer, within the semiconductor layer and may optionally be a row select, reset or source follower transistor. An intermetal dielectric may be applied over the first dielectric layer; and may have at least one metal interconnect disposed therein. A second interlevel dielectric layer may be disposed on the control transistors. The dielectric layers and semiconductor layer may be applied by bonding a wafer to the substrate or via deposition. | 02-13-2014 |
20140061737 | Isolation for Semiconductor Devices - A system and method for isolating semiconductor devices is provided. An embodiment comprises an isolation region that is laterally removed from source/drain regions of semiconductor devices and has a dielectric material extending over the isolation implant between the source/drain regions. The isolation region may be formed by forming an opening through a layer over the substrate, depositing a dielectric material along the sidewalls of the opening, implanting ions into the substrate after the deposition, and filling the opening with another dielectric material. | 03-06-2014 |
20140061837 | Image Sensor Including Multiple Lenses And Method Of Manufacture Thereof - A device includes an image sensing element. The device also includes a Silicon Dioxide (SiO | 03-06-2014 |
20140073080 | Back Side Defect Reduction for Back Side Illuminated Image Sensor - Provided is an image sensor device. The image sensor device includes a substrate having a front side and a back side. The image sensor also includes a radiation-detection device that is formed in the substrate. The radiation-detection device is operable to detect a radiation wave that enters the substrate through the back side. The image sensor further includes a recrystallized silicon layer. The recrystallized silicon layer is formed on the back side of the substrate. The recrystallized silicon layer has different photoluminescence intensity than the substrate. | 03-13-2014 |
20140077320 | Scribe Lines in Wafers - A wafer includes a plurality of chips arranged as rows and columns. A first plurality of scribe lines is between the rows of the plurality of chips. Each of the first plurality of scribe lines includes a metal-feature containing scribe line comprising metal features therein, and a metal-feature free scribe line parallel to, and adjoining, the metal-feature containing scribe line. A second plurality of scribe lines is between the columns of the plurality of chips. | 03-20-2014 |
20140090882 | PAD STRUCTURE - One or more techniques or systems for mitigating peeling associated with a pad, such as a pad of a semiconductor, are provided herein. In some embodiments, a pad structure for mitigating peeling comprises a bond region located above a first region. In some embodiments, a first inter-layer dielectric region associated with the first region is formed in an inter-layer region under the pad. Additionally, a first inter-metal dielectric region associated with the first region is formed in an inter-metal region under the inter-layer region. In some embodiments, the first inter-metal region is formed under the first inter-layer region. In this manner, peeling associated with the pad structure is mitigated, at least because the first inter-metal dielectric region comprises dielectric material and the first inter-layer dielectric region comprises dielectric material, thus forming a dielectric-dielectric interface between the first inter-metal dielectric region and the inter-layer dielectric region. | 04-03-2014 |
20140091375 | Implant Isolated Devices and Method for Forming the Same - A device includes a semiconductor substrate and implant isolation region extending from a top surface of the semiconductor substrate into the semiconductor substrate surrounding an active region. A gate dielectric is disposed over an active region of the semiconductor substrate and extends over the implant isolation region. A gate electrode is disposed over the gate dielectric and two end cap hardmasks are between the gate dielectric and the gate electrode over the implant isolation region. The two end cap hardmasks include same dopants as those implanted into the active region. | 04-03-2014 |
20140091377 | Implant Isolated Devices and Method for Forming the Same - A device includes a semiconductor substrate and implant isolation region extending from a top surface of the semiconductor substrate into the semiconductor substrate surrounding an active region. A gate dielectric is disposed over an active region of the semiconductor substrate, wherein the gate dielectric extends over the implant isolation region. A gate electrode is disposed over the gate dielectric and an end cap dielectric layer is between the gate dielectric and the gate electrode over the implant isolation region. | 04-03-2014 |
20140094016 | Alignment for Backside Illumination Sensor - Provided is an apparatus that includes an integrated circuit located in a first region of a substrate having first and second opposing major surfaces and an alignment mark located in a second region of the substrate and extending through the substrate between the first and second surfaces. | 04-03-2014 |
20140106498 | METHOD OF MAKING A REFLECTIVE SHIELD - A method of creating a reflective shield for an image sensor device includes depositing a first dielectric layer on a substrate, wherein a photodiode is on the substrate. The method further includes removing surface topography by performing chemical mechanical polishing (CMP) on the first dielectric layer. The method further includes patterning the substrate to define an area on a surface of the first dielectric layer, wherein the area is directly above the photodiode. The method further includes depositing a layer of a material with high reflectivity on the substrate, wherein the material fills the area on the surface of the first dielectric layer. The method further includes removing excess material with high reflectivity, wherein the reflective shield is formed and is embedded in the first dielectric layer. The method further includes depositing a second dielectric material on the substrate, wherein the second dielectric material covers the reflective shield. | 04-17-2014 |
20140113398 | Apparatus for Vertically Integrated Backside Illuminated Image Sensors - A backside illuminated image sensor comprises a photodiode and a first transistor located in a first chip, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a second transistor formed in a second chip and a plurality of logic circuits formed in a third chip, wherein the second chip is stacked on the first chip and the third chip is stacked on the second chip. The logic circuit, the second transistor and the first transistor are coupled to each other through a plurality of boding pads and through vias. | 04-24-2014 |
20140138752 | System and Method for Fabricating a 3D Image Sensor Structure - A system and method for fabricating a 3D image sensor structure is disclosed. The method comprises providing an image sensor with a backside illuminated photosensitive region on a substrate, applying a first dielectric layer to the first side of the substrate opposite the substrate side where image data is gathered, and applying a semiconductor layer that is optionally polysilicon, to the first dielectric layer. A least one control transistor may be created on the first dielectric layer, within the semiconductor layer and may optionally be a row select, reset or source follower transistor. An intermetal dielectric may be applied over the first dielectric layer; and may have at least one metal interconnect disposed therein. A second interlevel dielectric layer may be disposed on the control transistors. The dielectric layers and semiconductor layer may be applied by bonding a wafer to the substrate or via deposition. | 05-22-2014 |
20140151835 | BACKSIDE ILLUMINATED IMAGE SENSORS AND METHOD OF MAKING THE SAME - A backside illuminated image sensor includes a substrate with a substrate depth, where the substrate includes a pixel region and a peripheral region. The substrate further includes a front surface and a back surface. The backside illuminated image sensor includes a first isolation structure formed in the pixel region of the substrate, where a bottom of the first isolation structure is exposed at the back surface of the substrate. The backside illuminated image sensor includes a second isolation structure formed in the peripheral region of the substrate, where the second isolation structure has a depth less than a depth of the first isolation structure. The backside illuminated image sensor includes an implant region adjacent to at least a portion of sidewalls of each isolation structure in the pixel region. | 06-05-2014 |
20140159190 | Backside Structure and Methods for BSI Image Sensors - BSI image sensors and methods. In an embodiment, a substrate is provided having a sensor array and a periphery region and having a front side and a back side surface; a bottom anti-reflective coating (BARC) is formed over the back side to a first thickness, over the sensor array region and the periphery region; forming a first dielectric layer over the BARC; a metal shield is formed; selectively removing the metal shield from over the sensor array region; selectively removing the first dielectric layer from over the sensor array region, wherein a portion of the first thickness of the BARC is also removed and a remainder of the first thickness of the BARC remains during the process of selectively removing the first dielectric layer; forming a second dielectric layer over the remainder of the BARC and over the metal shield; and forming a passivation layer over the second dielectric layer. | 06-12-2014 |
20140193940 | Method and Apparatus for Image Sensor Packaging - Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a BSI sensor device with an application specific integrated circuit (ASIC) are disclosed. A bond pad array may be formed in a bond pad area of a BSI sensor where the bond pad array comprises a plurality of bond pads electrically interconnected, wherein each bond pad of the bond pad array is of a small size which can reduce the dishing effect of a big bond pad. The plurality of bond pads of a bond pad array may be interconnected at the same layer of the pad or at a different metal layer. The BSI sensor may be bonded to an ASIC in a face-to-face fashion where the bond pad arrays are aligned and bonded together. | 07-10-2014 |
20140199804 | SEMICONDUCTOR DEVICE HAVING A BONDING PAD AND SHIELD STRUCTURE AND METHOD OF MANUFACTURING THE SAME - A method of fabricating a semiconductor device includes providing a device substrate having a front side and a back side corresponding to a front side and a back side of the semiconductor device, forming, on the front side of the device substrate, a metal feature, forming, on the back side of the device substrate, an insulating layer, forming, on the back side of the semiconductor device, a trench exposing the metal feature, forming a bonding pad in the trench in electrical communication with the metal feature, and forming, on the insulating layer, a metal shield, in which the metal shield and the bonding pad have different thicknesses relative to each other. | 07-17-2014 |
20140231887 | Method and Apparatus for Image Sensor Packaging - A backside illuminated image sensor comprises a photodiode and a first transistor in a sensor region and located in a first substrate, wherein the first transistor is electrically coupled to the photodiode. The image sensor further comprises a plurality of logic circuits formed in a second substrate, wherein the second substrate is stacked on the first substrate and the logic circuit are coupled to the first transistor through a plurality of bonding pads, the bonding pads disposed outside of the sensor region. | 08-21-2014 |
20140231949 | IMAGE SENSOR FOR MITIGATING DARK CURRENT - One or more embodiments of techniques or systems for mitigating dark current of an image sensor are provided herein. Generally, a silicon interface, such as an edge of a dielectric region or an edge between a back side interface (BSI) region and a pass region, is a source of electrons or holes which cause dark current. In some embodiments, the image sensor includes a surface protect region. For example, the surface protect region is doped with a first doping type and a photo-diode of the image sensor is doped with the same first doping type. In this manner, the surface protect region acts as an electron magnet or a hole magnet for electrons or holes from the silicon interface, thus mitigating electrons or holes from the silicon interface from being collected by the photo-diode, for example. | 08-21-2014 |
20140252521 | Image Sensor with Improved Dark Current Performance - Provided is a semiconductor image sensor device. The image sensor device includes a semiconductor substrate having a first side and a second side opposite the first side. The semiconductor substrate contains a radiation-sensing region configured to sense radiation projected toward the substrate from the second side. A first layer is disposed over the second side of the semiconductor substrate. The first layer has a first energy band gap. A second layer is disposed over the first layer. The second layer has a second energy band gap. A third layer is disposed over the second layer. The third layer has a third energy band gap. The second energy band gap is smaller than the first energy band gap and the third energy band gap. | 09-11-2014 |
20140252523 | Backside Structure and Methods for BSI Image Sensors - A back side image sensor and method of manufacture are provided. In an embodiment a bottom anti-reflective coating is formed over a substrate, and a metal shield layer is formed over the bottom anti-reflective coating. The metal shield layer is patterned to form a grid pattern over a sensor array region of the substrate, and a first dielectric layer and a second dielectric layer are formed to at least partially fill in openings within the grid pattern. | 09-11-2014 |
20140263959 | Method and Apparatus for Image Sensor Packaging - A device having a sensor die with a sensor and a control circuit die with at least one control circuit disposed therein, the control circuit die on the sensor die. A plurality of mounting pads is disposed on a second side of the sensor die. A first electrical connection connects a first one of the plurality of mounting pads to a first control circuit of the at least one sensor control circuit and a second electrical connection connects the first control circuit to the sensor. A third electrical connection connects the sensor to a second control circuit of the at least one control circuit and a fourth electrical connection connects the second control circuit to second one of the plurality of mounting pads. | 09-18-2014 |
20140264504 | Method and Apparatus for Low Resistance Image Sensor Contact - A method and apparatus for a low resistance image sensor contact, the apparatus comprising a photosensor disposed in a substrate, a first ground well disposed in a first region of the substrate, the first ground well having a resistance lower than the substrate, and a ground line disposed in a region adjacent to the first ground well. The first ground well is configured to provide a low resistance path to the ground line from the substrate for excess free carriers in the first region of the substrate. The apparatus may optionally comprise a second ground well having a lower resistance than the first ground well and disposed between the first ground well and the ground line, and may further optionally comprise a third ground well having a lower resistance than the second ground well and disposed between the second ground well and the ground line. | 09-18-2014 |
20140264508 | Structure and Method for 3D Image Sensor - The present disclosure provides an embodiment of an image sensor structure that includes a first semiconductor substrate having a plurality of imaging sensors; a first interconnect structure formed on the first semiconductor substrate; a second semiconductor substrate having a logic circuit; a second interconnect structure formed on the second semiconductor substrate, wherein the first and the second semiconductor substrates are bonded together in a configuration that the first and second interconnect structures are sandwiched between the first and second semiconductor substrates; and a backside deep contact (BDCT) feature extended from the first interconnect structure to the second interconnect structure, thereby electrically coupling the logic circuit to the image sensors. | 09-18-2014 |
20140264682 | Interconnect Sructure for Stacked Device and Method - A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element and a second semiconductor element bonded on the first semiconductor element. The first semiconductor element includes a first substrate, a common conductive feature in the first substrate, a first inter-level dielectric (ILD) layer, a first interconnection feature and a conductive plug connecting the first interconnection feature to the common conductive feature. The second semiconductor element includes a second substrate, a second ILD layers over the second substrate and a second interconnection feature in second ILD layers. The device also includes a conductive deep plug connecting to the common conductive feature in the first semiconductor element and the second interconnection feature. The conductive deep plug is separated with the conductive plug by the first ILD layer. | 09-18-2014 |
20140264683 | Imaging Sensor Structure and Method - The present disclosure provides an embodiment of a method for fabricating a three dimensional (3D) image sensor structure. The method includes providing to an image sensor substrate having image sensors formed therein and a first interconnect structure formed thereon, and a logic substrate having a logic circuit formed therein and a first interconnect structure formed thereon; bonding the logic substrate to the image sensor substrate in a configuration that the first and second interconnect structures are sandwiched between the logic substrate and the image sensor substrate; and forming a conductive feature extending from the logic substrate to the first interconnect structure, thereby electrically coupling the logic circuit to the image sensors. | 09-18-2014 |
20140264698 | Image Sensor Device and Method - A system and method for blocking heat from reaching an image sensor in a three dimensional stack with a semiconductor device. In an embodiment a heat sink is formed in a back end of line process either on the semiconductor device or else on the image sensor itself when the image sensor is in a backside illuminated configuration. The heat sink may be a grid in either a single layer or in two layers, a zig-zag pattern, or in an interleaved fingers configuration. | 09-18-2014 |
20140264709 | Interconnect Structure for Connecting Dies and Methods of Forming the Same - A structure includes a first chip having a first substrate, and first dielectric layers underlying the first substrate, with a first metal pad in the first dielectric layers. A second chip includes a second substrate, second dielectric layers over the second substrate and bonded to the first dielectric layers, and a second metal pad in the second dielectric layers. A conductive plug includes a first portion extending from a top surface of the first substrate to a top surface of the first metal pad, and a second portion extending from the top surface of the first metal pad to a top surface of the second metal pad. An edge of the second portion is in physical contact with a sidewall of the first metal pad. A dielectric layer spaces the first portion of the conductive plug from the first plurality of dielectric layers. | 09-18-2014 |
20140264862 | Interconnect Structure and Method - A semiconductor device comprises a first semiconductor chip including a first substrate and a plurality of first metal lines formed over the first substrate and a second semiconductor chip bonded on the first semiconductor chip, wherein the second semiconductor chip comprises a second substrate and a plurality of second metal lines formed over the second substrate. The semiconductor device further comprises a conductive plug coupled between the first metal lines and the second metal lines, wherein the conductive plug comprises a first portion formed over a first side of a hard mask layer, wherein the first portion is of a first width and a second portion formed over a second side of the hard mask layer, wherein the second portion is of a second width greater than or equal to the first width. | 09-18-2014 |
20140264883 | Interconnect Structure and Method of Forming Same - A semiconductor device comprises a first chip bonded on a second chip. The first chip comprises a first substrate and first interconnection components formed in first IMD layers. The second chip comprises a second substrate and second interconnection components formed in second IMD layers. The device further comprises a first conductive plug formed within the first substrate and the first IMD layers, wherein the first conductive plug is coupled to a first interconnection component and a second conductive plug formed through the first substrate and the first IMD layers and formed partially through the second IMD layers, wherein the second conductive plug is coupled to a second interconnection component. | 09-18-2014 |
20140264929 | Interconnect Structure for Stacked Device - A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers. | 09-18-2014 |
20140264947 | Interconnect Apparatus and Method - A method comprises bonding a first chip on a second chip, depositing a first hard mask layer over a non-bonding side of the first chip, depositing a second hard mask layer over the first hard mask layer, etching a first substrate of the first semiconductor chip using the second hard mask layer as a first etching mask and etching the IMD layers of the first chip and the second chip using the first hard mask layer as a second etching mask. | 09-18-2014 |
20150028403 | Semiconductor Switching Device Separated by Device Isolation - A device including a gate structure formed over a semiconductor substrate, the gate structure having extensions, a device isolation structure formed into the semiconductor substrate adjacent the gate structure, wherein the extensions are over a portion of the device isolation structure, and source/drain regions on both sides of the gate structure, the source/drain regions being formed in a gap in the device isolation structure and being partially enclosed by the extensions of the gate structure. | 01-29-2015 |
20150041945 | PICKUP DEVICE STRUCTURE WITHIN A DEVICE ISOLATION REGION - A device includes a device isolation region formed into a semiconductor substrate, a doped pickup region formed into the device isolation region, a dummy gate structure that includes at least one structure that partially surrounds the doped pickup region, and a via connected to the doped pickup region. | 02-12-2015 |
20150060963 | IMAGE SENSOR DEVICE - An image sensor device comprises an isolation well region within a substrate. A gate stack is over the isolation well region on the first surface of the substrate. The gate stack has an edge. A doped isolation feature is within the substrate between the isolation well region and the gate stack. The doped isolation feature surrounds an active area. The gate stack is over the active area. The doped isolation feature extends from the edge of the gate stack under the gate stack. | 03-05-2015 |
20150061062 | MECHANISMS FOR FORMING IMAGE-SENSOR DEVICE WITH DEEP-TRENCH ISOLATION STRUCTURE - Embodiments of mechanisms of for forming an image-sensor device are provided. The image-sensor device includes a substrate having a front surface and a back surface. The image-sensor device also includes a radiation-sensing region operable to detect incident radiation that enters the substrate through the back surface. The image-sensor device further includes a doped isolation region formed in the substrate and adjacent to the radiation-sensing region. In addition, the image-sensor device includes a deep-trench isolation structure formed in the doped isolation region. The deep-trench isolation structure includes a trench extending from the back surface and a negatively charged film covering the trench. | 03-05-2015 |
20150064832 | Elevated Photodiode with a Stacked Scheme - A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode. | 03-05-2015 |
20150079718 | Image Sensors with a High Fill-Factor - A device includes a first chip including an image sensor therein, and a second chip bonded to the first chip. The second chip includes a logic device selected from the group consisting essentially of a reset transistor, a selector, a row selector, and combinations thereof therein. The logic device and the image sensor are electrically coupled to each other, and are parts of a same pixel unit. | 03-19-2015 |