Patent application number | Description | Published |
20080237641 | Surrounded-Channel Transistors with Directionally Etched Gate or Insulator Formation Regions - An elongate stacked semiconductor structure is formed on a substrate. The stacked semiconductor structure includes a second semiconductor material region disposed on a first semiconductor material region. The first semiconductor material region is selectively doped to produce spaced-apart impurity-doped first semiconductor material regions and a lower dopant concentration first semiconductor material region therebetween. Etching exposes a portion of the second semiconductor material region between the impurity-doped first semiconductor material regions. The etching removes at least a portion of the lower dopant concentration first semiconductor material region to form a hollow between the substrate and the portion of the second semiconductor material region between the impurity-doped first semiconductor material regions. An insulation layer that surrounds the exposed portion of the second semiconductor material region between the impurity-doped first semiconductor material regions is formed. The hollow may be filled with a gate electrode that completely surrounds the exposed portion of the second semiconductor material region, or the gate electrode may partially surround the exposed portion of the second semiconductor material region and an insulation region may be formed in the hollow. | 10-02-2008 |
20080242025 | 3-DIMENSIONAL FLASH MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - In an embodiment, a 3-dimensional flash memory device includes: a gate extending in a vertical direction on a semiconductor substrate; a charge storing layer surrounding the gate; a silicon layer surrounding the charge storing layer; a channel region vertically formed in the silicon layer; and source/drain regions vertically formed on both sides of the channel region in the silicon layer. Integration can be improved by storing data in a 3-dimensional manner; a 2-bit operation can be performed by providing transistors on both sides of the gate. | 10-02-2008 |
20080308845 | Heterogeneous Group IV Semiconductor Substrates - Embodiments of the present invention include heterogeneous substrates, integrated circuits formed on such heterogeneous substrates. The heterogeneous substrates according to certain embodiments of the present invention include a first Group IV semiconductor layer (e.g., silicon), a second Group IV pattern (e.g., a silicon-germanium pattern) that includes a plurality of individual elements on the first Group IV semiconductor layer, and a third Group IV semiconductor layer (e.g., a silicon epitaxial layer) on the second Group IV pattern and on a plurality of exposed portions of the first Group IV semiconductor layer. The second Group IV pattern may be removed in embodiments of the present invention. In these and other embodiments of the present invention, the third Group IV semiconductor layer may be planarized. | 12-18-2008 |
20090119955 | GARMENT REFRESHING APPARATUS - A garment refreshing apparatus is provided. The garment refreshing apparatus includes a case, a steam generator, and a discharging device. The case stores garments. The steam generator supplies steam to the inside of the case. The discharging device is extendably connected to the steam generator, to discharge steam generated by the steam generator to the inside of the case. | 05-14-2009 |
20100012990 | MOSFETS INCLUDING CRYSTALLINE SACRIFICIAL STRUCTURES - A sub-micron channel length MOSFET includes a seamless epitaxial channel region in a substrate of the MOSFET and a buried device isolation layer beneath the seamless epitaxial channel region. In some embodiments according to the invention, a buried device isolation layer includes the buried device isolation layer beneath a central portion of the seamless epitaxial channel and absent from sidewalls of source/drain regions of the MOSFET. | 01-21-2010 |
20100044784 | Vertical Channel Fin Field-Effect Transistors Having Increased Source/Drain Contact Area and Methods for Fabricating the Same - A fin field-effect transistor (FinFET) device includes a fin-shaped active region having first and second source/drain regions therein and a channel region therebetween vertically protruding from a semiconductor substrate. A gate electrode is formed on an upper surface and sidewalls of the channel region. First and second source/drain contacts are formed on respective upper surfaces and sidewalls of the first and second source/drain regions of the fin-shaped active region at opposite sides of the gate electrode. The channel region may be narrower than the first and second source/drain regions of the fin-shaped active region. | 02-25-2010 |
20110079859 | SEMICONDUCTOR DEVICES INCLUDING FIN SHAPED SEMICONDUCTOR REGIONS AND STRESS INDUCING LAYERS - A semiconductor device may include a substrate, an active semiconductor region of the substrate, and a gate electrode. The active semiconductor region may include a channel region between first and second junction regions. The channel region may include a first semiconductor material, the first and second junction regions may include a second semiconductor material, and the first and second semiconductor materials may be different. The gate electrode may be on the channel region with portions of the first and second junction regions being free of the gate electrode. | 04-07-2011 |
20110248376 | Semiconductor Devices Having a Support Structure for an Active Layer Pattern and Methods of Forming the Same - Semiconductor devices include a semiconductor substrate with a stack structure protruding from the semiconductor substrate and surrounded by an isolation structure. The stack structure includes an active layer pattern and a gap-filling insulation layer between the semiconductor substrate and the active layer pattern. A gate electrode extends from the isolation structure around the stack structure. The gate electrode is configured to provide a support structure for the active layer pattern. The gate electrode may be a gate electrode of a silicon on insulator (SOI) device formed on the semiconductor wafer and the semiconductor device may further include a bulk silicon device formed on the semiconductor substrate in a region of the semiconductor substrate not including the gap-filing insulation layer. | 10-13-2011 |
20110272738 | Semiconductor Devices Including Fin Shaped Semiconductor Regions and Stress Inducing Layers - A semiconductor device may include a substrate, an active semiconductor region of the substrate, and a gate electrode. The active semiconductor region may include a channel region between first and second junction regions. The channel region may include a first semiconductor material, the first and second junction regions may include a second semiconductor material, and the first and second semiconductor materials may be different. The gate electrode may be on the channel region with portions of the first and second junction regions being free of the gate electrode. | 11-10-2011 |
20130054026 | ROBOT CLEANER AND CONTROL METHOD THEREOF - A robot cleaner having an improved structure which executes a cleaning operation without stoppage of travelling of the robot cleaner due to obstacles present in a space to be cleaned, and a control method thereof. The control method of the robot cleaner which is provided with a main body, driving wheels driving the main body, and driving wheel assemblies, each of which includes each driving wheel, includes detecting displacement of each driving wheel with respect to a reference position by sensing a sensed body provided on each driving wheel assembly, judging whether or not the displacement is within a predetermined reference range, and changing a travelling path of the main body, upon judging that the displacement deviates from the reference range. | 02-28-2013 |
20130057130 | GASKET APPLICABLE TO LAUNDRY TREATMENT APPARATUS, LAUNDRY TREATMENT APPARATUS HAVING THE SAME, AND MANUFACTURING METHOD AND INJECTION MOLD FOR THE SAME - A gasket and a manufacturing method and injection mold for the same are disclosed herein, in which the gasket includes a body composed of an injection molded product made from a thermoplastic elastomer while having a hollow portion and a circumferential portion enclosing a periphery of the hollow portion, and a lip which protrudes from an edge of the circumferential portion toward the hollow portion. The gasket includes a front surface coming into contact with a door when the gasket is installed in a laundry treatment apparatus and a back surface disposed behind the front surface. The back surface of the lip may be formed with an overflow protrusion during molding of the gasket. The overflow protrusion may be molded later than the lip, thereby preventing generation of poor molding at the front surface of the lip. | 03-07-2013 |