Dong Hun Lee, Yongin-Si KR
Dong Hun Lee, Yongin-Si KR
|Patent application number
|CMOS image sensors and methods for outputting pixel data at high speeds - A The CMOS image sensor includes a pixel array including pixels arranged in a matrix of rows and columns and a row selection unit configured to generate selection signals for simultaneously or concurrently selecting at least two rows from the rows of the pixel array in response to a received row address. An analog-to-digital conversion unit is configured to convert pixel data output from the at least two rows selected from the pixel array into a digital video signal and output the digital video signal. The pixel array outputs the pixel data in response to the selection signals.
|Fuel cell system - A fuel cell system includes a reformer for generating hydrogen gas from fuel containing hydrogen using a chemical catalytic reaction and thermal energy. At least one electricity generator generates electrical energy by an electrochemical reaction of the hydrogen gas and oxygen. A fuel supply assembly supplies fuel to the reformer, and an oxygen supply assembly supplies oxygen to the at least one electricity generator. A heat exchanger is connected to the reformer and to the at least one electricity generator. The heat exchanger supplies thermal energy of the reformer, during initial operation of the system, to the at least one electricity generator so as to pre-heat the at least one electricity generator.
|Pixel sensor array and image sensor including the same - Provided are a pixel sensor array and a complementary metal-oxide semiconductor (CMOS) image sensor including the same. The pixel sensor array includes a photoelectric transformation element configured to generate electric charges in response to incident light. A signal transmitting circuit is configured to output the electric charges accumulated in the photoelectric transformation element to a first node based on a first control signal, change an electric potential of the first node to an electric potential of a second signal line based on a second control signal, and output a signal sensed in the first node to a first signal line based on a third control signal. A switch element is configured to connect a supply power terminal to the second signal line based on a fourth control signal. A comparator connected to the first signal line and the second signal line and configured to compare a voltage of the signal and a voltage of a reference signal.
|Analog digital converters and image sensors including the same - The analog-digital converter (ADC) includes a modulator and a digital integrator. The modulator is configured to modulate an input signal and output a modulated signal. The digital integrator includes a plurality of accumulators serially connected to one another. The digital integrator is configured to integrate the modulated signal to output an integration result.
|Image sensor for reducing kick-back noise and image pick-up device having the same - An image sensor comprises a plurality of pixel units connected to a column line, a signal process circuit configured to process a signal output from the column line according to a switching operation, and a kick-back noise blocking circuit configured to reduce kick-back noise caused by the switching operation. Each of the pixel units includes a photoelectric conversion element. The kick-back noise blocking circuit is connected between the column line and the signal process circuit.
|Two-path sigma-delta analog-to-digital converter and image sensor including the same - A two-path sigma-delta analog-to-digital converter and an image sensor including the same are provided. The two-path sigma-delta analog-to-digital converter includes at least one integrator configured to integrate a first integrator input signal during a second half cycle of a clock signal and integrate a second integrator input signal during a first half cycle of the clock signal by using a single operational amplifier; a quantizer configured to quantize integrated signals from the at least one integrator and output a first digital signal and a second digital signal; and a feedback loop configured to feed back the first and second digital signals to an input of the at least one integrator. A first analog signal and a second analog signal respectively input from two input paths are respectively converted to the first and second digital signals using the single operational amplifier, thereby increasing power efficiency and reducing an area.
|Digital filter, analog-to-digital converter, and applications thereof - In one embodiment, the ADC includes a modulator configured to generate a symbol sequence, an operand generator configured to generate operands, and a selector configured to selectively output at least one of (1) a reference value and (2) at least one of the operands based on the symbol sequence. The ADC further includes an accumulator configured to accumulate output from the selector.
|Analog-to-digital converters, and image sensors and image processing devices having the same - An analog-digital converter (ADC) includes a correlated double sampling (CDS) circuit configured to perform CDS on each of a reset signal and an image signal output from a pixel to generate a correlated double sampled reset signal and a correlated double sampled image signal, respectively. A delta sigma (ΔΣ) ADC, also included in the ADC, is configured to output a difference between a first digital code that is generated by performing ΔΣ analog-digital conversion on the correlated double sampled reset signal and a second digital code that is generated by performing ΔΣ analog-digital conversion on the correlated double sampled image signal.
|Correlated double sampling circuit, image sensor including the same, and image processing system including the image sensor - A correlated double sampling (CDS) circuit is provided. The CDS circuit is configured to perform a CDS on a reset signal and an image signal during a CDS phase respectively. The CDS circuit includes a sampling circuit configured to output a difference between a correlated double sampled reset signal and a correlated double sampled image signal, and a feedback unit configured to feedback the difference output from the sampling circuit during a PGA phase to an input of the sampling circuit.
|ANALOG-TO-DIGITAL CONVERTER FOR CONTROLLING GAIN BY CHANGING A SYSTEM PARAMETER, IMAGE SENSOR INCLUDING THE ANALOG-TO-DIGITAL CONVERTER AND METHOD OF OPERATING THE ANALOG-TO-DIGITAL CONVERTER - Example embodiments are directed to an analog-to-digital converter (ADC) that controls a gain by changing a system parameter, an image sensor including the ADC and a method of operating the ADC. The ADC includes a sigma-delta modulator which receives an input signal and a clock signal and sigma-delta modulates the input signal into a digital output signal based on the clock signal and an accumulation unit which accumulates the digital output signal at each cycle of the clock signal according to an analog-to-digital conversion time and outputs an accumulation result. A system parameter is varied during the analog-to-digital conversion time to control a gain of the ADC. The method of operating the analog-to-digital converter includes sigma-delta modulating an input signal into a digital output signal in response to a clock signal input to the ADC; and accumulating the digital output signal at each cycle of the input clock signal according to an analog-to-digital conversion time and outputting an accumulation result.
|AMPLIFIER FOR REDUCING HORIZONTAL BAND NOISE AND DEVICES HAVING THE SAME - An amplifier is provided. The amplifier includes a differential amplifier including a tail, a current mirror connected between output terminals of the differential amplifier and a power line receiving a supply voltage, and a first switching circuit for connecting and disconnecting one of the output terminals of the differential amplifier to and from the tail in response to a first switching signal.
|CORRELATED DOUBLE SAMPLING CIRCUIT AND IMAGE SENSOR INCLUDING THE SAME - A correlated double sampling circuit includes a delta-sigma modulator, a selection circuit, and an accumulation circuit. The delta-sigma modulator is configured to receive an input signal, delta-sigma modulate the input signal, and output a modulation signal. The selection circuit is configured to invert the modulation signal and selectively output one of the modulation signal and an inverted modulation signal in response to a selection signal corresponding to an operation phase. The accumulation circuit is configured to generate a first accumulation result by performing an accumulation process on one of the modulation signal and the inverted modulation signal in a first operation phase, and generate a second accumulation result by performing the accumulation process on the first accumulation result and the other one of the modulation signal and the inverted modulation signal in a second operation phase.
|ANALOG-TO-DIGITAL CONVERTER AND IMAGE SENSOR INCLUDING THE SAME - An analog-to-digital converter includes a comparison signal generation unit and a control unit. The comparison signal generation unit determines a logic level of a comparison signal by comparing an input signal with a selected reference signal based on a switch control signal in a first comparison mode, and by comparing a difference voltage with a ramp signal based on the switch control signal in a second comparison mode. The difference voltage is generated based on the input signal and the selected reference signal such that a level of the difference voltage is lower than a fine voltage level corresponding to a voltage level of the selected reference signal in the second comparison mode. The control unit generates the switch control signal based on the comparison signal and a mode selection signal.
|DATA SAMPLER, DATA SAMPLING METHOD, AND PHOTO DETECTING APPARATUS INCLUDING DATA SAMPLER - A data sampler and a photo detecting apparatus compensate a reference signal with offset information measured from a unit pixel, and compare an offset-compensated reference signal with a data signal, thereby minimizing the impact of an offset occurring with an increase of gain in the data sampler.
|CMOS IMAGE SENSORS AND METHODS FOR OUTPUTTING PIXEL DATA AT HIGH SPEEDS - A The CMOS image sensor includes a pixel array including pixels arranged in a matrix of rows and columns and a row selection unit configured to generate selection signals for simultaneously or concurrently selecting at least two rows from the rows of the pixel array in response to a received row address. An analog-to-digital conversion unit is configured to convert pixel data output from the at least two rows selected from the pixel array into a digital video signal and output the digital video signal. The pixel array outputs the pixel data in response to the selection signals.
|Analog-to-Digital Converters and Related Image Sensors - An image sensor includes a pixel array including a plurality of pixels which are arranged in a matrix of a plurality of rows and columns and each of the plurality of pixels being configured to convert intensity of incident light into an electrical image signal; and an extended counting analog-to-digital converter configured to perform a first analog-to-digital conversion to provide a digital signal from an output signal of the pixel array, to obtain a residue using the output signal of the pixel array and the digital signal, and to perform a second analog-to-digital conversion using the residue.
|SENSE AMPLIFIER INCLUDING NEGATIVE CAPACITANCE CIRCUIT AND APPARATUSES INCLUDING SAME - A sense amplifier having a negative capacitance circuit receives differential input signals via a pair of data lines, and senses and amplifies a voltage difference between differential output signals corresponding to the differential input signals as loaded by the negative capacitance circuit using a differential-to-single-ended amplifier to generate a corresponding data output signal.
|THIN FILM TYPE SOLAR CELL AND FABRICATION METHOD THEREOF - A method of fabricating a solar cell includes forming a doped portion having a first conductive type on a semiconductor substrate, growing an oxide layer on the semiconductor substrate, forming a plurality of recess portions in the oxide layer, further growing the oxide layer on the semiconductor substrate, forming a doped portion having a second conductive type on areas of the semiconductor substrate corresponding to the recess portions, forming a first conductive electrode electrically coupled to the doped portion having the first conductive type, and forming a second conductive electrode on the semiconductor substrate and electrically coupled to the doped portion having the second conductive type, wherein a gap between the doped portions having the first and second conductive types corresponds to a width of the oxide layer formed by further growing the oxide layer.
|LINE MEMORY DEVICE AND IMAGE SENSOR INCLUDING THE SAME - A line memory device includes a plurality of memory cells, a data line pair, a sense amplifier and an output unit. The plurality of memory cells are disposed adjacent to each other in a line. The data line pair is coupled to the memory cells to sequentially transfer memory data bits stored in the memory cells to the sense amplifier. The sense amplifier is configured to amplify the memory data bits that are sequentially transferred through the data line pair by corresponding delay times which are different from each other. The output unit samples an output of the sense amplifier to sequentially output retimed data bits of the memory data bits in response to a read clock signal. The read clock signal has a cyclic period which is less than a maximum delay time among the delay times.
|IMAGE SYSTEMS AND SENSORS HAVING FOCUS DETECTION PIXELS THEREIN - Image sensors include an array of image sensor pixels therein. This array of image sensor pixels includes a first focus detection pixel and at least a first color pixel. A switching network is provided, which is electrically coupled to the array. This switching network may be configured to generate a first mixed image signal by electronically mixing a focus detection signal generated by the first focus detection pixel with at least one color pixel signal generated by the at least a first color pixel. The first focus detection pixel can be a color-blind pixel, which may include a light-blocking shield mask therein.
|PHOTOELECTRIC DEVICE AND MANUFACTURING METHOD THEREOF - A photoelectric device is disclosed. The photoelectric device includes a semiconductor substrate, first and second semiconductor stacks having opposite conductive types and alternately arranged on a first surface of the semiconductor substrate, and a gap insulation layer formed between the first and second semiconductor stacks. An undercut may be formed in the gap insulation layer. A method of manufacturing a photoelectric device is also disclosed.
|COUNTER CIRCUIT, ANALOG-TO-DIGITAL CONVERTER, AND IMAGE SENSOR INCLUDING THE SAME AND METHOD OF CORRELATED DOUBLE SAMPLING - A counter circuit includes a first counter and a second counter. The first counter is configured to count a first counter clock signal which toggles with a first frequency to generate upper (N−M)-bit signals of N-bit counter output signals, in response to a first counting enable signal based on a first comparison signal during a coarse counting interval. N and M are natural numbers, N is greater than M, and M is greater than or equal to 3. The second counter is configured to count a second counter clock signal which toggles with a second frequency which is higher than the first frequency to generate lower M-bit signals of the N-bit counter output signals, in response to a second counting enable signal based on the first comparison signal and a second comparison signal during a fine counting interval which follows the coarse counting interval.
Patent applications by Dong Hun Lee, Yongin-Si KR