Patent application number | Description | Published |
20080224290 | LOW COST LEAD-FREE PREPLATED LEADFRAME HAVING IMPROVED ADHESION AND SOLDERABILITY - A leadframe with a structure made of a base metal ( | 09-18-2008 |
20080274294 | COPPER-METALLIZED INTEGRATED CIRCUITS HAVING ELECTROLESS THICK COPPER BOND PADS - A metal structure ( | 11-06-2008 |
20080280394 | SYSTEMS AND METHODS FOR POST-CIRCUITIZATION ASSEMBLY - A method of making integrated circuit packages using a conductive plate as a substrate includes forming a partial circuit pattern on one side of the conductive plate by stamping or selectively removing a portion of the conductive plate through part of its thickness, and then electrically coupling semiconductor dies to the formed patterns on the conductive plate. The method further includes encapsulating at least a portion of the dies and the conductive plate with an encapsulant and removing a portion of the conductive plate from the side opposite the patterned side to form conductive traces based on the formed pattern. | 11-13-2008 |
20080307644 | Metal plugged substrates with no adhesive between metal and polyimide - In a method and apparatus for fabricating a semiconductor device having a flexible tape substrate, a hole is punched in the flexible tape substrate. The flexible tape substrate includes a metal layer attached to a polyimide layer without an adhesive there between. A cover is placed on the metal layer to cap a base of the hole. A metal is deposited on the cover exposed at the base of the hole, the metal being used to form a bond with the metal layer. The metal being deposited causes the hole to be plugged up to a selective height. Upon removal of the cover, the metal may also be deposited on the metal layer to increase a thickness of the metal layer. | 12-18-2008 |
20090051036 | Semiconductor Package Having Buss-Less Substrate - A ball grid array device with an insulating substrate ( | 02-26-2009 |
20090302463 | SEMICONDUCTOR DEVICE HAVING SUBSTRATE WITH DIFFERENTIALLY PLATED COPPER AND SELECTIVE SOLDER - A semiconductor device having an insulating substrate with differentially plated metal and selective solder. Chip | 12-10-2009 |
20100009500 | Aluminum Leadframes for Semiconductor QFN/SON Devices - A post-mold plated semiconductor device has an aluminum leadframe ( | 01-14-2010 |
20100096734 | THERMALLY IMPROVED SEMICONDUCTOR QFN/SON PACKAGE - A semiconductor device without cantilevered leads uses conductive wires ( | 04-22-2010 |
20100096738 | IC DIE HAVING TSV AND WAFER LEVEL UNDERFILL AND STACKED IC DEVICES COMPRISING A WORKPIECE SOLDER CONNECTED TO THE TSV - A method of forming integrated circuit (IC) die configured for attachment to another die or a package substrate, and stacked IC devices therefrom. At least one IC die having a top semiconductor surface and a bottom surface and at least one through substrate via (TSV) including a tip protruding beyond the bottom surface to a tip length is provided. The tip has an outer dielectric tip liner, and an electrically conductive portion within the outer dielectric tip liner. A compliant layer is applied to the bottom surface of the IC die. The dielectric tip liner is removed from a distal portion of the tip to expose an electrically conductive tip portion. A solder material is deposited on the exposed distal portion of the tip. The solder material is reflowed and coalesced to form a solder bump on the distal portion of the tip. | 04-22-2010 |
20100320579 | Metallic Leadframes Having Laser-Treated Surfaces for Improved Adhesion to Polymeric Compounds - A leadframe for the assembly of a semiconductor chip has regions ( | 12-23-2010 |
20110068443 | Thermally Improved Semiconductor QFN/SON Package - A semiconductor device without cantilevered leads uses conductive wires ( | 03-24-2011 |
20110076806 | Low Cost Lead-Free Preplated Leadframe Having Improved Adhesion and Solderability - A leadframe with a structure made of a base metal ( | 03-31-2011 |
20110147934 | Metal Plugged Substrates with No Adhesive Between Metal and Polyimide - In a method and apparatus for fabricating a semiconductor device having a flexible tape substrate, a hole is punched in the flexible tape substrate. The flexible tape substrate includes a metal layer attached to a polyimide layer without an adhesive there between. A cover is placed on the metal layer to cap a base of the hole. A metal is deposited on the cover exposed at the base of the hole, the metal being used to form a bond with the metal layer. The metal being deposited causes the hole to be plugged up to a selective height. Upon removal of the cover, the metal may also be deposited on the metal layer to increase a thickness of the metal layer. | 06-23-2011 |
20110165732 | Semiconductor Package Having Buss-Less Substrate - A ball grid array device with an insulating substrate ( | 07-07-2011 |
20120009739 | Metallic Leadframes Having Laser-Treated Surfaces for Improved Adhesion to Polymeric Compounds - A leadframe for the assembly of a semiconductor chip has regions ( | 01-12-2012 |
20120252142 | Singulation and Strip Testing of No-Lead Integrated Circuit Packages Without Tape Frame - Strip testing is applied to a plurality of integrated circuit dies that are each encapsulated in an encapsulant, that each have a set of externally accessible leads connected thereto, and that are electrically isolated from one another. Provision is made for the strip testing to be performed without mounting the encapsulated integrated circuit dies on a support tape. | 10-04-2012 |
20130025745 | Mask-Less Selective Plating of Leadframes - A method for selectively plating a leadframe ( | 01-31-2013 |
20130082407 | Integrated Circuit Package And Method - A method of making integrated circuit package assemblies including encapsulating a plurality of dies in an encapsulation layer having an exterior surface and attaching a heat sink strip to the exterior surface of the encapsulation layer. An integrated circuit package assembly and an intermediate product used in making an integrated circuit package assembly are also disclosed. | 04-04-2013 |
20130099384 | Stacked IC Devices Comprising a Workpiece Solder Connected to the TSV - A stacked integrated circuit (IC) device with at least one IC die having a top semiconductor surface and a bottom surface and at least one through substrate via (TSV) including a tip protruding beyond the bottom surface to a tip length is provided. The tip has an outer dielectric tip liner, and an electrically conductive portion within the outer dielectric tip liner. A compliant layer is applied to the bottom surface of the IC die. The dielectric tip liner is removed from a distal portion of the tip to expose an electrically conductive tip portion. A solder material is deposited on the exposed distal portion of the tip. The solder material is reflowed and coalesced to form a solder bump on the distal portion of the tip. | 04-25-2013 |
20140048920 | Selective Leadframe Planishing - A metal leadframe strip ( | 02-20-2014 |
20140138805 | System for No-Lead Integrated Circuit Packages Without Tape Frame - A system has a leadframe strip and a plurality of integrated circuit dies are each encapsulated in an encapsulant. The encapsulant has a plurality of first cuts and a plurality of second cuts therein. A fixture holds the package in said plurality of first cuts while said plurality of second cuts are made. | 05-22-2014 |
20140175626 | INTEGRATED CIRCUIT PACKAGE AND METHOD OF MANUFACTURE - An integrated circuit package has a leadframe having an open space extending therethrough. An integrated circuit device is attached to a portion of the upper surface of the leadframe. A shunt is located within the open space such that it is not in contact with any portion of the leadframe. | 06-26-2014 |
20150014829 | Copper Leadframe Finish for Copper Wire Bonding - A semiconductor device ( | 01-15-2015 |