Patent application number | Description | Published |
20150061027 | METHODS OF FORMING GATE STRUCTURES FOR TRANSISTOR DEVICES FOR CMOS APPLICATIONS AND THE RESULTING PRODUCTS - One method for forming replacement gate structures for NMOS and PMOS transistors includes performing an etching process to remove a sacrificial gate structure for the NMOS and PMOS transistors to thereby define NMOS and PMOS gate cavities, depositing a gate insulation layer in the gate cavities, depositing a first metal layer on the gate insulation layer in the gate cavities, performing at least one process operation to form (1) an NMOS metal silicide material above the first metal layer within the NMOS gate cavity, the NMOS metal silicide material having a first amount of atomic silicon, and (2) a PMOS metal silicide material above the first metal layer within the PMOS gate cavity, the PMOS metal silicide material having a second amount of atomic silicon, and wherein the first and second amounts of atomic silicon are different, and forming gate cap layers within the NMOS and PMOS gate cavities. | 03-05-2015 |
20150303057 | METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING FLUORINE INCORPORATION - Integrated circuits and methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming an interlayer of dielectric oxide material in a FET region and overlying a semiconductor substrate. A high-K dielectric layer is deposited overlying the interlayer. Fluorine is incorporated into the interlayer and/or the high-K dielectric layer. | 10-22-2015 |
20150311206 | METHODS OF FORMING GATE STRUCTURES FOR TRANSISTOR DEVICES FOR CMOS APPLICATIONS AND THE RESULTING PRODUCTS - An integrated circuit product includes an NMOS transistor having a gate structure that includes an NMOS gate insulation layer, a first NMOS metal layer positioned on the NMOS gate insulation layer, an NMOS metal silicide material positioned above the first NMOS metal layer, and a layer of a second metal material positioned above and in contact with the NMOS gate insulation layer, the first NMOS metal layer, and the NMOS metal silicide layer. The PMOS transistor has a gate structure that includes a PMOS gate insulation layer, a first PMOS metal layer positioned on the PMOS gate insulation layer, a PMOS metal silicide material positioned above the first PMOS metal layer, and a layer of the second metal material positioned above and in contact with the PMOS gate insulation layer, the first PMOS metal layer, and the PMOS metal silicide layer. | 10-29-2015 |
Patent application number | Description | Published |
20160116968 | Method and System for Throttling Power Consumption - Systems, methods, and/or devices are used to manage a storage system. In one aspect, the method includes receiving, from a host to which a storage device of the storage system is operatively coupled, a request to perform a first memory operation on one or more memory devices of the storage device. The method includes determining a count of credits corresponding to the first memory operation. If a current count of credits in the first credit pool is greater than or equal to the count of credits corresponding to the first memory operation and a current count of credits in the second credit pool is greater than or equal to the count of credits corresponding to the first memory operation, the method includes: performing the first memory operation; and decrementing the first and second credit pools according to the count of credits corresponding to the first memory operation. | 04-28-2016 |
20160117105 | Method and System for Throttling Bandwidth Based on Temperature - Systems, methods, and/or devices are used to manage a storage system. In one aspect, the method includes, during a first time period: maintaining a credit pool for the first time period; limiting bandwidth used for transmitting data between a storage device of the storage system and a host operatively coupled with the storage device according to a status of the credit pool, where the storage device includes one or more memory devices; monitoring a temperature of the storage device; and, in accordance with a determination that a current temperature of the storage device exceeds a predetermined threshold temperature and the current temperature of the storage device satisfies one or more temperature criteria, reducing an initial value of the credit pool for a second time period according to a first adjustment factor corresponding to the predetermined temperature threshold, where the second time period is subsequent to the first time period. | 04-28-2016 |
20160117252 | Processing of Un-Map Commands to Enhance Performance and Endurance of a Storage Device - A storage device and method enable processing of un-map commands. In one aspect, the method includes (1) determining whether a size of an un-map command satisfies (e.g., is greater than or equal to) a size threshold, (2) if the size of the un-map command satisfies the size threshold, performing one or more operations of a first un-map process, wherein the first un-map process forgoes (does not include) saving a mapping table to non-volatile memory of a storage device, and (3) if the size of the un-map command does not satisfy the size threshold, performing one or more operations of a second un-map process, wherein the second un-map process forgoes (does not include) saving the mapping table to non-volatile memory of the storage device and forgoes (does not include) flushing a write cache to non-volatile memory of the storage device. | 04-28-2016 |
Patent application number | Description | Published |
20120009896 | ABOVE-LOCK CAMERA ACCESS - Apparatus and methods are disclosed for allowing smart phone users to “capture the moment” by allowing easy access to a camera application when a mobile device is in an above-lock (or locked) mode, while also preventing unauthorized access to other smart phone functionality. According to one embodiment of the disclosed technology, a method of operating a mobile device having an above-lock state and a below-lock state comprises receiving input data requesting invocation of an camera application when the mobile device is in the above-lock state and invoking the requested camera application on the device, where one or more functions of the requested application are unavailable as a result of the mobile device being in the above-lock state. | 01-12-2012 |
20130007667 | PEOPLE CENTRIC, CROSS SERVICE, CONTENT DISCOVERY SYSTEM - A menu structure is provided which allows a user of a computing device to more easily consolidate and navigate images and/or albums regardless of their location. Moreover, the menu structure is dynamically tailored to individual users based on their previous interactions with the people appearing in the images/albums. The menu includes icons representing images (e.g., photos) or collections of images that have been categorized based in part on metadata respectively associated with the images. The metadata may have been provided by tagging the images or posting the images on one or more social networking sites. The order in which the icons are presented on the menu or interface may be based on their relative relevance or importance to the user. | 01-03-2013 |
20150050916 | ABOVE-LOCK CAMERA ACCESS - Apparatus and methods are disclosed for allowing smart phone users to “capture the moment” by allowing easy access to a camera application when a mobile device is in an above-lock (or locked) mode, while also preventing unauthorized access to other smart phone functionality. According to one embodiment of the disclosed technology, a method of operating a mobile device having an above-lock state and a below-lock state comprises receiving input data requesting invocation of an camera application when the mobile device is in the above-lock state and invoking the requested camera application on the device, where one or more functions of the requested application are unavailable as a result of the mobile device being in the above-lock state. | 02-19-2015 |