Patent application number | Description | Published |
20090294101 | FAST SUBSTRATE SUPPORT TEMPERATURE CONTROL - Methods and apparatus for controlling the temperature of a substrate support are provided herein. In some embodiments, an apparatus for controlling the temperature of a substrate support may include a first heat transfer loop and a second heat transfer loop. The first heat transfer loop may have a first bath with a first heat transfer fluid at a first temperature. The second heat transfer loop may have a second bath with a second heat transfer fluid at a second temperature. The first and second temperatures may be the same or different. First and second flow controllers may be provided for respectively providing the first and second heat transfer fluids to a substrate support. One or more return lines may couple one or more outlets of the substrate support to the first and second baths for returning the first and second heat transfer fluids to the first and second baths. | 12-03-2009 |
20100099266 | ETCH REACTOR SUITABLE FOR ETCHING HIGH ASPECT RATIO FEATURES - Embodiments of the invention provide a method and apparatus that enables plasma etching of high aspect ratio features. In one embodiment, a method for etching is provided that includes providing a substrate having a patterned mask disposed on a silicon layer in an etch reactor, providing a gas mixture of the reactor, maintaining a plasma formed from the gas mixture, wherein bias power and RF power provided the reactor are pulsed, and etching the silicon layer in the presence of the plasma. | 04-22-2010 |
20120091098 | HIGH EFFICIENCY GAS DISSOCIATION IN INDUCTIVELY COUPLED PLASMA REACTOR WITH IMPROVED UNIFORMITY - Embodiments of the present invention relate to a plasma chamber having a coil assembly which improves plasma uniformity and improves power coupling to the plasma. One embodiment provides a plasma chamber. The plasma chamber includes a chamber body having sidewalls and a lid, wherein the chamber body defines a processing volume. The plasma chamber further includes a coil assembly disposed over the lid configured to generate inductively coupled plasma within the processing volume, wherein the coil assembly comprises two or more horizontal coils arranged in a common horizontal plane. | 04-19-2012 |
20130005152 | INCREASED DEPOSITION EFFICIENCY AND HIGHER CHAMBER CONDUCTANCE WITH SOURCE POWER INCREASE IN AN INDUCTIVELY COUPLED PLASMA (ICP) CHAMBER - Embodiments described herein generally relate to a substrate processing system and related methods, such as an etching/deposition method. The method comprises (A) depositing a protective layer on a first layer disposed on a substrate in an etch reactor, wherein a plasma source power of 4,500 Watts or greater is applied while depositing the protective layer, (B) etching the protective layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the protective layer, and (C) etching the first layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the first layer, wherein a time for the depositing a protective layer (A) comprises less than 30% of a total cycle time for the depositing a protective layer (A), the etching the protective layer (B), and the etching the first layer (C). | 01-03-2013 |
20140179108 | Wafer Edge Protection and Efficiency Using Inert Gas and Ring - Embodiments of the invention generally relate to an apparatus and method for plasma etching. In one embodiment, the apparatus includes a process ring with an annular step away from an inner wall of the ring and is disposed on a substrate support in a plasma process chamber. A gap is formed between the process ring and a substrate placed on the substrate support. The annular step has an inside surface having a height ranging from about 3 mm to about 6 mm. During operation, an edge-exclusion gas is introduced to flow through the gap and along the inside surface, so the plasma is blocked from entering the space near the edge of the substrate. | 06-26-2014 |
20140213041 | LASER AND PLASMA ETCH WAFER DICING WITH ETCH CHAMBER SHIELD RING FOR FILM FRAME WAFER APPLICATIONS - Laser and plasma etch wafer dicing where a mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a film frame by an adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The laser scribing exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is plasma etched through the gaps in the patterned mask while the film frame is maintained at an acceptably low temperature with a chamber shield ring configured to sit beyond the wafer edge and cover the frame. The shield ring may be raised and lowered, for example, on lifter pins to facilitate transfer of the wafer on frame. | 07-31-2014 |