Patent application number | Description | Published |
20100026329 | TEST APPARATUS AND ELECTRONIC DEVICE - Provided is a test apparatus that tests a device under test including an external interface circuit that transfers signals between an internal circuit inside a device and the outside of the device, the test apparatus comprising a pattern generating section that inputs, to the external interface circuit, a test pattern for testing the external interface circuit; an interface control section that causes the external interface circuit to loop back and output the test pattern; and an interface judging section that judges acceptability of the external interface circuit based on the test pattern looped back and output by the external interface circuit. | 02-04-2010 |
20100090709 | TEST APPARATUS AND TEST METHOD - Provided is a test apparatus that tests a device under test, comprising a pattern generating section that generates a test pattern determined according to a test signal to be supplied to the device under test; a timing signal generating section that generates a timing signal indicating a timing for supplying the test signal to the device under test; a digital filter that filters the test pattern to output a jitter control signal representing jitter corresponding to the test pattern; a jitter injecting section that injects the timing signal with jitter by delaying the timing signal according to the jitter control signal; and a waveform shaping section that generates the test signal formed according to the test pattern, with the timing signal into which the jitter is injected as a reference. | 04-15-2010 |
20100158515 | TRANSMISSION SYSTEM AND TEST APPARATUS - Provided is a transmission system that transmits data, comprising a modulating section that modulates amplitude of a predetermined carrier signal according to the data to be transmitted; an electro-optical converting section that converts a modulated signal output by the modulating section into an optical signal; an optical fiber that transmits the optical signal; an optical-electric converting section that converts the optical signal transmitted by the optical fiber into a current signal; a current-voltage converting section that linearly converts the current signal into a voltage signal; and a demodulating section that demodulates the voltage signal. | 06-24-2010 |
20100199491 | MANUFACTURING METHOD OF IMAGE PICK-UP DEVICE, IMAGE PICK-UP DEVICE AND OPTICAL ELEMENT - A manufacturing method of image pick-up device preventing deform of the optical element by the reflow process includes, a step of forming an by curing a thermosetting resin material having viscosity of 50 to 50,000 mPa·s under measuring condition at 23° C. and 500 Hz, a step of placing the optical element together with an electronic parts on a substrate, and a step mounting the optical element and the electronic parts on the above mentioned substrate by performing a reflow process to the optical element and the electronic parts on the substrate. | 08-12-2010 |
20100208780 | TRANSFER CIRCUIT, TRANSMITTER, RECEIVER AND TEST APPARATUS - There is provided a transfer circuit including a transmitter that outputs a transmission signal and a receiver that receives the transmission signal. Here, the receiver supplies to the transmitter a feedback signal for controlling a common level of the transmission signal output from the transmitter, and the transmitter controls the common level of the transmission signal output therefrom, in accordance with the feedback signal received from the receiver. The receiver includes a receiving section that operates in accordance with the transmission signal, a reference level generating section that generates a reference level representing an expected level for the common level of the transmission signal input into the receiving section, and a comparing section that compares the common level of the transmission signal input into the receiving section against the reference level and generates the feedback signal in accordance with a result of the comparison. | 08-19-2010 |
20100308856 | Test apparatus and test method - Provided is a test apparatus for testing a device under test, including: a level comparing section that receives a signal under test output from the device under test and outputs a logical value, the logical value indicating a comparison result obtained by comparing a signal level of the signal under test with preset first threshold and second threshold; an acquiring section that acquires the logical value output from the level comparing section, according to a strobe signal supplied thereto; an expected value comparing circuit that determines whether the logical value acquired by the acquiring section corresponds to a preset expected value; and a threshold control section that sets an upper limit and a lower limit of a voltage of the eye mask to the level comparing section as the first threshold and the second threshold, when an eye mask test is performed for determining whether an eye opening of the signal under test is larger than a predefined eye mask. | 12-09-2010 |
20110018151 | Method for Producing Wafer Lens - Disclosed is a method for producing a wafer lens ( | 01-27-2011 |
20110099443 | TEST APPARATUS - Provided is a test apparatus that tests a device under test, comprising a plurality of test circuits that each perform a predetermined test function; a plurality of I/O circuits that are provided between the test circuits and the device under test, where at least one of the circuits has electrical characteristics that differ from the electrical characteristics of the other circuits; and an I/O switching section that switches which of the I/O circuits is used to electrically connect at least one of the test circuits to the device under test. | 04-28-2011 |
20110125308 | APPARATUS FOR MANUFACTURING SUBSTRATE FOR TESTING, METHOD FOR MANUFACTURING SUBSTRATE FOR TESTING AND RECORDING MEDIUM - A test substrate manufacturing apparatus comprising a test circuit database that stores circuit data of a plurality of types of test circuits in association with a plurality of types of testing content; a definition information storing section that stores definition information defining arrangements of device pads of devices under test and testing content to be performed for each of the device pads; and a lithography data generating section that generates lithography data for the test substrate by (i) selecting, from the test circuit database, circuit data of each test circuit to be connected to a device pad based on the testing content defined by the definition information stored in the definition information storing section and (ii) determining positions on the test substrate where the test circuits corresponding to the selected circuit data are formed using lithography, based on the arrangements of the device pads as defined by the definition information. | 05-26-2011 |
20110128027 | WAFER UNIT FOR TESTING AND TEST SYSTEM - Provided is a test wafer unit that tests a plurality of circuits under test formed on a wafer under test. The test wafer unit comprises a test wafer that is formed of a semiconductor material and exchanges signals with each of the circuits under test, and a plurality of loop-back sections that are provided in the test wafer to correspond to the plurality of circuits under test and that each supply the corresponding circuit under test with a loop-back signal corresponding to a signal received from the corresponding circuit under test. | 06-02-2011 |
20110128031 | TEST SYSTEM AND SUBSTRATE UNIT FOR TESTING - A test system that tests a plurality of chips under test formed on a wafer under test, the test system comprising a plurality of test substrates that are arranged in overlapping layers and that each have a plurality of test circuits, whose function is determined for each wafer, formed thereon; a plurality of connecting sections that electrically connect, to the chips under test, the test circuits formed on one of the test substrates; and a control apparatus that controls each of the test circuits. Each test substrate has test circuits, with a function predetermined for each substrate, formed thereon. | 06-02-2011 |
20110128032 | WAFER FOR TESTING, TEST SYSTEM, AND SEMICONDUCTOR WAFER - Provided is a test wafer that tests a plurality of semiconductor chips that are formed on a semiconductor wafer and that each include an operation circuit and an internal memory. The test wafer comprises a plurality of test circuits that correspond to the plurality of semiconductor chips, supply the operation circuits of the corresponding semiconductor chips with measurement signals, and measure electrical characteristics of signals output by the operation circuits in response to the measurement signals; and a plurality of write circuits that correspond to the plurality of semiconductor chips and each write, to the internal memory of the corresponding semiconductor chip, data corresponding to a measurement result of the corresponding test circuit. | 06-02-2011 |
20110148454 | SEMICONDUCTOR WAFER, SEMICONDUCTOR CIRCUIT, SUBSTRATE FOR TESTING AND TEST SYSTEM - A test system includes a test substrate that transmits/receives signals to/from a semiconductor wafer, and a control apparatus to control the test substrate. The semiconductor wafer includes an external terminal coupled to an external measurement circuit, a plurality of selecting wiring lines provided to receive/transmit signals to/from the corresponding the measuring points, and a selecting section that selects one of the selecting wiring lines and that allows signal transmission between the corresponding measuring point and the external terminal through the selected selecting wiring line. The test substrate includes a measurement circuit that is coupled to the external terminal of the semiconductor wafer and that measures an electrical characteristic of a signal transmitted through the selecting wiring line selected by the selecting section, and a control section that controls which one of the measurement wiring lines is to be selected by the selecting section in the semiconductor wafer. | 06-23-2011 |
20110193138 | ELECTRONIC DEVICE AND MANUFACTURING METHOD - Provided is an electronic device that generates an output signal corresponding to an input signal, comprising a signal processing section that receives the input signal and outputs the output signal corresponding to the input signal, and a floating electrode that accumulates a charge by being irradiated by an electron beam. The signal processing section adjusts electric characteristics of the output signal according to a charge amount accumulated in the floating electrode, and includes a transistor formed on the semiconductor substrate between an input terminal that receives the input signal and an output terminal that outputs the output signal. The floating electrode is formed between a gate electrode of the transistor and the semiconductor substrate | 08-11-2011 |
20110199134 | TEST APPARATUS, TRANSMISSION APPARATUS, RECEIVING APPARATUS, TEST METHOD, TRANSMISSION METHOD AND RECEIVING METHOD - Provided is a test apparatus that tests a device under test, comprising a phase comparing section that compares a phase of an internal clock generated in the test apparatus and a phase of a clock superimposed on a device signal output by the device under test; an adjusting section that adjusts a phase shift amount of the internal clock with respect to the device signal, based on the phase comparison result; an acquiring section that acquires the device signal according to the internal clock whose phase shift amount with respect to the device signal is adjusted; and an inhibiting section that inhibits change of the phase shift amount based on the phase comparison result, for at least a portion of a period during which the clock is not superimposed on the device signal. Also provided is a test method relating to the test apparatus. | 08-18-2011 |
20110218752 | TEST APPARATUS AND MANUFACTURING METHOD - Provided is a test apparatus that tests a plurality of devices under test formed on a wafer under test. The test apparatus comprises a test substrate that faces the wafer under test and is electrically connected to the devices under test; a programmable device that is provided on the test substrate and changes a logic relationship of output logic data with respect to input logic data, according to program data supplied thereto; a plurality of input/output circuits that are provided on the test substrate to correspond to the devices under test and that each supply the corresponding device under test with a test signal corresponding to the output logic data of the programmable device; and a judging section that judges pass/fail of each device under test, based on operation results of each device under test according to the test signal. | 09-08-2011 |
20110234252 | WAFER UNIT FOR TESTING AND TEST SYSTEM - Provided is a test wafer unit for testing a plurality of semiconductor chips formed on a semiconductor wafer, the test wafer unit including: a test wafer having a shape corresponding to a shape of the semiconductor wafer; and a plurality of test circuits formed on the test wafer, each test circuit provided to correspond to two or more of the plurality of semiconductor chips and testing the two or more semiconductor chips. The test wafer unit may include a plurality of connection terminals formed on the test wafer in one to one relation with test terminals of the plurality of semiconductor chips, where each of the plurality of connection terminals is connected to a corresponding one of the test terminals. | 09-29-2011 |
20110242895 | MEMORY DEVICE, MANUFACTURING METHOD FOR MEMORY DEVICE AND METHOD FOR DATA WRITING - A memory device to which an electron beam is irradiated to store data therein is provided. The memory device includes a plurality of floating electrodes that store data through irradiation of the electron beam thereto, a charge amount detecting section that detects data stored in each of the floating electrodes based on a charge amount accumulated in each of the floating electrode. | 10-06-2011 |
20130234730 | SENSOR OF ELECTROMAGNETIC INDUCTION TYPE COORDINATE INPUT DEVICE - In an electromagnetic induction type coordinate input device, on a substrate, plural first loop coils including loop portions are disposed in a first direction, and plural second loop are disposed in a second direction. The first and second loop coils include extraction line portions, each composed of a first line and a second line that are in parallel and are continuously connected to corresponding ones of the first and second loop coils. One of the first line or the second line of the first loop coil is connected to at least one of: (i) the first line or the second line of another one of the first loop coils, and (ii) a line of the loop portion of a second loop coil, within a position detection area, to form a common extraction line with (i) and/or (ii), to thereby reduce the overall number of extraction lines disposed on the substrate. | 09-12-2013 |