| Patent application number | Description | Published |
|---|
| 20090070618 | SYSTEM AND METHOD FOR CALIBRATING A TOD CLOCK - A system, method and computer program product for calibrating a Time Of Day (TOD)-clock in a computing system node provided in a multi-node network. The network comprises an infrastructure of computing devices each having a physical clock providing a time base for executing operations that is stepped to a common oscillator. The system implements steps for obtaining samples of timing values of a computing device in the network, the values including a physical clock value maintained at that device and a TOD-offset value; computing an oscillator skew value from the samples; setting a fine steering rate value as equal to the opposite of the computed oscillator skew value; and, utilizing the fine steering rate value to adjust the physical clock value and correct for potential oscillator skew errors occurring in the oscillator crystal at the computing device. | 03-12-2009 |
| 20090257456 | COORDINATED TIMING NETWORK HAVING SERVERS OF DIFFERENT CAPABILITIES - Communication and processing within a timing network that supports servers having different capabilities are facilitated. Individual servers of the network are dynamically updated without disrupting the operational characteristics of the timing network. New capabilities are not utilized between two servers until it is known that both servers are capable of supporting the new features. One server communicates to another server at an acceptable level of the another server. | 10-15-2009 |
| 20090259881 | FAILSAFE RECOVERY FACILITY IN A COORDINATED TIMING NETWORK - A failsafe recovery capability for a Coordinated Timing Network. The recovery capability facilitates recovery when communication is lost between two servers of the coordinated timing network. The capability includes checking another system's status in order to determine what action is to be taken. The status includes the stratum level of the servers and a version number indicating the code level of the servers. | 10-15-2009 |
| 20100100761 | MAINTAINING A PRIMARY TIME SERVER AS THE CURRENT TIME SERVER IN RESPONSE TO FAILURE OF TIME CODE RECEIVERS OF THE PRIMARY TIME SERVER - A primary time server of a Coordinated Timing Network remains as current time server, even if time code information of the primary time server is unavailable. The primary time server receives the necessary or desired timing information from a secondary time server and uses that information to maintain time synchronization within the Coordinated Timing Network. | 04-22-2010 |
| 20100100762 | BACKUP POWER SOURCE USED IN INDICATING THAT SERVER MAY LEAVE NETWORK - A server of a network of servers determines that its power source is failing. In response, the server communicates to one or more other servers of this network that it is leaving the network. This communication is powered by another power source. | 04-22-2010 |
| 20100185889 | CHANNEL SUBSYSTEM SERVER TIME PROTOCOL COMMANDS - A protocol for communicating with the timing facility used in a data processing network to provide synchronization is provided via the execution of a machine instruction that accepts a plurality of commands. The interaction is provided through the use of message request blocks and their associated message response blocks. In this way timing parameters may be determined, modified and communicated. This makes it much easier for multiple servers or nodes in a data processing network to exist as a coordinated timing network and to thus more cooperatively operate on the larger yet identical data files. | 07-22-2010 |
| 20100223317 | SERVER TIME PROTOCOL MESSAGES AND METHODS - Server time protocol (STP) messages and methods of exchange thereof are provided for facilitating synchronization of processing units of a timing network. The STP messages include exchange time parameters (XTP) commands and responses, and STP control (STC) commands and responses. XTP message exchange processing includes: generating an XTP message command at a first processing unit including a command transmit timestamp field set by the first processing unit and a command receive timestamp field which is unset by the first processing unit; transmitting the XTP message command to a second processing unit; setting the command receive timestamp field in the XTP command with the time the XTP command is received at the second processing unit; and generating an XTP message response at the second processing unit, the message response including the command transmit timestamp set by the first processing unit and the command receive timestamp set by the second processing unit. | 09-02-2010 |
| 20130254478 | CHANNEL SUBSYSTEM SERVER TIME PROTOCOL COMMANDS - A protocol for communicating with the timing facility used in a data processing network to provide synchronization is provided via the execution of a machine instruction that accepts a plurality of commands. The interaction is provided through the use of message request blocks and their associated message response blocks. In this way timing parameters may be determined, modified and communicated. This makes it much easier for multiple servers or nodes in a data processing network to exist as a coordinated timing network and to thus more cooperatively operate on the larger yet identical data files. | 09-26-2013 |
| 20140281342 | MIGRATING AND RETRIEVING QUEUED DATA IN BYTE-ADDRESSABLE STORAGE - In an exemplary embodiment of this disclosure, a computer-implemented method may include storing in a primary storage a plurality of list entries belonging to an ordered list. Free space in the primary storage may be monitored to determine whether a first predetermined condition related to the free space is met. In a secondary storage, a storage block of a predetermined size may be allocated for migration, when the first predetermined condition is met. A cursor may be provided pointing to a first list entry in the primary storage. One or more list entries may be selected at the cursor. The selected list entries may be migrated to the storage block while maintaining their order in the list. | 09-18-2014 |
| 20140325014 | CHANNEL SUBSYSTEM SERVER TIME PROTOCOL COMMANDS - A protocol for communicating with the timing facility used in a data processing network to provide synchronization is provided via the execution of a machine instruction that accepts a plurality of commands. The interaction is provided through the use of message request blocks and their associated message response blocks. In this way timing parameters may be determined, modified and communicated. This makes it much easier for multiple servers or nodes in a data processing network to exist as a coordinated timing network and to thus more cooperatively operate on the larger yet identical data files. | 10-30-2014 |
| 20150058585 | MIGRATING AND RETRIEVING QUEUED DATA IN BYTE-ADDRESSABLE STORAGE - In an exemplary embodiment of this disclosure, a computer-implemented method may include storing in a primary storage a plurality of list entries belonging to an ordered list. Free space in the primary storage may be monitored to determine whether a first predetermined condition related to the free space is met. In a secondary storage, a storage block of a predetermined size may be allocated for migration, when the first predetermined condition is met. A cursor may be provided pointing to a first list entry in the primary storage. One or more list entries may be selected at the cursor. The selected list entries may be migrated to the storage block while maintaining their order in the list. | 02-26-2015 |
| Patent application number | Description | Published |
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| 20090113085 | FLUSHING WRITE BUFFERS - A first node to cause flushing data units stored in a write buffer of a second node to a memory of the second node. While using a pin-based approach, the central processing unit (CPU) of the first node may activate a first pin coupled to a second pin of the second node that may cause a sequence of operations to flush the write buffer. While using a control-register based approach, the CPU or the memory controller hub (MCH) may configure the control register using an inter-node path such as the SMBus or a data transfer path that may cause a sequence of operations to flush the write buffer. While using an in-band flush mechanism, the CPU may send a message over the data transfer path after transferring the data units that may cause a sequence of operations to flush the write buffer. | 04-30-2009 |
| 20120047309 | Method, apparatus, and system for manageability and secure routing and endpoint access - A solution is presented to securing endpoints without the need for a separate bus or communication path. The solution allows for controlling access to endpoints by utilizing a management protocol by overlapping with existing interconnect communication paths in a packet format and utilizing a PCI address BDF (Bus number, Device number, and Function number) for verification. | 02-23-2012 |
| 20120166891 | TWO-LEVEL SYSTEM MAIN MEMORY - Embodiments of the invention describe a system main memory comprising two levels of memory that include cached subsets of system disk level storage. This main memory includes “near memory” comprising memory made of volatile memory, and “far memory” comprising volatile or nonvolatile memory storage that is larger and slower than the near memory. | 06-28-2012 |
| 20140189212 | PRESENTATION OF DIRECT ACCESSED STORAGE UNDER A LOGICAL DRIVE MODEL - In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for presentation of direct accessed storage under a logical drive model; for implementing a distributed architecture for cooperative NVM Data protection; data mirroring for consistent SSD latency; for boosting a controller's performance and RAS with DIF support via concurrent RAID processing; for implementing arbitration and resource schemes of a doorbell mechanism, including doorbell arbitration for fairness and prevention of attack congestion; and for implementing multiple interrupt generation using a messaging unit and NTB in a controller through use of an interrupt coalescing scheme. | 07-03-2014 |
| 20140351660 | TWO-LEVEL SYSTEM MAIN MEMORY - Embodiments of the invention describe a system main memory comprising two levels of memory that include cached subsets of system disk level storage. This main memory includes “near memory” comprising memory made of volatile memory, and “far memory” comprising volatile or nonvolatile memory storage that is larger and slower than the near memory. | 11-27-2014 |
| Patent application number | Description | Published |
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| 20110051407 | Push Fit Waterproof Interconnect For Lighting Fixtures - A push fit waterproof interconnect hub for a sequence of lighting fixtures. Each interconnect hub is formed as part of a special end cap of the lighting fixture. The interconnect hubs include a waterproof interconnect system that allows pass-through of electrical dabbling. | 03-03-2011 |
| 20120153840 | Illumination control system for motion and daylight in large structures - A cost effective illumination control system calculating motion and daylight or surrounding light inputs, particularly in large structures where the light distribution is not uniform across time. The system divides the structure into zones each having input capability with regard to occupation and background light levels. Each zone being able to make independent decisions with regard to control of lighting levels in the zone, yet the zones being able to cooperate in a coordinated fashion to provide uniform lighting to the structure as a whole. | 06-21-2012 |
| 20120176792 | LED Luminaire Tertiary Optic System - A lens system for LED based light fixtures having a substantially coplanar array of LED's with a requirement for a wide angle of illumination. And in particular, light fixtures comprising LED lights used in low bay applications. | 07-12-2012 |
| 20120176797 | LED Luminaire Thermal Management System - A thermal management and heat transfer system for light fixtures. And in particular, light fixtures comprising LED lights requiring lower temperatures than those required by incandescent of neon based light fixtures. The heat transfer includes taking advantage of the thermal updrafts caused by free convection of waste heat to cool the fixture. | 07-12-2012 |
| 20140268799 | LED LIGHT FIXTURE HAVING CIRCUMFERENTIALLY MOUNTED DRIVERS ADJACENT EXTERNAL HEAT SINKS - A light fixture and a housing thereof for managing thermal energy includes multiple cavities separated by a partition wall and each configured to house components of the light fixture, in particular an LED array and LED drivers to power the LED array. The housing further includes a heat transfer flow path radially defined between the first cavity and the partition wall, and a fin in fluid communication with the cavity housing the LED drivers. The heat transfer flow path is positioned for dissipation of heat from the LED array and the fin is positioned for dissipation of heat from the LED drivers. | 09-18-2014 |
