Patent application number | Description | Published |
20090081863 | METHOD OF FORMING METAL WIRING LAYER OF SEMICONDUCTOR DEVICE - A method of forming a metal wiring layer of a semiconductor device produces metal wiring that is free of defects. The method includes forming an insulating layer pattern defining a recess on a substrate, forming a conformal first barrier metal layer on the insulating layer pattern, and forming a second barrier metal layer on the first barrier metal layer in such a way that the second barrier metal layer will facilitate the growing of metal from the bottom of the recess such that the metal can fill a bottom part of the recess completely and thus, form damascene wiring. An etch stop layer pattern is formed after the damascene wiring is formed so as to fill the portion of the recess which is not occupied by the damascene wiring. | 03-26-2009 |
20090233439 | Method of forming an ohmic layer and method of forming a metal wiring of a semiconductor device using the same - A metal organic precursor represented by a formula of R | 09-17-2009 |
20100237423 | SEMICONDUCTOR DEVICES INCLUDING BURIED BIT LINES - A semiconductor device includes a plurality of channel structures on a semiconductor substrate. A bit line groove having opposing sidewalls is defined between sidewalls of adjacent ones of the plurality of channel structures. A plurality of bit lines are formed on corresponding ones of the opposing sidewalls, and the plurality of bit lines are electrically isolated from each other | 09-23-2010 |
20100240184 | METHOD OF FORMING BURIED GATE ELECTRODE - A method of forming a buried gate electrode prevents voids from being formed in a silicide layer of the gate electrode. The method begins by forming a trench in a semiconductor substrate, forming a conformal gate oxide layer on the semiconductor in which the trench has been formed, forming a first gate electrode layer on the gate oxide layer, forming a silicon layer on the first gate electrode layer to fill the trench. Then, a portion of the first gate electrode layer is removed to form a recess which exposed a portion of a lateral surface of the silicon layer. A metal layer is then formed on the semiconductor substrate including on the silicon layer. Next, the semiconductor substrate is annealed while the lateral surface of the silicon layer is exposed to form a metal silicide layer on the silicon layer. | 09-23-2010 |
20100240185 | Semiconductor device and method of manufacturing the same - A method of manufacturing a semiconductor device includes: forming a trench for forming buried type wires by etching a substrate; forming first and second oxidation layers on a bottom of the trench and a wall of the trench, respectively; removing a part of the first oxidation layer and the entire second oxidation layer; and forming the buried type wires on the wall of the trench by performing a silicide process on the wall of the trench from which the second oxidation layer is removed. As a result, the buried type wires are insulated from each other. | 09-23-2010 |
20110092060 | METHODS OF FORMING WIRING STRUCTURES - A semiconductor memory wiring method includes: receiving a substrate having a cell array region and a peripheral circuit region; depositing a first insulating layer on the substrate; forming a first contact plug in the cell array region, the first contact plug having a first conductive material extending through the first insulating layer; forming a first elongated conductive line at substantially the same time as forming the first contact plug, the first elongated conductive line having the first conductive material directly covering and integrated with the first contact plug; forming a second contact plug in the peripheral circuit region at substantially the same time as forming the first contact plug, the second contact plug having the first conductive material extending through the first insulating layer; and forming a second elongated conductive line at substantially the same time as forming the second contact plug, the second elongated conductive line having the first conductive material directly covering and integrated with the second contact plug. | 04-21-2011 |
20120171826 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor includes providing a substrate having a first region and a second region defined therein, forming a first gate and a first source and drain region in the first region and forming a second gate and a second source and drain region in the second region, forming an epitaxial layer in the second source and drain region, forming a first metal silicide layer in the first source and drain region, forming an interlayer dielectric layer on the first region and the second region, forming a plurality of contact holes exposing the first metal silicide layer and the epitaxial layer while penetrating the interlayer dielectric layer, forming a second metal silicide layer in the exposed epitaxial layer, and forming a plurality of contacts contacting the first and second metal silicide layers by filling the plurality of contact holes. | 07-05-2012 |
20130316535 | METHODS OF FORMING SEMICONDUCTOR DEVICES WITH METAL SILICIDE USING PRE-AMORPHIZATION IMPLANTS AND DEVICES SO FORMED - A method of forming a semiconductor device can be provided by forming an opening that exposes a surface of an elevated source/drain region. The size of the opening can be reduced and a pre-amorphization implant (PAI) can be performed into the elevated source/drain region, through the opening, to form an amorphized portion of the elevated source/drain region. A metal-silicide can be formed from a metal and the amorphized portion. | 11-28-2013 |
Patent application number | Description | Published |
20100103743 | Flash memory device and method of testing the flash memory device - A flash memory device and a method of testing the flash memory device are provided. The flash memory device may include a memory cell array including a plurality of bit lines, a control unit configured to output estimated data and an input/output buffer unit including a plurality of page buffers. Each of the plurality of page buffers corresponds to one of the plurality of bit lines in the memory cell array and is configured to read test data programmed in at least a first page of a memory cell array, compare the read-out test data with the estimated data to determine whether the corresponding bit line is in a pass or failure state and output a test result signal. A voltage of the test result signal is maintained when test data of a second page of the memory cell array is read if the corresponding bit line in the first page is in a failure state. | 04-29-2010 |
20100208526 | Non-volatile memory device and method of operation therefor - In one embodiment, the non-volatile memory device includes a well of a first conductivity type formed in a substrate, and a first plurality of memory cell transistors connected in series to a bit line formed in the well. A buffer is formed in the substrate outside the well and is connected to the bit line. At least one de-coupling transistor is configured to de-couple the buffer from the bit line; and the de-coupling transistor is formed in the well. | 08-19-2010 |
20120014187 | Non-volatile memory device and method of operation therefor - In one embodiment, the non-volatile memory device includes a well of a first conductivity type formed in a substrate, and a first plurality of memory cell transistors connected in series to a bit line formed in the well. A buffer is formed in the substrate outside the well and is connected to the bit line. At least one de-coupling transistor is configured to de-couple the buffer from the bit line, and the de-coupling transistor is formed in the well. | 01-19-2012 |
Patent application number | Description | Published |
20090191699 | METHODS FOR FORMING SILICIDE CONDUCTORS USING SUBSTRATE MASKING - A plurality of spaced-apart conductor structures is formed on a semiconductor substrate, each of the conductor structures including a conductive layer. Insulating spacers are formed on sidewalls of the conductor structures. An interlayer-insulating film that fills gaps between adjacent ones of the insulating spacers is formed. Portions of the interlayer-insulating layer are removed to expose upper surfaces of the conductive layers. Respective epilayers are grown on the respective exposed upper surfaces of the conductive layers and respective metal silicide layers are formed from the respective epilayers. | 07-30-2009 |
20130206977 | METHOD FOR CRYSTALLIZING LOW MASS IONS FOR DIAGNOSING COLORECTAL CANCER AND METHOD FOR DIAGNOSING COLORECTAL CANCER USING SAME - The present invention provides a method for crystallizing low mass ions for diagnosing colorectal cancer by using a MALDI-TOF mass spectrometer to biostatistically analyze low mass ions, which are extracted from a biological sample, and a method for providing information for diagnosing colorectal cancer using same. The present inventions can provide a diagnostic method, which requires low cost and a short time for analysis, can analyze large areas, and which can provide superior and credible discriminations. | 08-15-2013 |
20130231869 | APPARATUS FOR CANCER DIAGNOSIS - The present invention provides an apparatus for screening cancer, which reads low-mass ion mass spectrum for diagnosing cancer based on biostatistical analysis with respect to low-mass ions extracted from biological materials, and diagnoses cancer using the low-mass ion spectrum. An apparatus for cancer diagnosis, including a low-mass ion detecting unit which detects mass spectra of low-mass ions of biological materials; a cancer diagnosing unit which compares and analyzes patterns of mass spectra and diagnoses cancer; a display unit which displays cancer diagnosis information from the cancer diagnosing unit. | 09-05-2013 |
Patent application number | Description | Published |
20110182470 | MOBILE COMMUNICATION TERMINAL HAVING IMAGE CONVERSION FUNCTION AND METHOD - A mobile communication terminal having an image conversion function arranges and displays area-specific images in a three-dimensional (3D) space on the basis of distance information of the area-specific images of a two-dimensional (2D) image. | 07-28-2011 |
20110187743 | TERMINAL AND METHOD FOR PROVIDING AUGMENTED REALITY - A first terminal shares a digital marker edited in a digital marker editing mode and an object corresponding to the edited digital marker with a second terminal using a wireless communication technology. If a digital marker is displayed on an image display unit of the first terminal, the second terminal photographs the digital marker using a camera, and synthesizes an object corresponding to the photographed digital marker with a real-time video image obtained through the camera to display a merged image as augmented reality. Then, the second terminal receives input information for changing the digital marker from a user, and transmits the received input information to the first terminal. The first terminal changes a digital marker using the input information received from the second terminal. The second terminal photographs the changed digital marker, and displays an object corresponding to the changed digital marker. | 08-04-2011 |
20120038671 | USER EQUIPMENT AND METHOD FOR DISPLAYING AUGMENTED REALITY WINDOW - A user equipment to display an augmented reality (AR) window includes a display unit to display an image and AR windows corresponding to objects included in the image, and a control unit to determine an arrangement pattern of the AR windows by adjusting at least one of a size, a display location, a display pattern, and a color of the AR windows and to control the display unit to display the AR windows in the determined arrangement pattern, together with the objects. A method includes detecting the object in the image, generating the AR window corresponding to the object, determining an arrangement pattern of the AR window based on an adjustment of an attribute, and displaying the AR window in the determined arrangement pattern along with the object. | 02-16-2012 |
20130067376 | DEVICE AND METHOD FOR PROVIDING SHORTCUT IN A LOCKED SCREEN - A method for executing an operation on a portable terminal in a locked state includes displaying a lockscreen on the portable terminal including state information of the portable terminal; receiving an input on the lockscreen; determining whether the input corresponds to an operation of an application with respect to the displayed state information; and executing the operation according to the determination. A portable terminal includes an interface unit to output a lockscreen when the portable terminal is in a locked state and to display state information on the lockscreen; an input unit to receive an input; a verification unit to determine whether the input corresponds to an operation of an application with respect to the determined state information; and an execution unit to execute the predetermine operation. | 03-14-2013 |
20140285639 | TRANSPARENT STEREOSCOPIC IMAGE DISPLAY - The present invention relates to a transparent stereoscopic image display, and in particular, to a transparent stereoscopic image display without a barrier slit or lenticular sheet, which enables an observer to feel a sense of three-dimensionality, by assembling transparent display panels and alternately outputting a left eye image frame and a right eye image frame, and enables the resolution to be improved about two-fold when a 2-dimensional image is output. | 09-25-2014 |