Chung, Hsinchu City
Chang-Kuei Chung, Hsinchu City TW
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20150372637 | SOLAR MODULE FRAME - A solar module frame includes two first borders and two second borders. At least one first border includes a first segment and a second segment, where one end of the first segment is connected to one end of the second border, and one end of the second segment is connected to one end of the other second border. The solar module frame includes at least one connection component. One end of the connection component is connected to the other end of the first segment, and the other end of the connection component is connected to the other end of the second segment. Each of the first segment, the second segment, and the connection component includes an external wall, a support wall, a first clamping wall, and a second clamping wall. Each of the first segment and the second segment includes an internal wall. | 12-24-2015 |
Chao An Chung, Hsinchu City TW
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20090160032 | Printed Electronic Device and Transistor Device and Manufacturing Method Thereof - An electronic device, e.g., a printed transistor device, comprises a substrate, a first conductive layer, a second conductive layer and a semiconductor layer. The substrate has a first platform and a second platform embossing on the surface thereof, and the first and second platforms are separated by a gap whose width is equivalent to the channel length of the transistor. The first and second conductive layers serving as the source and the drain, respectively, of the transistor device are formed on surfaces of the first and second platforms. The semiconductor layer is formed on the surface of the substrate in the gap. | 06-25-2009 |
Cheng-Ting Chung, Hsinchu City TW
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20150287819 | SEMICONDUCTOR DEVICE AND FORMATION THEREOF - A semiconductor device and methods of formation are provided. The semiconductor device includes a first metal alloy over a first active region of a fin and a second metal alloy over a second active region of the fin. A conductive layer is over a channel region of the fin. A semiconductive layer is over the conductive layer. The conductive layer over the channel region suppresses current leakage and the semiconductive layer over the conductive layer reduces electro flux from a source to a drain, as compared to a channel region that does not have such a conductive layer or a semiconductive layer over a conductive layer. The semiconductor device having the first metal alloy as at least one of the source or drain requires a lower activation temperature than a semiconductor device that does not have a metal alloy as a source or a drain. | 10-08-2015 |
Chien Chuan Chung, Hsinchu City TW
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20080205099 | Power transistor circuit and the method thereof - The power transistor circuit with high-voltage endurance includes a first power transistor, a second power transistor and an enabling circuit. The first power transistor includes a first voltage endurance and a first inner resistance, while the second power transistor includes a second voltage endurance and a second inner resistance. The first voltage endurance and the first inner resistance are smaller than the second voltage endurance and the second inner resistance, respectively. The drain of the second power transistor is connected to the drain of the first power transistor and the enabling circuit. The enabling circuit enables the second power transistor first, and when the drain voltage of the first power transistor is smaller than the first endurance, the enabling circuit then enables the first power transistor. | 08-28-2008 |
Chien-Kai Chung, Hsinchu City TW
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20120104455 | OPTOELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - An optoelectronic device includes a substrate and a first transition stack formed on the substrate including at least a first transition layer formed on the substrate and having at least one hollow component formed inside the first transition layer, and a second transition layer wherein the second transition layer is an unintentional doped layer or an undoped layer formed on the first transition layer. | 05-03-2012 |
20130015473 | LIGHT-EMITTING DEVICEAANM CHEN; CHAO-HSINGAACI Hsinchu CityAACO TWAAGP CHEN; CHAO-HSING Hsinchu City TWAANM CHUNG; CHIEN-KAIAACI Hsinchu CityAACO TWAAGP CHUNG; CHIEN-KAI Hsinchu City TWAANM LIU; HSIN-MAOAACI Hsinchu CityAACO TWAAGP LIU; HSIN-MAO Hsinchu City TWAANM YAO; CHIU-LINAACI Hsinchu CityAACO TWAAGP YAO; CHIU-LIN Hsinchu City TWAANM HUANG; CHIEN-FUAACI Hsinchu CityAACO TWAAGP HUANG; CHIEN-FU Hsinchu City TW - The application provides a light-emitting device, comprising a substrate; a plurality of first light-emitting diode units on the substrate, wherein every first light-emitting diode unit has a first electrode structure; and a plurality of second light-emitting diode units among the plurality of first light-emitting diode units, wherein every second light-emitting diode unit has a second electrode structure. The second electrode structure of the second light-emitting diode unit is flipped over and electrically connected with the adjacent first electrode structure of the first light-emitting diode unit. | 01-17-2013 |
20140093991 | METHOD FOR MANUFACTURING HIGH EFFICIENCY LIGHT-EMITTING DIODES - A method of manufacturing a light-emitting device comprising the steps of cutting a substrate by a laser beam to form a cavity in the substrate and generate a by-product directly on the substrate by the cutting, and removing the by-product by a chemical solution containing an acid under a predetermined cleaning temperature. | 04-03-2014 |
Chih Ping Chung, Hsinchu City TW
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20080305594 | METHOD FOR FABRICATING NON-VOLATILE MEMORY - A method for fabricating a non-volatile memory is provided. Parallel-arranged isolation structures are disposed in a substrate and protrude from the surface of the substrate to define active regions. Mask layers intersecting the isolation structures are deposited on the substrate. The surface of the mask layers is higher than that of the isolation structures. Doped regions are formed in the substrate. Insulating layers are deposited on the substrate between the mask layers. The insulating layers and the mask layers have different etch selectivities. The mask layers are removed to expose the substrate. A tunneling dielectric layer is formed on the substrate. A floating gate is deposited on the substrate surrounded by the isolation structures and the insulating layers. The surface of the floating gate is lower than that of the isolation structures. An inter-gate dielectric layer is deposited on the substrate. A control gate is disposed between the insulating layers. | 12-11-2008 |
20090053870 | METHOD FOR PREPARING FLASH MEMORY STRUCTURES - A method for preparing a flash memory structure comprises the steps of forming a plurality of dielectric blocks having block sidewalls on a substrate, forming a plurality of first spacers on the block sidewalls of the dielectric blocks, removing a portion of the substrate not covered by the dielectric blocks and the first spacers to form a plurality of trenches in the substrate, performing a deposition process to form an isolation dielectric layer filling the trenches, removing the dielectric blocks to expose spacer sidewalls of the first spacers, forming a plurality of second spacers on the spacer sidewalls of the first spacers, and removing a portion of the substrate not covered by the first spacers, the second spacers and the isolation dielectric layer to form a plurality of second trenches in the substrate. | 02-26-2009 |
20100062593 | METHOD FOR PREPARING MULTI-LEVEL FLASH MEMORY DEVICES - A method for preparing a multi-level flash memory device comprises forming a dielectric stack including a charge-trapping layer on a semiconductor substrate, forming an insulation structure having a depression on the charge-trapping layer, removing a portion of the charge-trapping layer from the depression such that the charge-trapping layer is segmented to form a plurality of storage nodes, forming a gate oxide layer isolating the storage nodes and forming a damascene gate including a polysilicon layer filling the depression. | 03-11-2010 |
20160099279 | IMAGE SENSOR WITH DEEP WELL STRUCTURE AND FABRICATION METHOD THEREOF - An image sensor device includes a substrate having a first conductivity type. A plurality of photo-sensing regions including a first, a second, and a third photo-sensing regions corresponding to the R, G, B pixels are provided on the substrate. An insulation structure is disposed on the substrate to separate the photo-sensing regions from one another. A photodiode structure is formed within each photo-sensing region. A deep well structure having a second conductivity type. The deep well structure only overlaps with the second and third photo-sensing regions. The deep well structure does not overlap with the first photo-sensing region. | 04-07-2016 |
Ching-Lin Chung, Hsinchu City TW
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20150234032 | RELATIVE POSITION POSITIONING SYSTEM AND TRACKING SYSTEM - A relative position positioning system includes a first apparatus and a second apparatus. Each one of the first and second apparatuses is configured to sense a relative position of the other in an initialization period. In an operation period, each one of the first and second apparatuses is configured to measure its own displacement relative to a plane, transmit its own measured displacement to the other through a wireless transmission mean, and update the relative position of the other according to its own displacement and the displacement received from the other. A tracking system is also disclosed. | 08-20-2015 |
Ching-Yuan Chung, Hsinchu City TW
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20110273902 | BACKLIGHT MODULE - A backlight module includes a light guide plate and at least one light source. The light guide plate has a first light-emitting surface, a second light-emitting surface opposite the first light-emitting surface, and at least one side surface connected between the first light-emitting surface and the second light-emitting surface. The light guide plate has a first substance and a second substance surrounding the first substance, and the second substance is different to the first substance to form at least a first light reflecting/diffusing interface and a second light reflecting/diffusing interface. A light beam emitted by the light source is deflected by the first light reflecting/diffusing interface and output via the first light-emitting surface, and a light beam emitted by the light source is deflected by the second light reflecting/diffusing interface and output via the second light-emitting surface. | 11-10-2011 |
Chin-Yuan Chung, Hsinchu City TW
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20130236844 | SUBSTRATE CARRIER AND SELENIZATION PROCESS SYSTEM THEREOF - A substrate carrier is used for carrying a plurality of back electrode substrates into a furnace. Each back electrode substrate has a precursor layer formed thereon. The furnace is used for providing a process gas to react with the precursor layer, so as to form a photoelectric transducing layer on each back electrode substrate. The substrate carrier includes a heat-resistant metal frame and a first protective layer. The heat-resistant metal frame has a plurality of slots for supporting the plurality of back electrode substrates. The first protective layer is formed on the heat-resistant metal frame for preventing a chemical reaction of the heat-resistant metal frame with the process gas. | 09-12-2013 |
Chiu-Hua Chung, Hsinchu City TW
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20150115367 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - The present disclosure provides a method of manufacturing a semiconductor structure. The method includes forming a first mask on a substrate; defining a first doped region through an opening of the first mask; forming a second mask on the first mask and filling in the opening of the first mask with the second mask; defining a second doped region through an opening of the second mask; and stripping the first mask and the second mask from the substrate. The present disclosure provides a semiconductor structure, including a substrate having a top surface; a first doped region having a first surface; and a second doped region having a second surface. The first surface and the second surface are coplanar with the top surface of the substrate. Either of the doped regions has a monotonically decreasing doping profile from the top surface of the substrate to a bottom of the doped region. | 04-30-2015 |
Chung-Ping Chung, Hsinchu City TW
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20080235417 | METHOD AND APPARATUS FOR BUS ENCODING AND DECODING - A method and an apparatus for bus encoding and a method and an apparatus for bus decoding are provided. The methods and apparatuses for bus encoding/decoding use a discontinuous pattern table (DPT) to store discontinuous pattern pairs. The tables are kept synchronous in both transmitter and receiver ends. After transmitting the first data in a discontinuous pattern pair, the second data may be transmitted by merely informing the receiver end through a control line instead of transmitting the second data by the bus. | 09-25-2008 |
20090160870 | RUN-TIME RECONFIGURABLE FABRIC FOR 3D TEXTURE FILTERING SYSTEM - The present invention discloses a texture filtering system, comprising a sequence generator, a retrieve unit and a dispatch unit. The sequence generator generates an execution sequence in each duty cycle. The execution sequence is the priority of respectively retrieving multiple pixels from multiple queues. The retrieve unit outputs multiple Boolean signals based on the limitation of the total number of all-purpose texture filters and the above priority in a duty cycle for determining from which queues the pixels are retrieved to perform a texture filtering process, and the dispatch unit assigns the multiple texture filter formats of the pixels to be processed and the anisotropic ratios thereof to multiple address generators. Besides, the present invention utilizes Brute force method to enable multiple bilinear texture filters to satisfy the various texture filter formats of a pixel, thereby markedly reducing the space occupied by the texture filter in a 3D graphic processing unit, provided that the specifications of the address generators and texture cache memory are unchanged. | 06-25-2009 |
20100049947 | PROCESSOR AND EARLY-LOAD METHOD THEREOF - A processor and an early-load method thereof are provided. In the early-load method, an instruction is fetched and determined in an instruction fetch stage to obtain a determination result. Whether to early-load an early-loaded data corresponding to the instruction is determined according to the determination result. A target data is fetched according to the instruction in an instruction execution stage if the early-loaded data is not loaded correctly. The early-loaded data is served as the target data if the early-loaded data is loaded correctly. | 02-25-2010 |
20100161951 | PROCESSOR AND METHOD FOR RECOVERING GLOBAL HISTORY SHIFT REGISTER AND RETURN ADDRESS STACK THEREOF - A method for recovering global history shift register (GHSR) and return address stack (RAS) is provided, which is applicable to an instruction pipeline of a processor and includes the following steps. First, provide a branch recovery table (BRT) and a backup stack. Whenever a branch instruction enters a predetermined stage of the instruction pipeline, add a record in the BRT according to the branch instruction. Whenever a return address is popped from the RAS of the instruction pipeline, push the return address into the backup stack. When flushing the instruction pipeline, determine a removal range of the BRT according to the condition which triggers the pipeline flush. Recover the RAS according to the records in the removal range and the backup stack. Remove all records in the removal range. Recover the GHSR of the instruction pipeline according to the removed records. | 06-24-2010 |
20100250850 | PROCESSOR AND METHOD FOR EXECUTING LOAD OPERATION AND STORE OPERATION THEREOF - A processor and a method for executing load operation and store operation thereof are provided. The processor includes a data cache and a store buffer. When executing a store operation, if the address of the store operation is the same as the address of an existing entry in the store buffer, the data of the store operation is merged into the existing entry. When executing a load operation, if there is a memory dependency between an existing entry in the store buffer and the load operation, and the existing entry includes the complete data required by the load operation, the complete data is provided by the existing entry alone. If the existing entry does not include the complete data, the complete data is generated by assembling the existing entry and a corresponding entry in the data cache. | 09-30-2010 |
20110197048 | DYNAMIC RECONFIGURABLE HETEROGENEOUS PROCESSOR ARCHITECTURE WITH LOAD BALANCING AND DYNAMIC ALLOCATION METHOD THEREOF - A dynamic reconfigurable heterogeneous processor architecture with load balancing and dynamic allocation method thereof is disclosed. The present invention uses a work control logic unit to detect load imbalance between different types of processors, and employs a number of dynamically reconfigurable heterogeneous processors to offload the heavier loaded processors. Hardware utilization of such design can be enhanced, and variation in computation needs among different computation phases can be better handled. To design the dynamic reconfigurable heterogeneous processors, a method of how to choose the basic building blocks and place the routing components is included. With the present invention, performance can be maximized at a minimal hardware cost. Hence the dynamic reconfigurable heterogeneous processor(s) so constructed and the load balancing and dynamic allocation method together will have the best performance at least cost. | 08-11-2011 |
20120290791 | PROCESSOR AND METHOD FOR EXECUTING LOAD OPERATION THEREOF - A processor and a method for executing load operation and store operation thereof are provided. The processor includes a data cache and a store buffer. When executing a store operation, if the address of the store operation is the same as the address of an existing entry in the store buffer, the data of the store operation is merged into the existing entry. When executing a load operation, if there is a memory dependency between an existing entry in the store buffer and the load operation, and the existing entry includes the complete data required by the load operation, the complete data is provided by the existing entry alone. If the existing entry does not include the complete data, the complete data is generated by assembling the existing entry and a corresponding entry in the data cache. | 11-15-2012 |
20140157285 | DYNAMIC RECONFIGURABLE HETEROGENEOUS PROCESSOR ARCHITECTURE WITH LOAD BALANCING AND DYNAMIC ALLOCATION METHOD THEREOF - A dynamic reconfigurable heterogeneous processor architecture with load balancing and dynamic allocation method thereof is disclosed. The present invention uses a work control logic unit to detect load imbalance between different types of processors, and employs a number of dynamic reconfigurable heterogeneous processors to offload the heavier loaded processors. Hardware utilization of such design can be enhanced, and variation in computation needs among different computation phases can be better handled. To design the dynamic reconfigurable heterogeneous processors, a method of how to choose the basic building blocks and place the routing components is included. With the present invention, performance can be maximized at a minimal hardware cost. Hence the dynamic reconfigurable heterogeneous processor(s) so constructed and the load balancing and dynamic allocation method together will have the best performance at least cost. | 06-05-2014 |
Hung-Lung Chung, Hsinchu City TW
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20150309061 | BANDSAW MACHINE HEALTH MONITORING SYSTEM - A handsaw machine health monitoring system includes a sensing module, a signal processing module, a human-machine interface module and a control module. The sensing module may include a plurality of sensing devices and these sensing devices can collect a plurality of signals from a handsaw machine in operation. The signal processing module can be electrically connected to the sensing module and the signal processing module can process the signals collected by the sensing module. The control module can analyze the processing result transmitted from the signal processing module. The human-machine interface module can receive the analysis result of the control module and display the health status value of the handsaw machine. | 10-29-2015 |
I-Chou A. Chung, Hsinchu City TW
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20140348216 | TWO-WAY RELAY TRANSMISSION METHOD AND APPARATUS APPLIED TO MULTI-INPUT MULTI-OUTPUT COMMUNICATION SYSTEMS - A two-way relay transmission apparatus applied to multi-input multi-output communication systems that combines signals received from the terminals and performs a modulo operation to the combined signal to concentrate the signal points towards the center of the constellation. And then, the modulo version of the combined signal is broadcasted. As a result, the peak and average relay transmission powers can be reduced. | 11-27-2014 |
Jim Chung, Hsinchu City TW
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20130308199 | BI-TELECENTRIC CONTINUOUS ZOOM IMAGING DEVICE - A bi-telecentric continuous zoom imaging device, comprising: a collimation object lens set, to convert parallel light beams of interference patterns into a convergent light beam, and to guide it onto an imaging route through optical route adjusting means. A telecentric imaging module converts interference pattern on imaging route into a telecentric image paralleling to an optical axis. Then, a bi-telecentric continuous zoom module adjusts a magnification ratio of telecentric image, and then outputs an object image. Finally, object image is formed on a charge coupled device (CCD). Through application of bi-telecentric continuous zoom imaging device, deficiency of conventional measurement system can be improved, even if the object distance is changed the magnification ratio of image can be kept, minimum optical distortion and good resolution can also be maintained. | 11-21-2013 |
20130335829 | BI-TELECENTRIC INTERFEROMETER CONTINUOUS ZOOM IMAGING DEVICE - A bi-telecentric interferometer continuous zoom imaging device, wherein a collimation object lens set, a telecentric imaging module, a telecentric continuous zoom module, and a CCD of modular design are formed on an integral circular tube main body, and can be calibrated and positioned separately. Then, a multi-partition isolation design is used to partition a housing into independent space for said various modules, to facilitate maintenance and also achieve customization. Collimation object lens set converts parallel light beams of interference pattern into a convergent light beam, and guides it to an imaging route through optical route adjusting means. Then, telecentric imaging module converts interference pattern on imaging route into an telecentric image parallel to optical axis, and telecentric continuous zoom module adjusts a magnifying ratio of telecentric image, then outputs an object image to form it on CCD, thus improving optical distortion and inferior resolution of the prior art. | 12-19-2013 |
Jun-Wen Chung, Hsinchu City TW
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20140098420 | POLARIZATION CONVERSION MECHANISM AND METHOD THEREOF - A polarization conversion mechanism for a touch screen display includes a crystal layer and a polarizing layer. The crystal layer utilizes a birefringent crystal glass for changing phase delay effect in accordance with crystal axial angle thereof. The polarizing layer includes at least one linear polarizer such that an incident light after hitting a display module of the display device reflects and emits out through the linear polarizer and the crystal layer sequentially as reflection light in form of circularly polarized light or elliptically polarized light. The assembly of the crystal layer and the layer are installed to the display device and/or touch screen display in such a manner that the assembly is located on the display module thereof. | 04-10-2014 |
20140160059 | TOUCH SENSOR MECHANISM AND MANUFACTURING METHOD THEREOF - A touch sensor mechanism for a touch display device, includes a cover lens made by a transparent material having a dielectric constant greater than 4.5 and a compression strength greater than 700 MPa for generating a finger's touching capacitance (C | 06-12-2014 |
20140256236 | PAD CONDITIONING TOOL AND METHOD OF MANUFACTURING THE SAME - A pad conditioning tool includes a sapphire chip having a side surface defining a polishing surface and a plurality of sapphire grains formed on the polishing surface in an integral manner. Each of the sapphire grains had a three-dimensional geometric structure. The sapphire grains are arranged on the polishing surface in a specific form so as to possess a specific pattern. | 09-11-2014 |
20150044950 | PAD CONDITIONING TOOL HAVING SAPPHIRE DRESSING PARTICLES - A pad conditioning tool includes a sapphire substrate with a specific orientation plane, wherein the specific orientation plane is selected from a group consisting of a-plane, c-plane, r-plane, m-plane, n-plane and v-plane, the sapphire substrate further defining a mounting surface; and a plurality of sapphire dressing particles and a plurality of scrapers formed on the mounting surface of the substrate in a predetermined geometric arrangement, wherein the dressing particles are scattered between an adjacent pair of the scrapers. In case a wafer polishing pad is conditioned by the pad conditioning tool, the dressing particles are capable of removing abrasive waste and particles from the wafer polishing pad during a dressing operation, thereby forming new trenches and cilia structure on a polishing surface of the wafer polishing pad. | 02-12-2015 |
20150193054 | TOUCH SENSOR MECHANISM AND MANUFACTURING METHOD THEREOF - A touch sensor mechanism for a touch display device, includes a cover lens made by a transparent material having a dielectric constant greater than 4.5 and a compression strength greater than 700 MPa for generating a finger's touching capacitance (C | 07-09-2015 |
Jun-Yu Chung, Hsinchu City TW
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20140355128 | LIQUID LENS PACKAGE STRUCTURE - A liquid lens package structure includes a first light-transmitting element, a second light-transmitting element, a first elastic surrounding body, a second elastic surrounding body and a package unit. The first elastic surrounding body is disposed between the first and the second light-transmitting elements to form an enclosed space among the first light-transmitting element, the second light-transmitting element and the first elastic surrounding body for receiving and enclosing two unmingled predetermined liquids. The second elastic surrounding body is disposed on the second light-transmitting element. The package unit includes a first retaining seat and a second retaining seat mated with each other. The first retaining seat has a first opening, and the second retaining seat has a second opening. The first light-transmitting element, the first elastic surrounding body, the second light-transmitting element and the second elastic surrounding body are stacked sequentially between the first and the second retaining seats. | 12-04-2014 |
Mei-Chang Chung, Hsinchu City TW
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20110250004 | Tubular Holder - A tubular holder includes: a tubular wall defining a hollow space adapted to receive an object, and having axially opposite rear and front open ends, and a through hole extending through the tubular wall between the rear and front open ends; a clamp disposed at an outer side of the tubular wall and having a resilient claw extending into the hollow space through the through hole; and a push member disposed movably in the hollow space for pushing the object forward and having a stop face on an outer surface of the push member, the stop face being able to abut against a free end of the resilient claw to prevent rearward movement of the push member so that the push member can move only in a forward direction. | 10-13-2011 |
Min-Fan Chung, Hsinchu City TW
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20160000919 | ACID-SUBSTITUTED POLYANILINE-GRAFTED HYDROGEL COPOLYMER AND USE THEREOF - An (acid-substituted polyaniline)-grafted hydrogel copolymer is provided. The (acid-substituted polyaniline)-grafted hydrogel copolymer has a general formula as below: | 01-07-2016 |
Ming-Tsu Chung, Hsinchu City TW
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20120217611 | INTEGRATED CIRCUITS INCLUDING CONDUCTIVE STRUCTURES THROUGH A SUBSTRATE AND METHODS OF MAKING THE SAME - An integrated circuit includes a substrate having a first surface and a second surface. At least one conductive structure continuously extends through the substrate. At least one sidewall of the at least one conductive structure is spaced from a sidewall of the substrate by an air gap. | 08-30-2012 |
20150035159 | SEMICONDUCTOR DEVICE HAVING BACKSIDE INTERCONNECT STRUCTURE ON THROUGH SUBSTRATE VIA AND METHOD OF FORMING THE SAME - A semiconductor device includes a through-substrate via extending from a frontside to a backside of a semiconductor substrate. The through-substrate via includes a concave or a convex portion adjacent to the backside of the semiconductor substrate. An isolation film is formed on the backside of the semiconductor substrate. A conductive layer includes a first portion formed on the concave or convex portion of the through substrate via and a second portion formed on the isolation film. A passivation layer partially covers the conductive layer. | 02-05-2015 |
20150228541 | METHODS OF MAKING INTEGRATED CIRCUITS INCLUDING CONDUCTIVE STRUCTURES THROUGH SUBSTRATES - A method of forming an integrated circuit includes forming at least one opening through a first surface of a substrate. The method further includes forming at least one conductive structure in the at least one opening. The method further includes removing a portion of the substrate to form a processed substrate having the first surface and a second surface opposite the first surface and to expose a portion of the at least one conductive structure adjacent to the second surface. The at least one conductive structure continuously extending from the first surface through the processed substrate to the second surface of the processed substrate, at least one sidewall of the at least one conductive structure spaced from a sidewall of the at least one opening by an air gap. | 08-13-2015 |
Ming-Yu Chung, Hsinchu City TW
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20090085039 | Image display system and fabrication method thereof - The invention provides a method for fabricating a low-temperature polysilicon (LTPS) driving circuit and thin film transistor. The method includes: providing a substrate, forming an active layer, forming a gate insulating layer, forming a dielectric layer having an extending portion and forming a gate electrode. The extending portion of the dielectric layer and the gate electrode are formed during the same step, and they can serve as a mask during a later doping process so that a lightly doped source/drain region and a source/drain region are formed during the same time without forming extra masks. | 04-02-2009 |
Pao-Tang Chung, Hsinchu City TW
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20090291295 | TRANSPARENT HEAT SHIELDING MULTILAYER STRUCTURE - A transparent heat shielding multilayer structure is disclosed. The multilayer structure includes: a transparent base film; a first transparent heat shielding layer with lanthanum hexaboride (LaB | 11-26-2009 |
20120113505 | MULTILAYERED INFRARED LIGHT REFLECTIVE STRUCTURE - The invention provides a multilayered infrared light reflective structure. The multilayered infrared light reflective structure includes a transparent substrate. A doped oxide film is disposed on the transparent substrate. An oxide isolated layer is disposed on the doped oxide film, thereby allowing incident light to be incident from a top surface of the transparent substrate into the multilayered infrared light reflective structure. | 05-10-2012 |
20120138842 | HEAT SHIELDING MATERIAL AND METHOD FOR MANUFACTURING THE SAME - A heat shielding material and method for manufacturing thereof is provided. The method for manufacturing the heat shielding material, includes: providing a tungsten oxide precursor solution containing a group VIII B metal element; drying the tungsten oxide precursor solution to form a dried tungsten oxide precursor; and subjecting the dried tungsten oxide precursor to a reducing gas at a temperature of 100° C. to 500° C. to form a composite tungsten oxide. The heat shielding material includes composite tungsten oxide doped with a group I A or II A metal and halogen, represented by M | 06-07-2012 |
20140242381 | IR REFLECTIVE MULTILAYER STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - The disclosure provides an IR reflective multilayer structure, including a transparent substrate, a barrier layer disposed on the transparent substrate, wherein the barrier layer includes tungsten oxide-containing silicon dioxide, tungsten oxide-containing titanium dioxide, tungsten oxide-containing aluminium oxide or combinations thereof, and a heat shielding layer composed of a composite tungsten oxide, represented by Formula (I): M | 08-28-2014 |
20150153490 | HEAT SHIELDING MATERIAL AND METHOD FOR MANUFACTURING THE SAME - A heat shielding material and method for manufacturing thereof is provided. The method for manufacturing the heat shielding material, includes: providing a tungsten oxide precursor solution containing a group VIIIB metal element; drying the tungsten oxide precursor solution to form a dried tungsten oxide precursor; and subjecting the dried tungsten oxide precursor to a reducing gas at a temperature of 100° C. to | 06-04-2015 |
Sheng-Feng Chung, Hsinchu City TW
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20130008687 | CONDUCTIVE FILM STRUCTURE CAPABLE OF RESISTING MOISTURE AND OXYGEN AND ELECTRONIC APPARATUS USING THE SAME - A conductive film structure capable of resisting moisture and oxygen and an electronic apparatus using the same are provided. The conductive film structure includes a metal electrode, a metal oxide layer, and an insulating layer. The metal oxide layer is disposed on the metal electrode and includes an oxide of the metal electrode. The insulating layer covers the metal oxide layer and has at least one pinhole therein. | 01-10-2013 |
20150177867 | Touch panel structure and fabrication method for the same - A touch panel structure includes a transparent substrate having a touch area and a frame wire area, X conductive electrodes, Y conductive electrodes, X conductive connecting sections connecting the X conductive electrodes along a first direction, frame wires, insulated layers and Y conductive connecting bridges on the insulated layers. The X and Y conductive electrodes are respectively arranged in an array in the touch area and interlaced with each other. The X and Y conductive electrodes are electrically connected to an external circuit via the frame wires. The insulated layers each cover one of the X conductive electrodes and two of the Y conductive electrodes. The Y conductive electrodes are electrically connected to each other via the Y conductive connecting bridges along a second direction. A conducting material is performed by one-time printing to pattern the X and Y conductive electrodes, X conductive connecting sections and frame wires. | 06-25-2015 |
20150338078 | ILLUMINATION DEVICE - An illumination device includes an OLED panel, an electrode structure, and a control module. The OLED panel includes a light-emitting layer configured to emit a light beam. The electrode structure is overlaid on the OLED panel. The electrode structure includes a first touch electrode including at least two conductive portions, and the conductive portions of the first touch electrode are electrically connected to the other conductive portions. The control module is electrically connected to the OLED panel and the first touch electrode. The light-emitting layer further includes a light-emitting material, and a width of the light-emitting material is greater than half of a width of the first touch electrode. | 11-26-2015 |
Shiyh-Jong Chung, Hsinchu City TW
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20090091507 | ANTENNA DEVICE WITH AN ISOLATING UNIT - An antenna device includes a pair of antennas and an isolating unit. The antennas have the same operating frequency. The isolating unit is disposed between the S antennas, and includes an LC circuit that has a resonant frequency, which is the same as the operating frequency of the antennas, thereby improving isolation between the antennas. | 04-09-2009 |
Steve S. Chung, Hsinchu City TW
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20120126197 | Structure and process of basic complementary logic gate made by junctionless transistors - The present invention discloses a structure and process of basic complementary logic gate made by junctionless transistors. Junctionless N-channel transistor(s) and junctionless P-channel transistor(s) are formed on a semiconductor wafer, a conducting contact structure is used to connect the transistors to form a basic complementary logic gate(s) such as inverter, NAND, NOR, etc. | 05-24-2012 |
20160027507 | NONVOLTILE RESISTANCE MEMORY AND ITS OPERATION THEREOF - A memory cell and the associated array circuits are disclosed. The memory array circuit includes a plurality of memory units, in which each of the memory units includes a storage device and a field-effect transistor. The storage device includes a top electrode, a bottom electrode and an oxide-based dielectric layer. The top electrode is formed by metal or metallic oxide dielectrics and connected to a word line. The bottom electrode is formed by metal, and the oxide-based dielectric layer is placed between the top electrode and the bottom electrode. The field-effect transistor includes a gate terminal connected to the bottom electrode, a source terminal connected to a ground line, and a drain terminal connected to a bit line. The resistance of the storage device is configured to be adjusted according to a first voltage applied to the word line and a second voltage applied to the bit line. | 01-28-2016 |
20160027844 | NAND-type Resistance Random Access Memory Circuit And Operation Thereof - A high density NAND-type nonvolatile resistance random access storage circuit and its operations are disclosed herein. A unit memory cell of the circuit includes a field effect transistor (FET) with a resistance changeable component connected to its gate electrode. The field effect transistor is an n-channel field effect transistor or a p-channel field effect transistor. By applying the voltage or current between the top electrode of the resistive random access component and the FET drain or source electrode, more than two stable states can be maintained such that these states can be drawn from the FET drain or source electrode. The NAND circuit includes the above unit cell as a center to form a multi-bit memory. The circuit consists of multi-bit memories connected in series, has a NAND logic gate function, and forms output of this NAND circuit which can be drawn in a form of series output. | 01-28-2016 |
Te-Yuan Chung, Hsinchu City TW
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20100073747 | Wavelength-multiplex and space-multiplex holographic storage device - The present invention discloses a wavelength-multiplex and space-multiplex holographic storage device, which comprises a storage medium, a plurality of signal light beams and at least one reference light beam. The signal light beams have different wavelengths and illuminate the storage medium. The reference light beam illuminates the storage medium and interferes with the signal light beams to form a plurality of interference patterns. The interference patterns are respectively stored on different-depth storage layers of the storage medium. The present invention not only has a high access rate but also has a large storage capacity. | 03-25-2010 |
Tsai-Feng Chung, Hsinchu City TW
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20120236946 | MULTIMEDIA STREAM DISPLAYING SYSTEM AND METHOD THEREOF - A multimedia stream displaying method is disclosed. The method includes the following steps: firstly, a portable decoder unit is embedded between an application layer and a hardware layer. Then, a specific stream format of the hardware layer is inquired. A plurality of multimedia streams from the application layer are received and decoded, and the decoded multimedia streams are encapsulated in the specific stream format. Finally, the encapsulated multimedia streams are transmitted to the hardware layer to be displayed. | 09-20-2012 |
Tzi-Hung Chung, Hsinchu City TW
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20150093043 | Method of Evaluating Image Correlation with Speckle Patter - An image correlation for images having speckle pattern is evaluated. Modulation transfer function (MTF) curves of speckle-pattern images captured at different times are figured out. Whether a correlation value between the MTF curves meets a threshold is checked. If the correlation value is smaller than the threshold, speckle-pattern images are re-selected for re-figuring out the MTF curves and the correlation value. Thus, error of strain and displacement for digital image correlation owing to blurring images of the on-moving target object is figured out; calculation time of the digital image correlation is reduced; and accuracy on measuring physical parameters of the target object before and after movement is improved for digital image correlation. | 04-02-2015 |
Tzu-Yang Chung, Hsinchu City TW
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20140216500 | Single Wafer Cleaning Tool with H2SO4 Recycling - Some embodiments relate to methods and apparatus for mitigating high metal concentrations in photoresist residue and recycling sulfuric acid (H | 08-07-2014 |
Wen-Sheng Chung, Hsinchu City TW
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20150372392 | OVERLAPPING MULTI-BOARD INTEGRATED ANTENNA DEVICE - An overlapping multi-board integrated antenna device includes a load plate with grounding portion and at least two-circuit board antenna units set in the grounding portion. Each circuit board antenna unit includes a circuit board kit, at least one antenna set on the surface of the circuit board kit and a feed line electrically connected with the antenna. Each circuit board kit includes a vertical plate and an interconnected horizontal plate. The antenna for the circuit board is set on the vertical plate. Two horizontal plates abutted in different circuit board antenna units are formed into an integrated structure via the same plate, and a joint portion is formed between two horizontal plates. Thus, the integrated configuration of multiple circuit board antenna units can be minimized to reduce the component amount and cost, so as to meet multi-function demands of antenna with better applicability and industrial and economic benefits. | 12-24-2015 |
Yi-Jen Chung, Hsinchu City TW
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20090073818 | SEEKING CONTROL SYSTEM AND METHOD OF OPTICAL DISC DRIVE - A seeking control system in an optical disc drive is disclosed. The system comprises a servo controller, a velocity control unit, and a switch unit. The servo controller receives a central servo signal to output a first tracking control signal for the tracking coil. The velocity control unit receives a tracking error signal to determine a velocity of the pickup head and compares the velocity of the pickup head with a predetermined velocity profile to generate the second tracking control signal. The switch unit outputs the second tracking control signal instead of the first tracking control signal to the motor driver to control the pickup head moving steadily. | 03-19-2009 |
20090168616 | SPHERICAL ABERRATION COMPENSATION METHOD OF OPTICAL STORAGE DEVICE - A spherical aberration compensation method of an optical storage device is provided. The method includes: deriving a first spherical aberration compensation value corresponding to a first track position on a recording layer of an optical storage medium to serve as a first reference value; deriving a second spherical aberration compensation value corresponding to a second track position on the recording layer of the optical storage medium to serve as a second reference value; and estimating a third spherical aberration compensation value corresponding to a third track position on the recording layer of the optical storage medium according to the first and second reference values. | 07-02-2009 |
Yuan Chih Chung, Hsinchu City TW
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20100061384 | GATEWAY SYSTEM WITH AUTOMATIC DISPATCH MECHANISM AND METHOD THEREOF - The method for automatically dispatching frames applied to a gateway comprises the steps of: using a first transceiver module to receive a plurality of frames from a network system; storing the frames in corresponding dispatch registers if at least a portion of the bits of the frames match one of a plurality of predetermined values; scheduling a dispatch order of the dispatch registers in accordance with a dispatch request; and dispatching frames stored in the dispatch registers to a second transceiver module in accordance with the dispatch order. | 03-11-2010 |
Yu-Fen Chung, Hsinchu City TW
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20140016092 | IMAGE CAPTURING APPARATUS AND AUTO-FOCUSING METHOD THEREOF - An image capturing apparatus and an auto-focusing method thereof are provided. The method includes transmitting light beams from light sources to an eye including a cornea, a pupil, a crystalline lens, and a fundus. The light beams are transmitted to the fundus through the cornea. The light beams transmitted to the cornea form first light point images detected by an image sensor through a lens module having first and second lenses. According to the first light point images and focal adjustment data, the first lens and the light sources are moved simultaneously to focus on the cornea. The light beams are substantially intersected at the pupil and transmitted to the fundus to form second light point images detected by the image sensor through the lens module. According to the second light point images and the focal adjustment data, the first lens is moved to focus on the fundus. | 01-16-2014 |
Yung-Chi Chung, Hsinchu City TW
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20160077986 | ELECTRONIC APPARATUS PROVIDING REAL-TIME SWITCHING AND SHARING OF USB ELECTRONIC DEVICES AMONG HOSTS - The present disclosure provides an electronic apparatus that comprises a number of Universal Serial Bus (USB) device control modules, a microprocessor, a priority arbitration module, a USB host control module and a USB hub module. The USB device control modules are configured to receive from and send to a host a USB electric signal. The microprocessor is configured to generate a number of virtual USB hub modules in a memory. Each of the virtual USB hub modules is configured to generate a USB device enumeration signal, in response to an electric connection status between a USB electronic device and the USB hub module, and to send the USB device enumeration signal via a corresponding one of the USB device control modules to the host. The priority arbitration module is configured to, in response to the availability of the USB electronic device, transmit the USB electric signal issued from the host to the USB electronic device via the USB host control module and the USB hub module. | 03-17-2016 |
Yung-Hui Chung, Hsinchu City TW
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20120326900 | SUCCESSIVE APPROXIMATION REGISTER ANALOG TO DIGITAL CONVERTER AND CONVERSION METHOD THEREOF - A SAR ADC is provided. A DAC provides an intermediate analog signal according to an analog input signal, a most significant bit capacitance and a plurality of significant bit capacitances smaller than the most significant bit capacitance. A first switched capacitor array selectively provides the most significant bit capacitance or the significant bit capacitances according to a select signal. Sum of the significant bit capacitances is equal to the most significant bit capacitance. The second switched capacitor array provides the significant bit capacitances when the first switched capacitor array provides the most significant bit capacitance, and provides the most significant bit capacitance when the first switched capacitor array provides the significant bit capacitances. A comparator provides a comparison result according to the intermediate analog signal. A SAR logic provides an digital output signal according to the comparison result. | 12-27-2012 |
20120326903 | METHOD AND APPARATUS FOR PERFORMING NONLINEARITY CALIBRATION - A method for performing nonlinearity calibration includes the steps of: obtaining temporarily values of a plurality of compensation parameters by performing a perturbation-based calibration process on a nonlinear system with at least one predetermined input being applied to the nonlinear system; and updating the compensation parameters by performing the perturbation-based calibration process in an online manner, wherein the temporarily values are utilized as initial values of the compensation parameters for the step of updating the compensation parameters. In addition, the compensation parameters are utilized for controlling a compensation response of the perturbation-based calibration process. An associated apparatus is also provided. | 12-27-2012 |
Yun-Sheng Chung, Hsinchu City TW
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20090050202 | SOLAR CELL AND METHOD FOR FORMING THE SAME - The invention is directed to a solar cell. The solar cell comprises a silicon layer, a front side electrode and a back side electrode. The silicon layer has a first surface and a second surface. The front side electrode is located on the first surface of the silicon layer. The back side electrode is located on the second surface of the silicon layer. Further, the back side electrode comprises a passivation layer, a first conductive layer and a second conductive layer. The passivation layer is located on the second surface of the silicon layer and has a plurality of holes penetrating through the passivation layer. The first conductive layer is located on the passivation layer and is electrically connected to the silicon layer through the holes. The second conductive layer is located on the first conductive layer. | 02-26-2009 |
20100083900 | ATOMIC LAYER DEPOSITION APPARATUS - An atomic layer deposition apparatus is provided. The atomic layer deposition apparatus includes a reaction chamber, a first heater, a second heater, a first gas supply system, a second gas supply system and a vacuum system. The vacuum system is connected to the reaction chamber. The reaction chamber includes a preheating chamber and a plating chamber connected to the preheating chamber. The first heater is for heating the preheating chamber. The first gas supply system is connected to the preheating chamber. The second heater is for heating the plating chamber. The second gas supply system is connected to the plating chamber. | 04-08-2010 |