Chun-Yen
Chun Yen Tseng, Pingtung City TW
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20080224683 | CONTROL SYSTEM FOR DYNAMICALLY ADJUSTING OUTPUT VOLTAGE OF VOLTAGE CONVERTER - A control system for dynamically adjusting an output voltage of a voltage converter includes a signal calculation circuit, a pulse width modulator, a voltage converter, a nonlinear calibration circuit and a signal converter. The signal calculation circuit, the pulse width modulator, the voltage converter and the signal converter form a long-tail loop. The signal calculation circuit simultaneously receives a target value and a detection value from the signal converter to generate an error value for adjusting the output of the pulse width modulator. The voltage converter and the nonlinear calibration circuit form a local pulse-squashing loop. Pulse widths of an input signal to the voltage converter can be timely and effectively calibrated and controlled, thereby decreasing power consumption of the voltage converter and providing an effective protective mechanism. | 09-18-2008 |
Chun Yen Wang, Ei Paso, TX US
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20160107874 | LIQUID DISPENSER WITH OZONATING, RECIRCULATING AND IMPROVED TEMPERATURE CONTROL FUNCTIONS - Liquid dispensing systems which sanitize the liquid and liquid-contacting parts of a liquid dispensing system using ozonation, by periodically flushing the system with ozonated gas or liquid. Also disclosed and claimed are an apparatus and method for controlling temperature variations between the liquid in holding (e.g., cold and/or hot) tanks and the liquid as it is dispensed, which may be used with an Insta-Boil feature. | 04-21-2016 |
Chun Yen Wang, El Pas, TX US
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20150122831 | CHILD SAFETY FAUCET - A liquid dispensing apparatus with a child-safety feature which, in one preferred embodiment, does not permit dispensing unless both a dispensing handle and an associated lever are each independently moved. In another embodiment, dispensing is prevented unless a manually-depressable, rotatable dispensing lever and a rotatable safety lock are both simultaneously actuated. | 05-07-2015 |
Chun-Yen Chang, New Taipei City TW
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20130346971 | COMMUNICATION METHOD OF VIRTUAL MACHINES AND SERVER-END SYSTEM - A communication method of virtual machines and a server-end system are provided. A virtual hardware address is assigned to a virtual machine when the virtual machine are established, wherein the virtual hardware address includes a tenant identity. A validation procedure for a packet is performed when the virtual machine desires to communicate with another virtual machine by transmitting the packet, so as to determine whether the virtual hardware addresses of the source-end and the destination-end in the packet have the same tenant identity. If the both virtual hardware addresses have the same tenant identity, the packet is transmitted to the another virtual machine. | 12-26-2013 |
20140359599 | Operating System Deployment Method, Server and Electronic System - A method of operating system (OS) deployment for installing an OS on a plurality of electronic devices includes installing the OS on a sample electronic device; packing the OS in the sample electronic device into a prebuilt package; transmitting the prebuilt package to the plurality of electronic devices; and restoring the prebuilt package to the OS respectively in the plurality of electronic devices. | 12-04-2014 |
20150312174 | HYBRID DATA TRANSMISSION METHOD AND RELATED HYBRID SYSTEM - A hybrid data transmission method includes broadcasting a request via a first channel from a first host device, wherein the request comprises Internet protocol (IP) address information; replying to the request with a hardware address and a bus identity of a second host device via the first channel according to the IP address information when the second host device receives the request; transmitting the hardware address and the bus identity to a second interface controller when a first interface controller receives the hardware address and the bus identity; setting a second channel according to the hardware address and the bus identity when the second interface controller receives the hardware address and the bus identity; and transmitting a plurality of data packets between the first host device and the second host device via the second channel. | 10-29-2015 |
Chun-Yen Chang, Hsin-Chu TW
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20120147623 | OPTICAL FILM ASSEMBLY, BACKLIGHT MODULE AND DISPLAY DEVICE - An optical film assembly includes a first prism film and a first diffusing film. The first diffusing film is disposed on the first prism film. The first prism film has a plurality of prism structures arranged in parallel with each other and arranged in an orientation direction. The first diffusing film has a tensile direction. An angle included between the tensile direction of the first diffusing film and the orientation direction of the prism structures of the first prism film is between 50 degrees and 130 degrees. | 06-14-2012 |
Chun-Yen Chang, Hsinchu City TW
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20090278165 | Light emitting device and fabrication method therefor - A light emitting device (LED) structure formed on a Group IV-based semiconductor substrate is provided. The LED structure includes a Group IV-based substrate, an AlN nucleation layer formed on the Group IV-based substrate, a GaN epitaxial layer formed on the AlN nucleation layer, a distributed Bragg reflector (DBR) multi-layer structure formed on the epitaxial layer, and an LED active layer formed on the DBR multi-layer structure. | 11-12-2009 |
20110197956 | THIN FILM SOLAR CELL WITH GRADED BANDGAP STRUCTURE - A thin film solar cell with a graded bandgap structure comprises a front contact, a first light absorption layer, a transition layer, a second light absorption layer and a back contact. The first light absorption layer is formed on the front contact, the transition layer is formed on the first light absorption layer, the second light absorption layer is formed on the transition layer, and the back contact is formed on the second light absorption layer, wherein the transition layer has a graded bandgap, which is made by alternating a layer of the first superlattice layers, having a first bandgap, with a layer of the second superlattice layers, having a second bandgap, in a tandem arrangement, based on the condition that the thickness of each layer of the first and the second superlattice layers is varied increasing, decreasing or increasing first and then decreasing. | 08-18-2011 |
20140008609 | LIGHT EMITTING DEVICE WITH NANOROD THEREIN AND THE FORMING METHOD THEREOF - A method of fabricating a light emitting device, comprising: providing a substrate; forming an undoped semiconductor layer on the substrate; forming a patterned metal layer on the undoped semiconductor layer; using the patterned metal layer as a mask to etch the undoped semiconductor layer and forming a plurality of nanorods on the substrate; and forming an light emitting stack on the plurality of nanorods to form a plurality of voids between the light emitting stack and the plurality of nanorods. | 01-09-2014 |
20150115361 | Lateral Diffused Metal Oxide Semiconductor - A lateral diffused N-type metal oxide semiconductor device includes a semiconductor substrate, an epi-layer on the semiconductor substrate, a patterned isolation layer on the epi-layer, a N-type double diffused drain (NDDD) region in a first active region of the patterned isolation layer, a N+ heavily doped drain region disposed in the NDDD region, a P-body diffused region disposed in a second active region of the patterned isolation layer, a neighboring pair of a N+ heavily doped source region and a P+ heavily doped source region disposed in the P-body diffused region, a first gate structure disposed above a channel region of the patterned isolation layer and a second gate structure disposed above the second active region. The second gate structure and the first gate structure are spaced at a predetermined distance. | 04-30-2015 |
20150115362 | Lateral Diffused Metal Oxide Semiconductor - A lateral diffused N-type metal oxide semiconductor device includes a semiconductor substrate, an epi-layer on the semiconductor substrate, a patterned isolation layer on the epi-layer, a N-type double diffused drain (NDDD) region in a first active region of the patterned isolation layer, a N+ heavily doped drain region disposed in the NDDD region, a P-body diffused region disposed in a second active region of the patterned isolation layer, a neighboring pair of a N+ heavily doped source region and a P+ heavily doped source region disposed in the P-body diffused region, a first gate structure disposed above a channel region of the patterned isolation layer and a second gate structure disposed above the second active region. The second gate structure and the first gate structure are spaced at a predetermined distance. A making method of the NDDD region includes using an ion implant and an epitaxy layer doping. | 04-30-2015 |
Chun-Yen Chang, Hsinchu TW
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20090098714 | Method for forming III-nitrides semiconductor epilayer on the semiconductor substrate - GaN layer on semiconductor substrate is grown by using GaN nanorod buffer layer. Firstly, semiconductor substrate is cleaned and thermally degassed to remove the contaminant in the growth chamber. After the above step, the GaN nanorods layer is grown under the N-rich condition. Then, GaN epilayer is overgrown on the GaN nanorods layer under the Ga-rich condition for forming Group of III-Nitrides semiconductor layer on the semiconductor substrate. | 04-16-2009 |
20100197060 | Method of Forming Laterally Distributed LEDs - A method of forming laterally distributed light emitting diodes (LEDs) is disclosed. A first buffer layer with a first type of conductivity is formed on a semiconductor substrate, and a dielectric layer is formed on the first buffer layer. The dielectric layer is patterned to form a first patterned space therein, followed by forming a first active layer in the first patterned space. The dielectric layer is then patterned to form a second patterned space therein, followed by forming a second active layer in the second patterned space. Second buffer layers with a second type of conductivity are then formed on the first active layer and the second active layer. Finally, electrodes are formed on the second buffer layers and on the first buffer layer. | 08-05-2010 |
20110089467 | OHMIC CONTACT OF III-V SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME - Heavily doped epitaxial SiGe material or epitaxial In | 04-21-2011 |
Chun-Yen Chang, Hsinchu County TW
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20120099240 | HIGH ENERGY DENSITY AND LOW LEAKAGE ELECTRONIC DEVICES - A magnetic capacitor includes two electrode layers, an insulator layer, and one or more magnetized layers. The insulator layer is located between the first electrode layer and the second electrode layer. The one or more magnetized layers include one or more ferro-magnetic elements that are magnetized. The one or more magnetized layers are located so that the one or more ferro-magnetic elements apply a magnetic field to the insulator layer to improve an electrical property of the insulator layer. Magnetic fields applied perpendicular to the electrode layers increase the capacitance and electrical energy storage of the insulator layer. Magnetic fields applied parallel to the electrode layers decrease the leakage current and increase the breakdown voltage of the insulator layer. The one or more ferro-magnetic elements used can include ferro-magnetic plates or magnetic nanodots. The one or more magnetized layers can be located between or outside of the electrode layers. | 04-26-2012 |
20130228809 | SEMICONDUCTOR STRUCTURE FOR SUBSTRATE SEPARATION AND METHOD FOR MANUFACTURING THE SAME - A semiconductor structure includes a temporary substrate; a first semiconductor layer positioned on the temporary substrate; a dielectric layer comprising a plurality of patterned nano-scaled protrusions disposed on the first semiconductor layer; a dielectric layer surrounding the plurality of patterned nano-scaled protrusions and disposed on the first semiconductor layer; and a second semiconductor layer positioned on the dielectric layer, wherein the top surfaces of the patterned nano-scaled protrusions are in contact with the bottom of the second semiconductor layer. An etching process is performed on the semiconductor structure to separate the first semiconductor layer and the second semiconductor layer, in order to detach the temporary substrate from the second semiconductor layer and transfer the second semiconductor layer to a permanent substrate. | 09-05-2013 |
20140047160 | DATA WRITING METHOD, AND MEMORY CONTROLLER AND MEMORY STORAGE APPARATUS USING THE SAME - A data writing method for writing data into a memory cell of a rewritable non-volatile memory module, and a memory controller and a memory storage apparatus using the same area provided. The method includes recording a wear degree of the memory cell and adjusting an initial write voltage and a write voltage pulse time corresponding to the memory cell based on the wear degree thereof. The method further includes programming the memory cell by applying the initial write voltage and the write voltage pulse time, thereby writing the data into the memory cell. Accordingly, data can be accurately stored into the rewritable non-volatile memory module by the method. | 02-13-2014 |
20140160844 | MEMORY REPAIRING METHOD, AND MEMORY CONTROLLER AND MEMORY STORAGE APPARATUS USING THE SAME - A memory repairing method for a rewritable non-volatile memory module and a memory controller and a memory storage apparatus are provided. The method includes monitoring a wear degree of the rewritable non-volatile memory module; determining whether the wear degree of the rewritable non-volatile memory module is larger than a threshold; and heating the rewritable non-volatile memory module such that the temperature of the rewritable non-volatile memory module lies in between 100° C.˜600° C. if the wear degree of the rewritable non-volatile memory module is larger than the threshold. Accordingly, deteriorated memory cells in the rewritable non-volatile memory module can be repaired, thereby preventing data loss. | 06-12-2014 |
20140264260 | LIGHT EMITTING STRUCTURE - The present invention provides a semiconductor column structure which includes a light emitting layer and at least two facets with different crystalline orientations. The surface area ratio of the at least two facets is changed to alter the luminescence properties, such as CCT and CRI. Particularly, the surface area ratio of the at least two facets is adjusted in a range of from 1:0.1 to 1:10. | 09-18-2014 |
20140299923 | FIELD EFFECT TRANSISTOR - A field effect transistor includes a semiconductor substrate having a protrusion with at least one inclined surface, a gate insulator disposed at least on a portion of the inclined surface, and a gate conductor disposed on the gate insulator, wherein the semiconductor substrate comprises doped regions sandwiching a channel region, wherein the at least one inclined surface has a first crystal orientation in the channel region, and the inclined surface has an included angle to a vertical plane with a second crystal orientation. The hole mobility and the electron mobility are substantially the same in the channel region having a crystalline orientation off from the (110) crystal orientation. | 10-09-2014 |
20140325118 | DATA WRITING METHOD, MEMORY CONTROLLER AND MEMORY STORAGE APPARATUS - A data writing method for writing data into a physical erasing unit and a memory controller and a memory storage apparatus using the data writing method are provided. The method includes dividing the data into a plurality of information frames in a unit of one physical programming unit. The method also includes writing the information frames in sequence into at least one physical programming unit constituted by memory cells disposed on at least one first word line and programming the storage state of memory cells disposed on at least one second word line following the first word line to an auxiliary pattern. Accordingly, the method effectively prevents data stored in the physical erasing unit, which is not full of data, from being lost due to a high temperature. | 10-30-2014 |
20150380162 | High Energy Density and Low Leakage Electronic Devices - A method for fabricating a magnetic capacitor is provided. A first conducting material is deposited to form a first electrode layer. One or more first ferro-magnetic elements are deposited to form magnetic layer and are aligned and magnetized to produce a magnetic field. An insulating material is deposited to form an insulating layer. A second conducting material is deposited to form a second electrode layer. The one or more ferro-magnetic elements are aligned and magnetized to apply the magnetic field to the insulator layer so that the magnetic field is perpendicular to the first electrode layer and the second electrode layer, and so that the magnetic field is periodic along the length of the insulator layer and results in electric dipoles being formed in the insulator layer when a voltage is applied between the first electrode layer and the second electrode layer. | 12-31-2015 |
Chun-Yen Chang, Taipei City TW
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20090217379 | METHOD FOR ANTIVIRUS PROTECTION AND ELECTRONIC DEVICE WITH ANTIVIRUS PROTECTION - The invention provides a method for antivirus protection adapted for an electronic device. First, an option read only memory (ROM) is initialized. Second, all network connection ports of the electronic device are disabled. A first network connection port is enabled to connect the electronic device with an external system. Whether first antivirus software is installed on the electronic device is checked. If it is checked that the first antivirus software is not installed on the electronic device, after second antivirus software is received by the electronic device from the external system via the first network connection port and is installed on the electronic device, the electronic device enables all the network connection ports to connect the electronic device with the external system. | 08-27-2009 |
20140354542 | INTERACTIVE DISPLAY SYSTEM - An interactive display system including a data processing unit, a display, a laser pointer, a translucent optical device, an image capture device, and an optical filter is disclosed. The laser pointer projects a laser beam on the translucent optical device attached to or built in a screen of the display. The laser beam has a specified wavelength within a visible light spectrum. The translucent optical device reflects most of the laser beam. The image capture device acquires under the data processing unit a sensed image including a part of a displayed object image within the specified wavelength and the reflected laser beam. The data processing unit determines a position of the laser beam relative to the displayed object image in accordance with light intensity distribution of the sensed image, calculates a distance vector between the determined position and a cursor, and moves the cursor according to the distance vector. | 12-04-2014 |
Chun-Yen Chang, Baoshan Township TW
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20110124139 | METHOD FOR MANUFACTURING FREE-STANDING SUBSTRATE AND FREE-STANDING LIGHT-EMITTING DEVICE - The present invention provides a method for manufacturing a free-standing substrate, comprising: growing a first layer having a sacrificial layer on a growth substrate; patterning the first layer into a patterned first layer having a structure of a plurality of protrusions; growing a second layer on the patterned first layer having a structure of a plurality of protrusions by epitaxial lateral overgrowth; and separating the second layer from the growth substrate by etching away the sacrificial layer, wherein the separated second layer functions as a free-standing substrate for epitaxy. Also, the present invention provides a method for manufacturing a free-standing light-emitting device, comprising: growing a first layer having a sacrificial layer on a growth substrate; patterning the first layer into a patterned first layer having a structure of a plurality of protrusions; growing a second layer on the patterned first layer having a structure of a plurality of protrusions by epitaxy growth; forming a reflecting layer on the second layer; forming a conductive substrate on the reflecting layer; and separating the second layer, the reflecting layer, and the conductive substrate from the growth substrate by etching away the sacrificial layer, so as to form a free-standing light-emitting device. | 05-26-2011 |
20110183480 | SEMICONDUCTOR DEVICE WITH GROUP III-V CHANNEL AND GROUP IV SOURCE-DRAIN AND METHOD FOR MANUFACTURING THE SAME - The present invention is related to a semiconductor device with group III-V channel and group IV source-drain and a method for manufacturing the same. Particularly, the energy level density and doping concentration of group III-V materials are increased by the heteroepitaxy of group III-V and group IV materials and the structural design of elements. The method comprises: preparing a substrate; depositing a dummy gate material layer on the substrate and defining a dummy gate from the dummy gate material layer by photolithography; performing doping by self-aligned ion implantation using the dummy gate as a mask and performing activation at high temperature, so as to form source-drain; removing the dummy gate; forming a recess in the substrate between the source-drain pair by etching; forming a channel-containing stacked element in the recess by epitaxy; and forming a gate on the channel-containing stacked element. | 07-28-2011 |
20130286734 | NAND FLASH MEMORY - A NAND flash memory includes a plurality of NAND flash memory structures separated by an insulating layer. In one embodiment of the present disclosure, the NAND flash memory structure includes a first bitline extending along a first direction, a first charge-trapping region positioned over the first bitline, a wordline positioned over the first charge-trapping region and extending along a second direction, a second charge-trapping region positioned over the wordline, and a second bitline positioned over the second charge-trapping region, wherein the first charge-trapping region and the second charge-trapping region are stacked along a third direction substantially perpendicular to the first direction and the second direction. | 10-31-2013 |
Chun-Yen Chang, Taipei TW
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20140092017 | INTERACTIVE SIMULATED-GLOBE DISPLAY SYSTEM - The invention discloses an interactive simulated-globe display system including an imaging body, N image-projecting units, a data processing unit, an optical pointer, and M image-capturing units where N and M are respectively a natural number. The N image-projecting units project N images onto an external hemispheric surface of the imaging body. The N images constitute a hemi-globe image of a whole globe image. The data processing unit detects an indicated spot projected on the external hemispheric surface by the M image-capturing units, judges if a track relative to the indicated spot meets one of a plurality of position input rules, and if YES, executes an instruction corresponding to said one position input rule. | 04-03-2014 |
Chun-Yen Chen, New Taipei City TW
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20160118080 | VIDEO PLAYBACK METHOD - A video playback method and a video playback apparatus are provided. The object path extraction module of the video playback apparatus extracts at least one object path from an original video. The video synthesizing module of the video playback apparatus selectively adjusts said object path, so as to synthesize the object path into the synthesis video. The video synthesizing module determines the time length of the synthesis video based on the playback time length set by user, wherein the time length of the synthesis video less than the time length of the original video. | 04-28-2016 |
Chun-Yen Chen, Kaohsiung City TW
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20090162165 | SCREW FOR FASTENING WOODEN MATERIALS - A screw includes a shank portion including a tapered bottom section having a tip, a head on top of the shank portion, and first and second helical threads. The first helical thread extends helically around the shank portion in a first direction between the tip and the head, and has a first end distal from the head, and a second end opposite to the first end. The second helical thread extends helically around the shank portion in a second direction between the first helical thread and the tip, and has a third end proximate to the second end of the first helical thread. The first and second directions are opposite to each other. A non-helical ridge extends around the shank portion between the first and second helical threads. | 06-25-2009 |
20090257844 | Recessed head screw - A recessed head screw includes a head portion having a driver-engaging part between top and bottom faces thereof. The driver-engaging part includes a recess extending downwardly from the top face, four spaced-apart slanting walls slanting downwardly and convergingly from the top face, and four first bearing pieces each spacing two adjacent ones of the slanting walls and each having a four-sided first bearing face, and two substantially triangular second faces interconnected by the first bearing face. At least two second bearing pieces extend downwardly and respectively from bottoms of two opposite first bearing pieces. Each second bearing piece has a connecting face, and a third bearing face extending downwardly and inwardly from the connecting face. The connecting face inclines with respect to both of the third bearing face and the respective first bearing face. | 10-15-2009 |
Chun-Yen Chen, Taipei TW
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20130115454 | OPTICAL HEAD - Disclosed is an optical head, including a hollow micro-pipe and a stuffing member, the micro-pipe having a diameter-extended portion and a diameter-diminishing portion adapted allowing the incident light to transmit from the diameter-extended portion to the diameter-diminishing portion to emerge from its tip, and the stuffing member being disposed inside of the micro-pipe compared to prior techniques. The optical head of the invention is easier to be made, and it has a better focus for achieving optical exposure of sub-wave length focal spot and deep depth of focus. | 05-09-2013 |
Chun-Yen Chen, Miao-Li County 351 TW
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20140062979 | BIDIRECTIONAL SCANNING DRIVING CIRCUIT - The invention provides a bidirectional scanning driving circuit, which comprises N stages of driving modules. Driving module comprises an output unit, a forward input unit, and a reverse input unit. For the n-th stage driving module, the forward input unit receives a first input voltage and a front forward scan signal of any of the driving modules lower than or equal to (n−2)th stage for charging or discharging a control node of the output unit. The reverse input unit receives a second input voltage and a back reverse scan signal of any of the driving modules higher than or equal to (n+2)th stage for charging or discharging the control node of the output unit. When the forward input unit is charging the output unit, the output unit outputs a forward scan signal; when the reverse input unit is charging the output unit, the output unit outputs a reverse scan signal. | 03-06-2014 |
Chun-Yen Chen, Tainan City TW
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20140141188 | HALOGEN-FREE RETARDANT ACRYLIC RESIN AND MOLDED ARTICLE - Disclosed is a halogen-free retardant acrylic resin, including a copolymer of an acrylate monomer (I) and a phosphorus-containing monomer (II), wherein R1 is H or methyl; R2 is H, alkyl, ester, alkyl ester, aryl, or heteroaryl, and R3 is H or methyl, and X is (CH | 05-22-2014 |
20150125709 | POLYESTER COMPOSITION, ELECTRONIC DEVICE, AND METHOD OF FORMING FILM - Disclosed is a method for manufacturing a film. 50 wt % to 85 wt % of a first polyester and 50 wt % to 15 wt % of a second polyester are dried and mixed to form a mixture. The first polyester is polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or combinations thereof. The second polyester is copolymerized of 1 part by mole of terephthalic acid, m parts by mole of 1,4-cyclohexanedimethanol (1,4-CHDM), n parts by mole of 1,3-cyclohexanedimethanol (1,3-CHDM), and o parts by mole of ethylene glycol (EG). m+n+o=1, 0≦o≦0.4, 0.6≦m+n≦1, and 0.06≦n/m≦1.31. The mixture is melted and blended to form a polyester composition, which is extruded to form a sheet. The sheet is then biaxially stretched to obtain a film. The biaxially stretched film is then treated with a thermal setting. | 05-07-2015 |
Chun-Yen Chen, Chang Hua TW
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20150210501 | Hand-Held Tape Dispenser - A hand-held tape dispenser adapted for supporting a tape roll thereon and including a housing, a cutting unit connected to the housing, a protect cover, a noise reduction unit, and a linkage unit. The housing has an installing portion adapted to support the tape roll thereon. The protect cover is pivoted to the housing and has a grip portion corresponding in position to the installing portion. The noise reduction unit is pivoted to the housing and has a noise reduction roller that is adapted to contact a tape of the tape roll. The linkage unit interconnects the protect cover and the noise reduction unit such that the noise reduction unit and the protect cover are simultaneously pivotable toward or away from the installing portion. | 07-30-2015 |
Chun-Yen Chiu, Miao Li County TW
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20110011717 | CAPACITIVE TOUCH CIRCUIT - A capacitive touch circuit includes a single comparator, a reference voltage control unit, a resistance adjusting unit, a delay unit, and a relaxation oscillation control unit. The comparator has a first input terminal, a second input terminal, and an output terminal. The reference voltage control unit is electrically connected to the second input terminal and includes a high level voltage source, a low level voltage source, and a voltage switching controller. The voltage switching controller electrically connects either the high level voltage source or the low level voltage source to the second input terminal of the single comparator according to an output signal of the single comparator. The relaxation oscillation control unit is electrically connected to the resistance adjusting unit, the delay unit, and the reference voltage control unit. The relaxation oscillation control unit outputs a relaxation oscillation signal, and the frequency of the relaxation oscillation signal varies according to the resistance set by the resistance adjusting unit. | 01-20-2011 |
Chun-Yen Ho, Changhua County TW
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20150116701 | DEFECT INSPECTION APPARATUS AND METHOD - A defect inspection apparatus is disclosed that includes a stage, a photosensitive element, and a controller. The stage can support a semiconductor element that has a plurality of complete dies and partial dies surrounding the complete dies. The photosensitive element is located above the stage. The controller is electrically connected to the photosensitive element to drive the photosensitive element to inspect the defects of the complete dies and the partial dies. | 04-30-2015 |
Chun-Yen Huang, Beigang Township TW
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20120062212 | Zero Bias Power Detector - A zero bias power detector comprising a zero bias diode and an output boost circuit is provided. The output boost circuit comprises a zero bias transistor. The zero bias diode is not biased but outputs a rectifying signal according to a wireless signal. The zero bias transistor, not biased but coupled to the zero bias diode, is used for enhancing the rectifying signal. | 03-15-2012 |
Chun-Yen Huang, Taoyuan County TW
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20100097596 | SCANNING EXPOSURE METHOD - A scanning exposure method is provided. A mask and a substrate are oppositely moved along a direction. The mask and the substrate are moved in at least two different uniform relative velocities during a one shot exposure, thus producing an exposed shot area of an expected size on the substrate. | 04-22-2010 |
20110059622 | SEMICONDUCTOR MANUFACTURING PROCESS - A semiconductor manufacturing process is provided. First, a wafer with a material layer and an exposed photoresist layer formed thereon is provided, wherein the wafer has a center area and an edge area. Thereafter, the property of the exposed photoresist layer is varied, so as to make a critical dimension of the exposed photoresist layer in the center area different from that of the same in the edge area. After the edge property of the exposed photoresist layer is varied, an etching process is performed to the wafer by using the exposed photoresist layer as a mask, so as to make a patterned material layer having a uniform critical dimension formed on the wafer. | 03-10-2011 |
Chun-Yen Hung, Hsichih TW
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20100055224 | Suction Structure for a Mold - A suction structure for a mold includes a mold base, two airtight units, a plurality of air holes, and a plurality of air channels. The two airtight units are disposed in the mold base at interval and a suction zone is defined between the two airtight units. The plurality of air holes is located in the suction zone. The plurality of air channels is located in the suction zone and connected with the plurality of air holes. Based on the engagement of the suction zone, the plurality of air holes, and the plurality of air channels, a thin film can adhere to a mold via vacuum as air within the suction zone is extracted through the plurality of air holes. Thus, the thin film adheres to the mold fast and in a level manner, and thereby improving the yield rate of In-Mold Decoration process. | 03-04-2010 |
Chun-Yen Ko, Hsinchu County TW
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20130317829 | Audio Decoding Method and Associated Apparatus - An audio decoding method is provided. In the audio decoding method, a synchronization word and a corresponding packet header are inserted at the beginning of each packet data. A position of the packet data is confirmed according to the synchronization word, and the packet data is then decoded according to information in the packet header. Accordingly, when an error occurs during the decoding process, the decoding process skips to a next packet data for decoding to avoid noise. In addition, a packet header can be directly accessed in the situation of a fast-forward operation to obtain decoding information of the packet data to perform audio decoding. | 11-28-2013 |
Chun-Yen Kuo, Pingtung County TW
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20100285558 | Apparatus and Method for High-Throughput Micro-Cell Culture with Mechanical Stimulation - A method for high-throughput micro-cell culture with mechanical stimulation includes providing cells on a membrane, supplying a culture medium to the cells, and vibrating the membrane by exerting and varying a fluid pressure on the membrane such that the cells are mechanically stimulated through the membrane. | 11-11-2010 |
Chun-Yen Kuo, Pingtung TW
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20120276622 | APPARATUS AND METHOD FOR HIGH-THROUGHPUT MICRO-CELL CULTURE WITH MECHANICAL STIMULATION - A method and apparatus for high-throughput micro-cell culture with mechanical stimulation is disclosed. In one embodiment, the apparatus includes a cell culture vessel and a fluid pressure supply unit. The cell culture vessel has a membrane, a culture medium chamber, and a pressure chamber; and the fluid pressure supply unit that has a fluid pressure supply device and a control device is connected fluidly to the pressure chamber. When the fluid pressure in the pressure chamber changes, the membrane vibrates accordingly to generate a mechanical stimulation to the cultured cells in a controllable manner. In another embodiment, the control device can be an electro-magnetic valve. | 11-01-2012 |
Chun-Yen Lee, Taipei City TW
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20140097534 | DUAL-PHASE INTERMETALLIC INTERCONNECTION STRUCTURE AND METHOD OF FABRICATING THE SAME - Provided are a dual-phase intermetallic interconnection structure and a fabricating method thereof. The dual-phase intermetallic interconnection structure includes a first intermetallic compound, a second intermetallic compound, a first solder layer, and a second solder layer. The second intermetallic compound covers and surrounds the first intermetallic compound. The first intermetallic compound and the second intermetallic compound contain different high-melting point metal. The first solder layer and the second solder layer are disposed at the opposite sides of the second intermetallic compound, respectively. The first intermetallic compound is adapted to fill the micropore defects generated during the formation of the second intermetallic compound. | 04-10-2014 |
Chun-Yen Lin, West Central Dist. TW
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20110027615 | ELECTRODE STRUCTURE ADAPTED FOR HIGH APPLIED VOLTAGE AND FABRICATION METHOD THEREOF - An electrode structure adapted for high applied voltage is provided, which comprises a conductive plate substrate and a covering layer disposed thereon such that a covering percentage of the covering layer over the conductive plate substrate is more than 50%. Since area of the conductive plate substrate covered by the covering layer is larger than the area exposed, the possibility of arcing is reduced and the voltage applied to the electrode structure may be increased. | 02-03-2011 |
Chun-Yen Lin, Taipei City TW
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20140097729 | HOUSING HAVING QUICK-DISMOUNTING STRUCTURE - A housing having a quick-dismounting structure includes a base plate, a covering plate and a switch module. The base plate has a retaining portion. The covering plate has one side against the retaining portion and a switch hole corresponding to the side. The switch module is rotatably disposed in the switch hole and including a holding portion exposed outside the switch recess, a hooking board extended from the holding portion toward the matching board, and an elastic element. The hooking board has a fastening end faced the retaining portion. When the holding portion is moved, the hook piece shifts accordingly and the hooking end is selectably hooked the retaining portion which then lock or disengage the covering plate, for dismounting the covering plate conveniently. | 04-10-2014 |
20150204367 | BUCKLING MECHANISM AND ARTICLE HAVING THE SAME - A buckling mechanism includes a first member, a second member and a locking assembly. The first member has a pair of locking-arm guiding portions formed thereon and gradually approaching each other inward from an outside of the first member. The second member has a latching member. The locking assembly has a connection element, a first resilient element, a interfering member and a second resilient element. The connection element has a main body disposed on the first member, and a pair of flexible locking arms. The locking arms are slidably disposed on the first member along the pair of locking-arm guiding portions respectively. The connection element is pushed by the latching member to a locked position from an unlocked position. The pair of locking arms contracts along the two mutually approaching locking-arm guiding portions, and the interfering member blocks the sliding blocker. | 07-23-2015 |
Chun-Yen Lin, Hsinchu TW
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20120212604 | LIGHT BOX FOR VISUAL INSPECTION - A light box for visual inspection includes a carrier plate, a light source, a shielding element and a controller. The carrier plate for carrying a sample is light-pervious. The light source is disposed on another side of the carrier plate for providing a light. The shielding element is disposed between the carrier plate and the light source for shielding a portion of the light which defines a light-pervious visual inspection region, wherein the size of the visual inspection region is equal to or less than the sample. The controller is electrically connected with the shielding element for driving the shielding element whereby the controller controls the size of the visual inspection region. The foregoing light box may shield the light of the region outside the sample, thereby preventing the strong light emitted from the light box from harming a user's eyes. | 08-23-2012 |
Chun-Yen Lin, Zhongli -City TW
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20110221405 | METHODS AND APPARATUS FOR CALIBRATION OF POWER CONVERTERS - Methods and apparatus for a power regulator according to various aspects of the present invention may comprise a sensor adapted to generate a measurement of a voltage or a current. A memory may store a correction parameter that corresponds to the measurement, and a correction system may be adapted to adjust the measurement according to the correction parameter. | 09-15-2011 |
20150162827 | POWER CONVERTER CALIBRATION METHOD AND APPARATUS - Methods and apparatus for a power regulator according to various aspects of the present invention may comprise a sensor adapted to generate a measurement of a voltage or a current. A memory may store a correction parameter that corresponds to the measurement, and a correction system may be adapted to adjust the measurement according to the correction parameter. | 06-11-2015 |
Chun-Yen Lin, Taipei Hsien TW
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20080216952 | Adhesive Method Of Optical Components - An adhesive method of adhering a first optical component to a second optical component includes applying a resin on a first predetermined area of the first optical component and a second predetermined area of the second optical component, and then arranging the first and second predetermined areas to correspond to each other, and then shortening the distance between the first and the second predetermined areas until a resin bridge being formed between the first and second optical components, and then lightly shortening the distance between the first and second predetermined areas for the resin being spread over the first and second predetermined areas, and then the resin being spread to be fully filled between the first and second optical components through the second optical component being released and pressing the resin, finally illuminating the resin through ultraviolet ray for engaging with the first and second optical components. | 09-11-2008 |
Chun-Yen Liu, Taipei TW
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20140362478 | POWER SYSTEM AND SHORT-CIRCUIT PROTECTION CIRCUIT THEREOF - A short-circuit protection circuit adapted to a voltage regulator module is provided. The voltage regulator module includes a high side transistor and a low side transistor. The short-circuit protection circuit includes a short-circuit detecting circuit, a first switch, and a second switch. The short-circuit detecting circuit includes a detecting terminal coupled with the high side transistor. The high side transistor is connected with the low side transistor and a load, and the low side transistor is coupled with a ground. The first switch is connected with the low side transistor in parallel. The second switch coupled between the high side transistor and the power supply. The first switch is turned on before the power supply is powered on, the short-circuit detecting circuit sends a detecting voltage to the high side transistor via the detecting terminal to determine whether the high side transistor is short-circuited to control to second switch. | 12-11-2014 |
Chun-Yen Liu, Zhubei City TW
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20090215212 | Method for Fabricating A Flat Panel Display - The method for fabricating a flat panel display includes performing a first crystallization process to re-crystallize an amorphous silicon layer on a glass substrate to make the amorphous silicon layer become a polysilicon layer, forming a patterned absorbing layer to cover an active area pattern of a driving TFT and to expose portions of the polysilicon layer, performing a second crystallization process to re-crystallization the exposed portions of the polysilicon layer so that the exposed portions of the polysilicon layer has a different grain structure from the grain structure of the driving TFT, removing the patterned absorbing layer, and removing portions of the polysilicon layer to form an active area of the driving TFT and an active area of a switching TFT area in the exposed portions of the polysilicon layer of each sub-pixel. | 08-27-2009 |
Chun-Yen Liu, Hsinchu TW
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20120242708 | ACTIVE MATRIX ELECTROLUMINESCENT DISPLAY - The present invention, in one aspect, relates to an active matrix electroluminescent display device. In one embodiment, the active matrix electroluminescent display device includes an emission layer and a circuit layer. The emission layer includes a plurality of regularly-spaced emission pixels disposed in a row. The circuit layer is disposed under the emission layer and includes a plurality of pixel circuits. Each pixel circuit is electrically coupled to a respective emission pixel for controlling the current through the respective emission pixel in response to an applied data signal. The plurality of pixel circuits is spatially arranged into a plurality of groups with each group including one or more adjacent pixel circuits. Any two neighboring groups of adjacent pixel circuits are separated by a space therebetween. The circuit layer further includes a plurality of buffer circuits connected to each other in series. Each buffer circuit is configured to drive a respective group of adjacent pixel circuits in response to a scan signal. At least one buffer circuit is positioned in a respective space between two neighboring groups of adjacent pixel circuits. | 09-27-2012 |
20130146857 | PIXEL STRUCTURE OF ORGANIC LIGHT EMITTING DEVICE - A pixel structure including a first scan line, a second scan line, a data line and a power line substantially perpendicular to the first scan line and the second scan line, a reference signal line and an emission signal line substantially parallel with the first scan line and the second scan line, a common thin film transistor (C-TFT), a first pixel unit, and a second pixel unit is provided. The common thin film transistor has a common gate electrode, a common source electrode and a common drain electrode. The common gate electrode is electrically connected to the first scan line, the common drain electrode is electrically connected to the reference signal line. The first and the second pixel units respectively have a first TFT, a second TFT, a third TFT, a fourth TFT, a fifth TFT, a sixth TFT, a capacitor, and an emission device. | 06-13-2013 |
20130153908 | PIXEL STRUCTURE OF ORGANIC LIGHT EMITTING DEVICE - A pixel structure including a first scan line, a second scan line, a data line and a power line substantially perpendicular to the first scan line and the second scan line, a reference signal line and an emission signal line substantially parallel with the first scan line and the second scan line, a common thin film transistor (C-TFT), a first pixel unit, and a second pixel unit is provided. The common thin film transistor has a common gate electrode, a common source electrode and a common drain electrode. The common gate electrode is electrically connected to the first scan line, the common drain electrode is electrically connected to the reference signal line. The first and the second pixel units respectively have a first TFT, a second TFT, a third TFT, a fourth TFT, a fifth TFT, a sixth TFT, a capacitor, and an emission device. | 06-20-2013 |
Chun-Yen Peng, Miaoli County TW
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20130285098 | PATTERNED SUBSTRATE AND LIGHT EMITTING DIODE STRUCTURE - A patterned substrate includes a substrate and a plurality of protrusions. The protrusions are formed on the substrate. Each protrusion has a top face and a base. Each pair of immediately adjacent protrusions is minimally parted by 0 to 0.2 μm. When the distance between the adjacent protrusions falls as 0 μm, the bases thereof contact each other. A horizontal and a vertical light emitting diode structures using the patterned substrate are also discussed. | 10-31-2013 |
Chun-Yen Sung, New Taipei City TW
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20150180256 | CHARGE DEVICES AND CHARGE SYSTEMS - A charge device is provided. The charge device includes a power storage, a transmission circuit, and a determination circuit. The power storage provides an output voltage signal. The transmission circuit is electrically connected to a first node and a detection node. The transmission circuit receives the output voltage signal. When a voltage of the detection node is at a predetermined level, the transmission circuit transmits the output voltage signal to the first node. The determination circuit is electrically connected to the first node. The determination circuit determines whether a voltage value of the output voltage signal is greater than a threshold. When the determination circuit determines that the voltage value of the output voltage signal is greater than the threshold, the charge device generates a charge voltage signal according to the output voltage signal. | 06-25-2015 |
Chun-Yen Wu, Hsinchu City TW
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20140126313 | CHIP WITH EMBEDDED NON-VOLATILE MEMORY AND TESTING METHOD THEREFOR - A testing method for a chip with an embedded non-volatile memory and the chip is provided. A remapping circuit and the non-volatile memory are connected to a processor. The non-volatile memory has a test area and an area under test. The test area stores a test program, and the area under test stores data under test. When the processor tests the chip, the processor outputs an original instruction address, and the remapping circuit remaps the original instruction address to generate a remapped instruction address. The processor reads the test program in the test area, and executes the test program to read the data under test in the area under test and to perform a test of toggling the logic circuit. | 05-08-2014 |
Chun-Yen Yeh, Longtan Township TW
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20110024955 | Method of Fabricating Porous Soundproof Board - A porous soundproof board is fabricated Recycled waste, like slag, is used for fabrication. Slag and ceramics are mixed to be poured into a network foam carrier. Then, the soundproof board is fabricated through sintering. Thus the board fabricated has great added values and is environmental protected with low cost. | 02-03-2011 |
Chun-Yen Yeh, Taipei TW
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20130109217 | FIXING STRUCTURE WITH INTERFACE CARD MODULE AND FIXING STRUCTURE THEREOF | 05-02-2013 |
Chun-Yen Yeh, New Taipei City TW
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20120289396 | Method for Producing a Refractory Material from Aluminum residues - Disclosed is a method for making a refractory material from aluminum residues of aluminum recycling. At first, the aluminum residues is mixed with adhesive solution so that the percentage by weight of the adhesive solution is 5 wt % to 10 wt %. The mixture is granulated into grains. The grains are filled in a mold, pressed and then removed from the mold so that the grains are turned into a green body. The green body is heated in a furnace at a range of temperature from 1100° C. to 1400° C. so that the grains are sintered and become a refractory material. | 11-15-2012 |
20130049248 | Method of Producing Artificial Stones with Aluminum residues - The present disclosure uses aluminum residues to fabricate artificial stones. The aluminum residues are obtained from a recycle process of aluminum scrap. The aluminum residues is made into dross and baghouse dust as raw materials for the artificial stones. The artificial stones thus made are improved in characteristics of mechanical strength, hardness, abrasion resistance, flame resistance and anti-oxidation. Hence, the present disclosure reduces impacts to the nature; obtains derived products from recycled aluminum residues; increases commercial income; decreases cost for handling aluminum residues; and saves the use of aluminum oxide, aluminium hydroxide or silicon oxide on making artificial stones. The artificial stones thus made are fit to be used in fields of green material, green construction and green industry. | 02-28-2013 |